1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 /* 110 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 111 */ 112 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 114 static int init_func_watchdog_init(void) 115 { 116 # if defined(CONFIG_HW_WATCHDOG) && \ 117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 120 defined(CONFIG_IMX_WATCHDOG)) 121 hw_watchdog_init(); 122 puts(" Watchdog enabled\n"); 123 # endif 124 WATCHDOG_RESET(); 125 126 return 0; 127 } 128 129 int init_func_watchdog_reset(void) 130 { 131 WATCHDOG_RESET(); 132 133 return 0; 134 } 135 #endif /* CONFIG_WATCHDOG */ 136 137 __weak void board_add_ram_info(int use_default) 138 { 139 /* please define platform specific board_add_ram_info() */ 140 } 141 142 static int init_baud_rate(void) 143 { 144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 145 return 0; 146 } 147 148 static int display_text_info(void) 149 { 150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 151 ulong bss_start, bss_end, text_base; 152 153 bss_start = (ulong)&__bss_start; 154 bss_end = (ulong)&__bss_end; 155 156 #ifdef CONFIG_SYS_TEXT_BASE 157 text_base = CONFIG_SYS_TEXT_BASE; 158 #else 159 text_base = CONFIG_SYS_MONITOR_BASE; 160 #endif 161 162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 163 text_base, bss_start, bss_end); 164 #endif 165 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 181 static int init_func_ram(void) 182 { 183 return initdram(); 184 } 185 #endif 186 187 static int show_dram_config(void) 188 { 189 unsigned long long size; 190 191 #ifdef CONFIG_NR_DRAM_BANKS 192 int i; 193 194 debug("\nRAM Configuration:\n"); 195 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 196 size += gd->bd->bi_dram[i].size; 197 debug("Bank #%d: %llx ", i, 198 (unsigned long long)(gd->bd->bi_dram[i].start)); 199 #ifdef DEBUG 200 print_size(gd->bd->bi_dram[i].size, "\n"); 201 #endif 202 } 203 debug("\nDRAM: "); 204 #else 205 size = gd->ram_size; 206 #endif 207 208 print_size(size, ""); 209 board_add_ram_info(0); 210 putc('\n'); 211 212 return 0; 213 } 214 215 __weak void dram_init_banksize(void) 216 { 217 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 218 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 219 gd->bd->bi_dram[0].size = get_effective_memsize(); 220 #endif 221 } 222 223 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 224 static int init_func_i2c(void) 225 { 226 puts("I2C: "); 227 #ifdef CONFIG_SYS_I2C 228 i2c_init_all(); 229 #else 230 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 231 #endif 232 puts("ready\n"); 233 return 0; 234 } 235 #endif 236 237 #if defined(CONFIG_HARD_SPI) 238 static int init_func_spi(void) 239 { 240 puts("SPI: "); 241 spi_init(); 242 puts("ready\n"); 243 return 0; 244 } 245 #endif 246 247 __maybe_unused 248 static int zero_global_data(void) 249 { 250 memset((void *)gd, '\0', sizeof(gd_t)); 251 252 return 0; 253 } 254 255 static int setup_mon_len(void) 256 { 257 #if defined(__ARM__) || defined(__MICROBLAZE__) 258 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 259 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 260 gd->mon_len = (ulong)&_end - (ulong)_init; 261 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 262 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 263 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 264 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 265 #elif defined(CONFIG_SYS_MONITOR_BASE) 266 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 267 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 268 #endif 269 return 0; 270 } 271 272 __weak int arch_cpu_init(void) 273 { 274 return 0; 275 } 276 277 __weak int mach_cpu_init(void) 278 { 279 return 0; 280 } 281 282 /* Get the top of usable RAM */ 283 __weak ulong board_get_usable_ram_top(ulong total_size) 284 { 285 #ifdef CONFIG_SYS_SDRAM_BASE 286 /* 287 * Detect whether we have so much RAM that it goes past the end of our 288 * 32-bit address space. If so, clip the usable RAM so it doesn't. 289 */ 290 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 291 /* 292 * Will wrap back to top of 32-bit space when reservations 293 * are made. 294 */ 295 return 0; 296 #endif 297 return gd->ram_top; 298 } 299 300 static int setup_dest_addr(void) 301 { 302 debug("Monitor len: %08lX\n", gd->mon_len); 303 /* 304 * Ram is setup, size stored in gd !! 305 */ 306 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 307 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 308 /* 309 * Subtract specified amount of memory to hide so that it won't 310 * get "touched" at all by U-Boot. By fixing up gd->ram_size 311 * the Linux kernel should now get passed the now "corrected" 312 * memory size and won't touch it either. This should work 313 * for arch/ppc and arch/powerpc. Only Linux board ports in 314 * arch/powerpc with bootwrapper support, that recalculate the 315 * memory size from the SDRAM controller setup will have to 316 * get fixed. 317 */ 318 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 319 #endif 320 #ifdef CONFIG_SYS_SDRAM_BASE 321 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 322 #endif 323 gd->ram_top += get_effective_memsize(); 324 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 325 gd->relocaddr = gd->ram_top; 326 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 327 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 328 /* 329 * We need to make sure the location we intend to put secondary core 330 * boot code is reserved and not used by any part of u-boot 331 */ 332 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 333 gd->relocaddr = determine_mp_bootpg(NULL); 334 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 335 } 336 #endif 337 return 0; 338 } 339 340 #if defined(CONFIG_LOGBUFFER) 341 static int reserve_logbuffer(void) 342 { 343 #ifndef CONFIG_ALT_LB_ADDR 344 /* reserve kernel log buffer */ 345 gd->relocaddr -= LOGBUFF_RESERVE; 346 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 347 gd->relocaddr); 348 #endif 349 350 return 0; 351 } 352 #endif 353 354 #ifdef CONFIG_PRAM 355 /* reserve protected RAM */ 356 static int reserve_pram(void) 357 { 358 ulong reg; 359 360 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 361 gd->relocaddr -= (reg << 10); /* size is in kB */ 362 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 363 gd->relocaddr); 364 return 0; 365 } 366 #endif /* CONFIG_PRAM */ 367 368 /* Round memory pointer down to next 4 kB limit */ 369 static int reserve_round_4k(void) 370 { 371 gd->relocaddr &= ~(4096 - 1); 372 return 0; 373 } 374 375 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 376 defined(CONFIG_ARM) 377 static int reserve_mmu(void) 378 { 379 /* reserve TLB table */ 380 gd->arch.tlb_size = PGTABLE_SIZE; 381 gd->relocaddr -= gd->arch.tlb_size; 382 383 /* round down to next 64 kB limit */ 384 gd->relocaddr &= ~(0x10000 - 1); 385 386 gd->arch.tlb_addr = gd->relocaddr; 387 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 388 gd->arch.tlb_addr + gd->arch.tlb_size); 389 390 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 391 /* 392 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 393 * with location within secure ram. 394 */ 395 gd->arch.tlb_allocated = gd->arch.tlb_addr; 396 #endif 397 398 return 0; 399 } 400 #endif 401 402 #ifdef CONFIG_DM_VIDEO 403 static int reserve_video(void) 404 { 405 ulong addr; 406 int ret; 407 408 addr = gd->relocaddr; 409 ret = video_reserve(&addr); 410 if (ret) 411 return ret; 412 gd->relocaddr = addr; 413 414 return 0; 415 } 416 #else 417 418 # ifdef CONFIG_LCD 419 static int reserve_lcd(void) 420 { 421 # ifdef CONFIG_FB_ADDR 422 gd->fb_base = CONFIG_FB_ADDR; 423 # else 424 /* reserve memory for LCD display (always full pages) */ 425 gd->relocaddr = lcd_setmem(gd->relocaddr); 426 gd->fb_base = gd->relocaddr; 427 # endif /* CONFIG_FB_ADDR */ 428 429 return 0; 430 } 431 # endif /* CONFIG_LCD */ 432 433 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 434 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 435 !defined(CONFIG_M68K) 436 static int reserve_legacy_video(void) 437 { 438 /* reserve memory for video display (always full pages) */ 439 gd->relocaddr = video_setmem(gd->relocaddr); 440 gd->fb_base = gd->relocaddr; 441 442 return 0; 443 } 444 # endif 445 #endif /* !CONFIG_DM_VIDEO */ 446 447 static int reserve_trace(void) 448 { 449 #ifdef CONFIG_TRACE 450 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 451 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 452 debug("Reserving %dk for trace data at: %08lx\n", 453 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 454 #endif 455 456 return 0; 457 } 458 459 static int reserve_uboot(void) 460 { 461 /* 462 * reserve memory for U-Boot code, data & bss 463 * round down to next 4 kB limit 464 */ 465 gd->relocaddr -= gd->mon_len; 466 gd->relocaddr &= ~(4096 - 1); 467 #ifdef CONFIG_E500 468 /* round down to next 64 kB limit so that IVPR stays aligned */ 469 gd->relocaddr &= ~(65536 - 1); 470 #endif 471 472 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 473 gd->relocaddr); 474 475 gd->start_addr_sp = gd->relocaddr; 476 477 return 0; 478 } 479 480 #ifndef CONFIG_SPL_BUILD 481 /* reserve memory for malloc() area */ 482 static int reserve_malloc(void) 483 { 484 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 485 debug("Reserving %dk for malloc() at: %08lx\n", 486 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 487 return 0; 488 } 489 490 /* (permanently) allocate a Board Info struct */ 491 static int reserve_board(void) 492 { 493 if (!gd->bd) { 494 gd->start_addr_sp -= sizeof(bd_t); 495 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 496 memset(gd->bd, '\0', sizeof(bd_t)); 497 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 498 sizeof(bd_t), gd->start_addr_sp); 499 } 500 return 0; 501 } 502 #endif 503 504 static int setup_machine(void) 505 { 506 #ifdef CONFIG_MACH_TYPE 507 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 508 #endif 509 return 0; 510 } 511 512 static int reserve_global_data(void) 513 { 514 gd->start_addr_sp -= sizeof(gd_t); 515 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 516 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 517 sizeof(gd_t), gd->start_addr_sp); 518 return 0; 519 } 520 521 static int reserve_fdt(void) 522 { 523 #ifndef CONFIG_OF_EMBED 524 /* 525 * If the device tree is sitting immediately above our image then we 526 * must relocate it. If it is embedded in the data section, then it 527 * will be relocated with other data. 528 */ 529 if (gd->fdt_blob) { 530 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 531 532 gd->start_addr_sp -= gd->fdt_size; 533 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 534 debug("Reserving %lu Bytes for FDT at: %08lx\n", 535 gd->fdt_size, gd->start_addr_sp); 536 } 537 #endif 538 539 return 0; 540 } 541 542 int arch_reserve_stacks(void) 543 { 544 return 0; 545 } 546 547 static int reserve_stacks(void) 548 { 549 /* make stack pointer 16-byte aligned */ 550 gd->start_addr_sp -= 16; 551 gd->start_addr_sp &= ~0xf; 552 553 /* 554 * let the architecture-specific code tailor gd->start_addr_sp and 555 * gd->irq_sp 556 */ 557 return arch_reserve_stacks(); 558 } 559 560 static int display_new_sp(void) 561 { 562 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 563 564 return 0; 565 } 566 567 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 568 defined(CONFIG_SH) 569 static int setup_board_part1(void) 570 { 571 bd_t *bd = gd->bd; 572 573 /* 574 * Save local variables to board info struct 575 */ 576 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 577 bd->bi_memsize = gd->ram_size; /* size in bytes */ 578 579 #ifdef CONFIG_SYS_SRAM_BASE 580 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 581 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 582 #endif 583 584 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 585 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 586 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 587 #endif 588 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 589 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 590 #endif 591 #if defined(CONFIG_MPC83xx) 592 bd->bi_immrbar = CONFIG_SYS_IMMR; 593 #endif 594 595 return 0; 596 } 597 #endif 598 599 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 600 static int setup_board_part2(void) 601 { 602 bd_t *bd = gd->bd; 603 604 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 605 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 606 #if defined(CONFIG_CPM2) 607 bd->bi_cpmfreq = gd->arch.cpm_clk; 608 bd->bi_brgfreq = gd->arch.brg_clk; 609 bd->bi_sccfreq = gd->arch.scc_clk; 610 bd->bi_vco = gd->arch.vco_out; 611 #endif /* CONFIG_CPM2 */ 612 #if defined(CONFIG_MPC512X) 613 bd->bi_ipsfreq = gd->arch.ips_clk; 614 #endif /* CONFIG_MPC512X */ 615 #if defined(CONFIG_MPC5xxx) 616 bd->bi_ipbfreq = gd->arch.ipb_clk; 617 bd->bi_pcifreq = gd->pci_clk; 618 #endif /* CONFIG_MPC5xxx */ 619 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 620 bd->bi_pcifreq = gd->pci_clk; 621 #endif 622 #if defined(CONFIG_EXTRA_CLOCK) 623 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 624 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 625 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 626 #endif 627 628 return 0; 629 } 630 #endif 631 632 #ifdef CONFIG_SYS_EXTBDINFO 633 static int setup_board_extra(void) 634 { 635 bd_t *bd = gd->bd; 636 637 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 638 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 639 sizeof(bd->bi_r_version)); 640 641 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 642 bd->bi_plb_busfreq = gd->bus_clk; 643 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 644 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 645 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 646 bd->bi_pci_busfreq = get_PCI_freq(); 647 bd->bi_opbfreq = get_OPB_freq(); 648 #elif defined(CONFIG_XILINX_405) 649 bd->bi_pci_busfreq = get_PCI_freq(); 650 #endif 651 652 return 0; 653 } 654 #endif 655 656 #ifdef CONFIG_POST 657 static int init_post(void) 658 { 659 post_bootmode_init(); 660 post_run(NULL, POST_ROM | post_bootmode_get(0)); 661 662 return 0; 663 } 664 #endif 665 666 static int setup_dram_config(void) 667 { 668 /* Ram is board specific, so move it to board code ... */ 669 dram_init_banksize(); 670 671 return 0; 672 } 673 674 static int reloc_fdt(void) 675 { 676 #ifndef CONFIG_OF_EMBED 677 if (gd->flags & GD_FLG_SKIP_RELOC) 678 return 0; 679 if (gd->new_fdt) { 680 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 681 gd->fdt_blob = gd->new_fdt; 682 } 683 #endif 684 685 return 0; 686 } 687 688 static int setup_reloc(void) 689 { 690 if (gd->flags & GD_FLG_SKIP_RELOC) { 691 debug("Skipping relocation due to flag\n"); 692 return 0; 693 } 694 695 #ifdef CONFIG_SYS_TEXT_BASE 696 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 697 #ifdef CONFIG_M68K 698 /* 699 * On all ColdFire arch cpu, monitor code starts always 700 * just after the default vector table location, so at 0x400 701 */ 702 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 703 #endif 704 #endif 705 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 706 707 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 708 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 709 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 710 gd->start_addr_sp); 711 712 return 0; 713 } 714 715 #ifdef CONFIG_OF_BOARD_FIXUP 716 static int fix_fdt(void) 717 { 718 return board_fix_fdt((void *)gd->fdt_blob); 719 } 720 #endif 721 722 /* ARM calls relocate_code from its crt0.S */ 723 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 724 !CONFIG_IS_ENABLED(X86_64) 725 726 static int jump_to_copy(void) 727 { 728 if (gd->flags & GD_FLG_SKIP_RELOC) 729 return 0; 730 /* 731 * x86 is special, but in a nice way. It uses a trampoline which 732 * enables the dcache if possible. 733 * 734 * For now, other archs use relocate_code(), which is implemented 735 * similarly for all archs. When we do generic relocation, hopefully 736 * we can make all archs enable the dcache prior to relocation. 737 */ 738 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 739 /* 740 * SDRAM and console are now initialised. The final stack can now 741 * be setup in SDRAM. Code execution will continue in Flash, but 742 * with the stack in SDRAM and Global Data in temporary memory 743 * (CPU cache) 744 */ 745 arch_setup_gd(gd->new_gd); 746 board_init_f_r_trampoline(gd->start_addr_sp); 747 #else 748 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 749 #endif 750 751 return 0; 752 } 753 #endif 754 755 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 756 static int mark_bootstage(void) 757 { 758 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 759 760 return 0; 761 } 762 763 static int initf_console_record(void) 764 { 765 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 766 return console_record_init(); 767 #else 768 return 0; 769 #endif 770 } 771 772 static int initf_dm(void) 773 { 774 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 775 int ret; 776 777 ret = dm_init_and_scan(true); 778 if (ret) 779 return ret; 780 #endif 781 #ifdef CONFIG_TIMER_EARLY 782 ret = dm_timer_init(); 783 if (ret) 784 return ret; 785 #endif 786 787 return 0; 788 } 789 790 /* Architecture-specific memory reservation */ 791 __weak int reserve_arch(void) 792 { 793 return 0; 794 } 795 796 __weak int arch_cpu_init_dm(void) 797 { 798 return 0; 799 } 800 801 static const init_fnc_t init_sequence_f[] = { 802 setup_mon_len, 803 #ifdef CONFIG_OF_CONTROL 804 fdtdec_setup, 805 #endif 806 #ifdef CONFIG_TRACE 807 trace_early_init, 808 #endif 809 initf_malloc, 810 initf_console_record, 811 #if defined(CONFIG_HAVE_FSP) 812 arch_fsp_init, 813 #endif 814 arch_cpu_init, /* basic arch cpu dependent setup */ 815 mach_cpu_init, /* SoC/machine dependent CPU setup */ 816 initf_dm, 817 arch_cpu_init_dm, 818 mark_bootstage, /* need timer, go after init dm */ 819 #if defined(CONFIG_BOARD_EARLY_INIT_F) 820 board_early_init_f, 821 #endif 822 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 823 /* get CPU and bus clocks according to the environment variable */ 824 get_clocks, /* get CPU and bus clocks (etc.) */ 825 #endif 826 timer_init, /* initialize timer */ 827 #if defined(CONFIG_BOARD_POSTCLK_INIT) 828 board_postclk_init, 829 #endif 830 env_init, /* initialize environment */ 831 init_baud_rate, /* initialze baudrate settings */ 832 serial_init, /* serial communications setup */ 833 console_init_f, /* stage 1 init of console */ 834 display_options, /* say that we are here */ 835 display_text_info, /* show debugging info if required */ 836 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 837 defined(CONFIG_X86) 838 checkcpu, 839 #endif 840 #if defined(CONFIG_DISPLAY_CPUINFO) 841 print_cpuinfo, /* display cpu info (and speed) */ 842 #endif 843 #if defined(CONFIG_DISPLAY_BOARDINFO) 844 show_board_info, 845 #endif 846 INIT_FUNC_WATCHDOG_INIT 847 #if defined(CONFIG_MISC_INIT_F) 848 misc_init_f, 849 #endif 850 INIT_FUNC_WATCHDOG_RESET 851 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 852 init_func_i2c, 853 #endif 854 #if defined(CONFIG_HARD_SPI) 855 init_func_spi, 856 #endif 857 announce_dram_init, 858 /* TODO: unify all these dram functions? */ 859 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 860 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 861 defined(CONFIG_SH) 862 dram_init, /* configure available RAM banks */ 863 #endif 864 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 865 init_func_ram, 866 #endif 867 #ifdef CONFIG_POST 868 post_init_f, 869 #endif 870 INIT_FUNC_WATCHDOG_RESET 871 #if defined(CONFIG_SYS_DRAM_TEST) 872 testdram, 873 #endif /* CONFIG_SYS_DRAM_TEST */ 874 INIT_FUNC_WATCHDOG_RESET 875 876 #ifdef CONFIG_POST 877 init_post, 878 #endif 879 INIT_FUNC_WATCHDOG_RESET 880 /* 881 * Now that we have DRAM mapped and working, we can 882 * relocate the code and continue running from DRAM. 883 * 884 * Reserve memory at end of RAM for (top down in that order): 885 * - area that won't get touched by U-Boot and Linux (optional) 886 * - kernel log buffer 887 * - protected RAM 888 * - LCD framebuffer 889 * - monitor code 890 * - board info struct 891 */ 892 setup_dest_addr, 893 #if defined(CONFIG_LOGBUFFER) 894 reserve_logbuffer, 895 #endif 896 #ifdef CONFIG_PRAM 897 reserve_pram, 898 #endif 899 reserve_round_4k, 900 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 901 defined(CONFIG_ARM) 902 reserve_mmu, 903 #endif 904 #ifdef CONFIG_DM_VIDEO 905 reserve_video, 906 #else 907 # ifdef CONFIG_LCD 908 reserve_lcd, 909 # endif 910 /* TODO: Why the dependency on CONFIG_8xx? */ 911 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 912 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 913 !defined(CONFIG_M68K) 914 reserve_legacy_video, 915 # endif 916 #endif /* CONFIG_DM_VIDEO */ 917 reserve_trace, 918 reserve_uboot, 919 #ifndef CONFIG_SPL_BUILD 920 reserve_malloc, 921 reserve_board, 922 #endif 923 setup_machine, 924 reserve_global_data, 925 reserve_fdt, 926 reserve_arch, 927 reserve_stacks, 928 setup_dram_config, 929 show_dram_config, 930 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 931 defined(CONFIG_SH) 932 setup_board_part1, 933 #endif 934 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 935 INIT_FUNC_WATCHDOG_RESET 936 setup_board_part2, 937 #endif 938 display_new_sp, 939 #ifdef CONFIG_SYS_EXTBDINFO 940 setup_board_extra, 941 #endif 942 #ifdef CONFIG_OF_BOARD_FIXUP 943 fix_fdt, 944 #endif 945 INIT_FUNC_WATCHDOG_RESET 946 reloc_fdt, 947 setup_reloc, 948 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 949 copy_uboot_to_ram, 950 do_elf_reloc_fixups, 951 clear_bss, 952 #endif 953 #if defined(CONFIG_XTENSA) 954 clear_bss, 955 #endif 956 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 957 !CONFIG_IS_ENABLED(X86_64) 958 jump_to_copy, 959 #endif 960 NULL, 961 }; 962 963 void board_init_f(ulong boot_flags) 964 { 965 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 966 /* 967 * For some architectures, global data is initialized and used before 968 * calling this function. The data should be preserved. For others, 969 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 970 * here to host global data until relocation. 971 */ 972 gd_t data; 973 974 gd = &data; 975 976 /* 977 * Clear global data before it is accessed at debug print 978 * in initcall_run_list. Otherwise the debug print probably 979 * get the wrong value of gd->have_console. 980 */ 981 zero_global_data(); 982 #endif 983 984 gd->flags = boot_flags; 985 gd->have_console = 0; 986 987 if (initcall_run_list(init_sequence_f)) 988 hang(); 989 990 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 991 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 992 /* NOTREACHED - jump_to_copy() does not return */ 993 hang(); 994 #endif 995 } 996 997 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 998 /* 999 * For now this code is only used on x86. 1000 * 1001 * init_sequence_f_r is the list of init functions which are run when 1002 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1003 * The following limitations must be considered when implementing an 1004 * '_f_r' function: 1005 * - 'static' variables are read-only 1006 * - Global Data (gd->xxx) is read/write 1007 * 1008 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1009 * supported). It _should_, if possible, copy global data to RAM and 1010 * initialise the CPU caches (to speed up the relocation process) 1011 * 1012 * NOTE: At present only x86 uses this route, but it is intended that 1013 * all archs will move to this when generic relocation is implemented. 1014 */ 1015 static const init_fnc_t init_sequence_f_r[] = { 1016 #if !CONFIG_IS_ENABLED(X86_64) 1017 init_cache_f_r, 1018 #endif 1019 1020 NULL, 1021 }; 1022 1023 void board_init_f_r(void) 1024 { 1025 if (initcall_run_list(init_sequence_f_r)) 1026 hang(); 1027 1028 /* 1029 * The pre-relocation drivers may be using memory that has now gone 1030 * away. Mark serial as unavailable - this will fall back to the debug 1031 * UART if available. 1032 */ 1033 gd->flags &= ~GD_FLG_SERIAL_READY; 1034 1035 /* 1036 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1037 * Transfer execution from Flash to RAM by calculating the address 1038 * of the in-RAM copy of board_init_r() and calling it 1039 */ 1040 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1041 1042 /* NOTREACHED - board_init_r() does not return */ 1043 hang(); 1044 } 1045 #endif /* CONFIG_X86 */ 1046