1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 110 static int init_func_watchdog_init(void) 111 { 112 # if defined(CONFIG_HW_WATCHDOG) && \ 113 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 115 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 116 defined(CONFIG_IMX_WATCHDOG)) 117 hw_watchdog_init(); 118 puts(" Watchdog enabled\n"); 119 # endif 120 WATCHDOG_RESET(); 121 122 return 0; 123 } 124 125 int init_func_watchdog_reset(void) 126 { 127 WATCHDOG_RESET(); 128 129 return 0; 130 } 131 #endif /* CONFIG_WATCHDOG */ 132 133 __weak void board_add_ram_info(int use_default) 134 { 135 /* please define platform specific board_add_ram_info() */ 136 } 137 138 static int init_baud_rate(void) 139 { 140 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 141 return 0; 142 } 143 144 static int display_text_info(void) 145 { 146 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 147 ulong bss_start, bss_end, text_base; 148 149 bss_start = (ulong)&__bss_start; 150 bss_end = (ulong)&__bss_end; 151 152 #ifdef CONFIG_SYS_TEXT_BASE 153 text_base = CONFIG_SYS_TEXT_BASE; 154 #else 155 text_base = CONFIG_SYS_MONITOR_BASE; 156 #endif 157 158 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 159 text_base, bss_start, bss_end); 160 #endif 161 162 #ifdef CONFIG_USE_IRQ 163 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 164 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 165 #endif 166 167 return 0; 168 } 169 170 static int announce_dram_init(void) 171 { 172 puts("DRAM: "); 173 return 0; 174 } 175 176 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 177 static int init_func_ram(void) 178 { 179 return initdram(); 180 } 181 #endif 182 183 static int show_dram_config(void) 184 { 185 unsigned long long size; 186 187 #ifdef CONFIG_NR_DRAM_BANKS 188 int i; 189 190 debug("\nRAM Configuration:\n"); 191 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 192 size += gd->bd->bi_dram[i].size; 193 debug("Bank #%d: %llx ", i, 194 (unsigned long long)(gd->bd->bi_dram[i].start)); 195 #ifdef DEBUG 196 print_size(gd->bd->bi_dram[i].size, "\n"); 197 #endif 198 } 199 debug("\nDRAM: "); 200 #else 201 size = gd->ram_size; 202 #endif 203 204 print_size(size, ""); 205 board_add_ram_info(0); 206 putc('\n'); 207 208 return 0; 209 } 210 211 __weak void dram_init_banksize(void) 212 { 213 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 214 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 215 gd->bd->bi_dram[0].size = get_effective_memsize(); 216 #endif 217 } 218 219 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 220 static int init_func_i2c(void) 221 { 222 puts("I2C: "); 223 #ifdef CONFIG_SYS_I2C 224 i2c_init_all(); 225 #else 226 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 227 #endif 228 puts("ready\n"); 229 return 0; 230 } 231 #endif 232 233 #if defined(CONFIG_HARD_SPI) 234 static int init_func_spi(void) 235 { 236 puts("SPI: "); 237 spi_init(); 238 puts("ready\n"); 239 return 0; 240 } 241 #endif 242 243 __maybe_unused 244 static int zero_global_data(void) 245 { 246 memset((void *)gd, '\0', sizeof(gd_t)); 247 248 return 0; 249 } 250 251 static int setup_mon_len(void) 252 { 253 #if defined(__ARM__) || defined(__MICROBLAZE__) 254 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 255 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 256 gd->mon_len = (ulong)&_end - (ulong)_init; 257 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 258 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 259 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 260 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 261 #elif defined(CONFIG_SYS_MONITOR_BASE) 262 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 263 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 264 #endif 265 return 0; 266 } 267 268 __weak int arch_cpu_init(void) 269 { 270 return 0; 271 } 272 273 __weak int mach_cpu_init(void) 274 { 275 return 0; 276 } 277 278 /* Get the top of usable RAM */ 279 __weak ulong board_get_usable_ram_top(ulong total_size) 280 { 281 #ifdef CONFIG_SYS_SDRAM_BASE 282 /* 283 * Detect whether we have so much RAM that it goes past the end of our 284 * 32-bit address space. If so, clip the usable RAM so it doesn't. 285 */ 286 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 287 /* 288 * Will wrap back to top of 32-bit space when reservations 289 * are made. 290 */ 291 return 0; 292 #endif 293 return gd->ram_top; 294 } 295 296 static int setup_dest_addr(void) 297 { 298 debug("Monitor len: %08lX\n", gd->mon_len); 299 /* 300 * Ram is setup, size stored in gd !! 301 */ 302 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 303 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 304 /* 305 * Subtract specified amount of memory to hide so that it won't 306 * get "touched" at all by U-Boot. By fixing up gd->ram_size 307 * the Linux kernel should now get passed the now "corrected" 308 * memory size and won't touch it either. This should work 309 * for arch/ppc and arch/powerpc. Only Linux board ports in 310 * arch/powerpc with bootwrapper support, that recalculate the 311 * memory size from the SDRAM controller setup will have to 312 * get fixed. 313 */ 314 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 315 #endif 316 #ifdef CONFIG_SYS_SDRAM_BASE 317 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 318 #endif 319 gd->ram_top += get_effective_memsize(); 320 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 321 gd->relocaddr = gd->ram_top; 322 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 323 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 324 /* 325 * We need to make sure the location we intend to put secondary core 326 * boot code is reserved and not used by any part of u-boot 327 */ 328 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 329 gd->relocaddr = determine_mp_bootpg(NULL); 330 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 331 } 332 #endif 333 return 0; 334 } 335 336 #if defined(CONFIG_LOGBUFFER) 337 static int reserve_logbuffer(void) 338 { 339 #ifndef CONFIG_ALT_LB_ADDR 340 /* reserve kernel log buffer */ 341 gd->relocaddr -= LOGBUFF_RESERVE; 342 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 343 gd->relocaddr); 344 #endif 345 346 return 0; 347 } 348 #endif 349 350 #ifdef CONFIG_PRAM 351 /* reserve protected RAM */ 352 static int reserve_pram(void) 353 { 354 ulong reg; 355 356 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 357 gd->relocaddr -= (reg << 10); /* size is in kB */ 358 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 359 gd->relocaddr); 360 return 0; 361 } 362 #endif /* CONFIG_PRAM */ 363 364 /* Round memory pointer down to next 4 kB limit */ 365 static int reserve_round_4k(void) 366 { 367 gd->relocaddr &= ~(4096 - 1); 368 return 0; 369 } 370 371 #ifdef CONFIG_ARM 372 static int reserve_mmu(void) 373 { 374 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 375 /* reserve TLB table */ 376 gd->arch.tlb_size = PGTABLE_SIZE; 377 gd->relocaddr -= gd->arch.tlb_size; 378 379 /* round down to next 64 kB limit */ 380 gd->relocaddr &= ~(0x10000 - 1); 381 382 gd->arch.tlb_addr = gd->relocaddr; 383 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 384 gd->arch.tlb_addr + gd->arch.tlb_size); 385 386 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 387 /* 388 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 389 * with location within secure ram. 390 */ 391 gd->arch.tlb_allocated = gd->arch.tlb_addr; 392 #endif 393 #endif 394 395 return 0; 396 } 397 #endif 398 399 static int reserve_video(void) 400 { 401 #ifdef CONFIG_DM_VIDEO 402 ulong addr; 403 int ret; 404 405 addr = gd->relocaddr; 406 ret = video_reserve(&addr); 407 if (ret) 408 return ret; 409 gd->relocaddr = addr; 410 #elif defined(CONFIG_LCD) 411 # ifdef CONFIG_FB_ADDR 412 gd->fb_base = CONFIG_FB_ADDR; 413 # else 414 /* reserve memory for LCD display (always full pages) */ 415 gd->relocaddr = lcd_setmem(gd->relocaddr); 416 gd->fb_base = gd->relocaddr; 417 # endif /* CONFIG_FB_ADDR */ 418 #elif defined(CONFIG_VIDEO) && \ 419 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 420 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 421 !defined(CONFIG_M68K) 422 /* reserve memory for video display (always full pages) */ 423 gd->relocaddr = video_setmem(gd->relocaddr); 424 gd->fb_base = gd->relocaddr; 425 #endif 426 427 return 0; 428 } 429 430 static int reserve_trace(void) 431 { 432 #ifdef CONFIG_TRACE 433 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 434 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 435 debug("Reserving %dk for trace data at: %08lx\n", 436 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 437 #endif 438 439 return 0; 440 } 441 442 static int reserve_uboot(void) 443 { 444 /* 445 * reserve memory for U-Boot code, data & bss 446 * round down to next 4 kB limit 447 */ 448 gd->relocaddr -= gd->mon_len; 449 gd->relocaddr &= ~(4096 - 1); 450 #ifdef CONFIG_E500 451 /* round down to next 64 kB limit so that IVPR stays aligned */ 452 gd->relocaddr &= ~(65536 - 1); 453 #endif 454 455 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 456 gd->relocaddr); 457 458 gd->start_addr_sp = gd->relocaddr; 459 460 return 0; 461 } 462 463 /* reserve memory for malloc() area */ 464 static int reserve_malloc(void) 465 { 466 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 467 debug("Reserving %dk for malloc() at: %08lx\n", 468 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 469 return 0; 470 } 471 472 /* (permanently) allocate a Board Info struct */ 473 static int reserve_board(void) 474 { 475 if (!gd->bd) { 476 gd->start_addr_sp -= sizeof(bd_t); 477 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 478 memset(gd->bd, '\0', sizeof(bd_t)); 479 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 480 sizeof(bd_t), gd->start_addr_sp); 481 } 482 return 0; 483 } 484 485 static int setup_machine(void) 486 { 487 #ifdef CONFIG_MACH_TYPE 488 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 489 #endif 490 return 0; 491 } 492 493 static int reserve_global_data(void) 494 { 495 gd->start_addr_sp -= sizeof(gd_t); 496 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 497 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 498 sizeof(gd_t), gd->start_addr_sp); 499 return 0; 500 } 501 502 static int reserve_fdt(void) 503 { 504 #ifndef CONFIG_OF_EMBED 505 /* 506 * If the device tree is sitting immediately above our image then we 507 * must relocate it. If it is embedded in the data section, then it 508 * will be relocated with other data. 509 */ 510 if (gd->fdt_blob) { 511 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 512 513 gd->start_addr_sp -= gd->fdt_size; 514 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 515 debug("Reserving %lu Bytes for FDT at: %08lx\n", 516 gd->fdt_size, gd->start_addr_sp); 517 } 518 #endif 519 520 return 0; 521 } 522 523 int arch_reserve_stacks(void) 524 { 525 return 0; 526 } 527 528 static int reserve_stacks(void) 529 { 530 /* make stack pointer 16-byte aligned */ 531 gd->start_addr_sp -= 16; 532 gd->start_addr_sp &= ~0xf; 533 534 /* 535 * let the architecture-specific code tailor gd->start_addr_sp and 536 * gd->irq_sp 537 */ 538 return arch_reserve_stacks(); 539 } 540 541 static int display_new_sp(void) 542 { 543 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 544 545 return 0; 546 } 547 548 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 549 defined(CONFIG_SH) 550 static int setup_board_part1(void) 551 { 552 bd_t *bd = gd->bd; 553 554 /* 555 * Save local variables to board info struct 556 */ 557 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 558 bd->bi_memsize = gd->ram_size; /* size in bytes */ 559 560 #ifdef CONFIG_SYS_SRAM_BASE 561 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 562 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 563 #endif 564 565 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 566 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 567 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 568 #endif 569 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 570 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 571 #endif 572 #if defined(CONFIG_MPC83xx) 573 bd->bi_immrbar = CONFIG_SYS_IMMR; 574 #endif 575 576 return 0; 577 } 578 #endif 579 580 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 581 static int setup_board_part2(void) 582 { 583 bd_t *bd = gd->bd; 584 585 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 586 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 587 #if defined(CONFIG_CPM2) 588 bd->bi_cpmfreq = gd->arch.cpm_clk; 589 bd->bi_brgfreq = gd->arch.brg_clk; 590 bd->bi_sccfreq = gd->arch.scc_clk; 591 bd->bi_vco = gd->arch.vco_out; 592 #endif /* CONFIG_CPM2 */ 593 #if defined(CONFIG_MPC512X) 594 bd->bi_ipsfreq = gd->arch.ips_clk; 595 #endif /* CONFIG_MPC512X */ 596 #if defined(CONFIG_MPC5xxx) 597 bd->bi_ipbfreq = gd->arch.ipb_clk; 598 bd->bi_pcifreq = gd->pci_clk; 599 #endif /* CONFIG_MPC5xxx */ 600 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 601 bd->bi_pcifreq = gd->pci_clk; 602 #endif 603 #if defined(CONFIG_EXTRA_CLOCK) 604 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 605 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 606 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 607 #endif 608 609 return 0; 610 } 611 #endif 612 613 #ifdef CONFIG_SYS_EXTBDINFO 614 static int setup_board_extra(void) 615 { 616 bd_t *bd = gd->bd; 617 618 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 619 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 620 sizeof(bd->bi_r_version)); 621 622 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 623 bd->bi_plb_busfreq = gd->bus_clk; 624 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 625 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 626 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 627 bd->bi_pci_busfreq = get_PCI_freq(); 628 bd->bi_opbfreq = get_OPB_freq(); 629 #elif defined(CONFIG_XILINX_405) 630 bd->bi_pci_busfreq = get_PCI_freq(); 631 #endif 632 633 return 0; 634 } 635 #endif 636 637 #ifdef CONFIG_POST 638 static int init_post(void) 639 { 640 post_bootmode_init(); 641 post_run(NULL, POST_ROM | post_bootmode_get(0)); 642 643 return 0; 644 } 645 #endif 646 647 static int setup_dram_config(void) 648 { 649 /* Ram is board specific, so move it to board code ... */ 650 dram_init_banksize(); 651 652 return 0; 653 } 654 655 static int reloc_fdt(void) 656 { 657 #ifndef CONFIG_OF_EMBED 658 if (gd->flags & GD_FLG_SKIP_RELOC) 659 return 0; 660 if (gd->new_fdt) { 661 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 662 gd->fdt_blob = gd->new_fdt; 663 } 664 #endif 665 666 return 0; 667 } 668 669 static int setup_reloc(void) 670 { 671 if (gd->flags & GD_FLG_SKIP_RELOC) { 672 debug("Skipping relocation due to flag\n"); 673 return 0; 674 } 675 676 #ifdef CONFIG_SYS_TEXT_BASE 677 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 678 #ifdef CONFIG_M68K 679 /* 680 * On all ColdFire arch cpu, monitor code starts always 681 * just after the default vector table location, so at 0x400 682 */ 683 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 684 #endif 685 #endif 686 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 687 688 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 689 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 690 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 691 gd->start_addr_sp); 692 693 return 0; 694 } 695 696 #ifdef CONFIG_OF_BOARD_FIXUP 697 static int fix_fdt(void) 698 { 699 return board_fix_fdt((void *)gd->fdt_blob); 700 } 701 #endif 702 703 /* ARM calls relocate_code from its crt0.S */ 704 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 705 !CONFIG_IS_ENABLED(X86_64) 706 707 static int jump_to_copy(void) 708 { 709 if (gd->flags & GD_FLG_SKIP_RELOC) 710 return 0; 711 /* 712 * x86 is special, but in a nice way. It uses a trampoline which 713 * enables the dcache if possible. 714 * 715 * For now, other archs use relocate_code(), which is implemented 716 * similarly for all archs. When we do generic relocation, hopefully 717 * we can make all archs enable the dcache prior to relocation. 718 */ 719 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 720 /* 721 * SDRAM and console are now initialised. The final stack can now 722 * be setup in SDRAM. Code execution will continue in Flash, but 723 * with the stack in SDRAM and Global Data in temporary memory 724 * (CPU cache) 725 */ 726 arch_setup_gd(gd->new_gd); 727 board_init_f_r_trampoline(gd->start_addr_sp); 728 #else 729 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 730 #endif 731 732 return 0; 733 } 734 #endif 735 736 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 737 static int mark_bootstage(void) 738 { 739 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 740 741 return 0; 742 } 743 744 static int initf_console_record(void) 745 { 746 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 747 return console_record_init(); 748 #else 749 return 0; 750 #endif 751 } 752 753 static int initf_dm(void) 754 { 755 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 756 int ret; 757 758 ret = dm_init_and_scan(true); 759 if (ret) 760 return ret; 761 #endif 762 #ifdef CONFIG_TIMER_EARLY 763 ret = dm_timer_init(); 764 if (ret) 765 return ret; 766 #endif 767 768 return 0; 769 } 770 771 /* Architecture-specific memory reservation */ 772 __weak int reserve_arch(void) 773 { 774 return 0; 775 } 776 777 __weak int arch_cpu_init_dm(void) 778 { 779 return 0; 780 } 781 782 static const init_fnc_t init_sequence_f[] = { 783 setup_mon_len, 784 #ifdef CONFIG_OF_CONTROL 785 fdtdec_setup, 786 #endif 787 #ifdef CONFIG_TRACE 788 trace_early_init, 789 #endif 790 initf_malloc, 791 initf_console_record, 792 #if defined(CONFIG_HAVE_FSP) 793 arch_fsp_init, 794 #endif 795 arch_cpu_init, /* basic arch cpu dependent setup */ 796 mach_cpu_init, /* SoC/machine dependent CPU setup */ 797 initf_dm, 798 arch_cpu_init_dm, 799 mark_bootstage, /* need timer, go after init dm */ 800 #if defined(CONFIG_BOARD_EARLY_INIT_F) 801 board_early_init_f, 802 #endif 803 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 804 /* get CPU and bus clocks according to the environment variable */ 805 get_clocks, /* get CPU and bus clocks (etc.) */ 806 #endif 807 timer_init, /* initialize timer */ 808 #if defined(CONFIG_BOARD_POSTCLK_INIT) 809 board_postclk_init, 810 #endif 811 env_init, /* initialize environment */ 812 init_baud_rate, /* initialze baudrate settings */ 813 serial_init, /* serial communications setup */ 814 console_init_f, /* stage 1 init of console */ 815 display_options, /* say that we are here */ 816 display_text_info, /* show debugging info if required */ 817 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 818 defined(CONFIG_X86) 819 checkcpu, 820 #endif 821 #if defined(CONFIG_DISPLAY_CPUINFO) 822 print_cpuinfo, /* display cpu info (and speed) */ 823 #endif 824 #if defined(CONFIG_DISPLAY_BOARDINFO) 825 show_board_info, 826 #endif 827 INIT_FUNC_WATCHDOG_INIT 828 #if defined(CONFIG_MISC_INIT_F) 829 misc_init_f, 830 #endif 831 INIT_FUNC_WATCHDOG_RESET 832 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 833 init_func_i2c, 834 #endif 835 #if defined(CONFIG_HARD_SPI) 836 init_func_spi, 837 #endif 838 announce_dram_init, 839 /* TODO: unify all these dram functions? */ 840 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 841 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 842 defined(CONFIG_SH) 843 dram_init, /* configure available RAM banks */ 844 #endif 845 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 846 init_func_ram, 847 #endif 848 #ifdef CONFIG_POST 849 post_init_f, 850 #endif 851 INIT_FUNC_WATCHDOG_RESET 852 #if defined(CONFIG_SYS_DRAM_TEST) 853 testdram, 854 #endif /* CONFIG_SYS_DRAM_TEST */ 855 INIT_FUNC_WATCHDOG_RESET 856 857 #ifdef CONFIG_POST 858 init_post, 859 #endif 860 INIT_FUNC_WATCHDOG_RESET 861 /* 862 * Now that we have DRAM mapped and working, we can 863 * relocate the code and continue running from DRAM. 864 * 865 * Reserve memory at end of RAM for (top down in that order): 866 * - area that won't get touched by U-Boot and Linux (optional) 867 * - kernel log buffer 868 * - protected RAM 869 * - LCD framebuffer 870 * - monitor code 871 * - board info struct 872 */ 873 setup_dest_addr, 874 #if defined(CONFIG_LOGBUFFER) 875 reserve_logbuffer, 876 #endif 877 #ifdef CONFIG_PRAM 878 reserve_pram, 879 #endif 880 reserve_round_4k, 881 #ifdef CONFIG_ARM 882 reserve_mmu, 883 #endif 884 reserve_video, 885 reserve_trace, 886 reserve_uboot, 887 reserve_malloc, 888 reserve_board, 889 setup_machine, 890 reserve_global_data, 891 reserve_fdt, 892 reserve_arch, 893 reserve_stacks, 894 setup_dram_config, 895 show_dram_config, 896 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 897 defined(CONFIG_SH) 898 setup_board_part1, 899 #endif 900 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 901 INIT_FUNC_WATCHDOG_RESET 902 setup_board_part2, 903 #endif 904 display_new_sp, 905 #ifdef CONFIG_SYS_EXTBDINFO 906 setup_board_extra, 907 #endif 908 #ifdef CONFIG_OF_BOARD_FIXUP 909 fix_fdt, 910 #endif 911 INIT_FUNC_WATCHDOG_RESET 912 reloc_fdt, 913 setup_reloc, 914 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 915 copy_uboot_to_ram, 916 do_elf_reloc_fixups, 917 clear_bss, 918 #endif 919 #if defined(CONFIG_XTENSA) 920 clear_bss, 921 #endif 922 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 923 !CONFIG_IS_ENABLED(X86_64) 924 jump_to_copy, 925 #endif 926 NULL, 927 }; 928 929 void board_init_f(ulong boot_flags) 930 { 931 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 932 /* 933 * For some architectures, global data is initialized and used before 934 * calling this function. The data should be preserved. For others, 935 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 936 * here to host global data until relocation. 937 */ 938 gd_t data; 939 940 gd = &data; 941 942 /* 943 * Clear global data before it is accessed at debug print 944 * in initcall_run_list. Otherwise the debug print probably 945 * get the wrong value of gd->have_console. 946 */ 947 zero_global_data(); 948 #endif 949 950 gd->flags = boot_flags; 951 gd->have_console = 0; 952 953 if (initcall_run_list(init_sequence_f)) 954 hang(); 955 956 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 957 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 958 /* NOTREACHED - jump_to_copy() does not return */ 959 hang(); 960 #endif 961 } 962 963 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 964 /* 965 * For now this code is only used on x86. 966 * 967 * init_sequence_f_r is the list of init functions which are run when 968 * U-Boot is executing from Flash with a semi-limited 'C' environment. 969 * The following limitations must be considered when implementing an 970 * '_f_r' function: 971 * - 'static' variables are read-only 972 * - Global Data (gd->xxx) is read/write 973 * 974 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 975 * supported). It _should_, if possible, copy global data to RAM and 976 * initialise the CPU caches (to speed up the relocation process) 977 * 978 * NOTE: At present only x86 uses this route, but it is intended that 979 * all archs will move to this when generic relocation is implemented. 980 */ 981 static const init_fnc_t init_sequence_f_r[] = { 982 #if !CONFIG_IS_ENABLED(X86_64) 983 init_cache_f_r, 984 #endif 985 986 NULL, 987 }; 988 989 void board_init_f_r(void) 990 { 991 if (initcall_run_list(init_sequence_f_r)) 992 hang(); 993 994 /* 995 * The pre-relocation drivers may be using memory that has now gone 996 * away. Mark serial as unavailable - this will fall back to the debug 997 * UART if available. 998 */ 999 gd->flags &= ~GD_FLG_SERIAL_READY; 1000 1001 /* 1002 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1003 * Transfer execution from Flash to RAM by calculating the address 1004 * of the in-RAM copy of board_init_r() and calling it 1005 */ 1006 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1007 1008 /* NOTREACHED - board_init_r() does not return */ 1009 hang(); 1010 } 1011 #endif /* CONFIG_X86 */ 1012