xref: /rk3399_rockchip-uboot/common/board_f.c (revision a733b06b69d2cb058c4363952bc0793b1f514305)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2002-2006
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Marius Groeger <mgroeger@sysgo.de>
9  *
10  * See file CREDITS for list of people who contributed to this
11  * project.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License as
15  * published by the Free Software Foundation; either version 2 of
16  * the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26  * MA 02111-1307 USA
27  */
28 
29 #include <common.h>
30 #include <linux/compiler.h>
31 #include <version.h>
32 #include <environment.h>
33 #include <fdtdec.h>
34 #if defined(CONFIG_CMD_IDE)
35 #include <ide.h>
36 #endif
37 #include <i2c.h>
38 #include <initcall.h>
39 #include <logbuff.h>
40 
41 /* TODO: Can we move these into arch/ headers? */
42 #ifdef CONFIG_8xx
43 #include <mpc8xx.h>
44 #endif
45 #ifdef CONFIG_5xx
46 #include <mpc5xx.h>
47 #endif
48 #ifdef CONFIG_MPC5xxx
49 #include <mpc5xxx.h>
50 #endif
51 
52 #include <os.h>
53 #include <post.h>
54 #include <spi.h>
55 #include <watchdog.h>
56 #include <asm/errno.h>
57 #include <asm/io.h>
58 #ifdef CONFIG_MP
59 #include <asm/mp.h>
60 #endif
61 #include <asm/sections.h>
62 #ifdef CONFIG_X86
63 #include <asm/init_helpers.h>
64 #include <asm/relocate.h>
65 #endif
66 #ifdef CONFIG_SANDBOX
67 #include <asm/state.h>
68 #endif
69 #include <linux/compiler.h>
70 
71 /*
72  * Pointer to initial global data area
73  *
74  * Here we initialize it if needed.
75  */
76 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
77 #undef	XTRN_DECLARE_GLOBAL_DATA_PTR
78 #define XTRN_DECLARE_GLOBAL_DATA_PTR	/* empty = allocate here */
79 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
80 #else
81 DECLARE_GLOBAL_DATA_PTR;
82 #endif
83 
84 /*
85  * sjg: IMO this code should be
86  * refactored to a single function, something like:
87  *
88  * void led_set_state(enum led_colour_t colour, int on);
89  */
90 /************************************************************************
91  * Coloured LED functionality
92  ************************************************************************
93  * May be supplied by boards if desired
94  */
95 inline void __coloured_LED_init(void) {}
96 void coloured_LED_init(void)
97 	__attribute__((weak, alias("__coloured_LED_init")));
98 inline void __red_led_on(void) {}
99 void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
100 inline void __red_led_off(void) {}
101 void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
102 inline void __green_led_on(void) {}
103 void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
104 inline void __green_led_off(void) {}
105 void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
106 inline void __yellow_led_on(void) {}
107 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
108 inline void __yellow_led_off(void) {}
109 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
110 inline void __blue_led_on(void) {}
111 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
112 inline void __blue_led_off(void) {}
113 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
114 
115 /*
116  * Why is gd allocated a register? Prior to reloc it might be better to
117  * just pass it around to each function in this file?
118  *
119  * After reloc one could argue that it is hardly used and doesn't need
120  * to be in a register. Or if it is it should perhaps hold pointers to all
121  * global data for all modules, so that post-reloc we can avoid the massive
122  * literal pool we get on ARM. Or perhaps just encourage each module to use
123  * a structure...
124  */
125 
126 /*
127  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
128  */
129 
130 #if defined(CONFIG_WATCHDOG)
131 static int init_func_watchdog_init(void)
132 {
133 	puts("       Watchdog enabled\n");
134 	WATCHDOG_RESET();
135 
136 	return 0;
137 }
138 
139 int init_func_watchdog_reset(void)
140 {
141 	WATCHDOG_RESET();
142 
143 	return 0;
144 }
145 #endif /* CONFIG_WATCHDOG */
146 
147 void __board_add_ram_info(int use_default)
148 {
149 	/* please define platform specific board_add_ram_info() */
150 }
151 
152 void board_add_ram_info(int)
153 	__attribute__ ((weak, alias("__board_add_ram_info")));
154 
155 static int init_baud_rate(void)
156 {
157 	gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
158 	return 0;
159 }
160 
161 static int display_text_info(void)
162 {
163 #ifndef CONFIG_SANDBOX
164 	ulong bss_start, bss_end;
165 
166 #ifdef CONFIG_SYS_SYM_OFFSETS
167 	bss_start = _bss_start_ofs + _TEXT_BASE;
168 	bss_end = _bss_end_ofs + _TEXT_BASE;
169 #else
170 	bss_start = (ulong)&__bss_start;
171 	bss_end = (ulong)&__bss_end;
172 #endif
173 	debug("U-Boot code: %08X -> %08lX  BSS: -> %08lX\n",
174 	      CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
175 #endif
176 
177 #ifdef CONFIG_MODEM_SUPPORT
178 	debug("Modem Support enabled\n");
179 #endif
180 #ifdef CONFIG_USE_IRQ
181 	debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
182 	debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
183 #endif
184 
185 	return 0;
186 }
187 
188 static int announce_dram_init(void)
189 {
190 	puts("DRAM:  ");
191 	return 0;
192 }
193 
194 #ifdef CONFIG_PPC
195 static int init_func_ram(void)
196 {
197 #ifdef	CONFIG_BOARD_TYPES
198 	int board_type = gd->board_type;
199 #else
200 	int board_type = 0;	/* use dummy arg */
201 #endif
202 
203 	gd->ram_size = initdram(board_type);
204 
205 	if (gd->ram_size > 0)
206 		return 0;
207 
208 	puts("*** failed ***\n");
209 	return 1;
210 }
211 #endif
212 
213 static int show_dram_config(void)
214 {
215 	ulong size;
216 
217 #ifdef CONFIG_NR_DRAM_BANKS
218 	int i;
219 
220 	debug("\nRAM Configuration:\n");
221 	for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
222 		size += gd->bd->bi_dram[i].size;
223 		debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
224 #ifdef DEBUG
225 		print_size(gd->bd->bi_dram[i].size, "\n");
226 #endif
227 	}
228 	debug("\nDRAM:  ");
229 #else
230 	size = gd->ram_size;
231 #endif
232 
233 	print_size(size, "");
234 	board_add_ram_info(0);
235 	putc('\n');
236 
237 	return 0;
238 }
239 
240 ulong get_effective_memsize(void)
241 {
242 #ifndef	CONFIG_VERY_BIG_RAM
243 	return gd->ram_size;
244 #else
245 	/* limit stack to what we can reasonable map */
246 	return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
247 		CONFIG_MAX_MEM_MAPPED : gd->ram_size);
248 #endif
249 }
250 
251 void __dram_init_banksize(void)
252 {
253 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
254 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
255 	gd->bd->bi_dram[0].size = get_effective_memsize();
256 #endif
257 }
258 
259 void dram_init_banksize(void)
260 	__attribute__((weak, alias("__dram_init_banksize")));
261 
262 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
263 static int init_func_i2c(void)
264 {
265 	puts("I2C:   ");
266 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
267 	puts("ready\n");
268 	return 0;
269 }
270 #endif
271 
272 #if defined(CONFIG_HARD_SPI)
273 static int init_func_spi(void)
274 {
275 	puts("SPI:   ");
276 	spi_init();
277 	puts("ready\n");
278 	return 0;
279 }
280 #endif
281 
282 __maybe_unused
283 static int zero_global_data(void)
284 {
285 	memset((void *)gd, '\0', sizeof(gd_t));
286 
287 	return 0;
288 }
289 
290 static int setup_mon_len(void)
291 {
292 #ifdef CONFIG_SYS_SYM_OFFSETS
293 	gd->mon_len = _bss_end_ofs;
294 #elif defined(CONFIG_SANDBOX)
295 	gd->mon_len = (ulong)&_end - (ulong)_init;
296 #else
297 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
298 	gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
299 #endif
300 	return 0;
301 }
302 
303 __weak int arch_cpu_init(void)
304 {
305 	return 0;
306 }
307 
308 #ifdef CONFIG_SANDBOX
309 static int setup_ram_buf(void)
310 {
311 	gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE);
312 	assert(gd->arch.ram_buf);
313 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
314 
315 	return 0;
316 }
317 #endif
318 
319 static int setup_fdt(void)
320 {
321 #ifdef CONFIG_OF_EMBED
322 	/* Get a pointer to the FDT */
323 	gd->fdt_blob = _binary_dt_dtb_start;
324 #elif defined CONFIG_OF_SEPARATE
325 	/* FDT is at end of image */
326 # ifdef CONFIG_SYS_SYM_OFFSETS
327 	gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
328 # else
329 	gd->fdt_blob = (ulong *)&_end;
330 # endif
331 #endif
332 	/* Allow the early environment to override the fdt address */
333 	gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
334 						(uintptr_t)gd->fdt_blob);
335 	return 0;
336 }
337 
338 /* Get the top of usable RAM */
339 __weak ulong board_get_usable_ram_top(ulong total_size)
340 {
341 	return gd->ram_top;
342 }
343 
344 static int setup_dest_addr(void)
345 {
346 	debug("Monitor len: %08lX\n", gd->mon_len);
347 	/*
348 	 * Ram is setup, size stored in gd !!
349 	 */
350 	debug("Ram size: %08lX\n", (ulong)gd->ram_size);
351 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
352 	/*
353 	 * Subtract specified amount of memory to hide so that it won't
354 	 * get "touched" at all by U-Boot. By fixing up gd->ram_size
355 	 * the Linux kernel should now get passed the now "corrected"
356 	 * memory size and won't touch it either. This should work
357 	 * for arch/ppc and arch/powerpc. Only Linux board ports in
358 	 * arch/powerpc with bootwrapper support, that recalculate the
359 	 * memory size from the SDRAM controller setup will have to
360 	 * get fixed.
361 	 */
362 	gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
363 #endif
364 #ifdef CONFIG_SYS_SDRAM_BASE
365 	gd->ram_top = CONFIG_SYS_SDRAM_BASE;
366 #endif
367 	gd->ram_top += get_effective_memsize();
368 	gd->ram_top = board_get_usable_ram_top(gd->mon_len);
369 	gd->dest_addr = gd->ram_top;
370 	debug("Ram top: %08lX\n", (ulong)gd->ram_top);
371 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
372 	/*
373 	 * We need to make sure the location we intend to put secondary core
374 	 * boot code is reserved and not used by any part of u-boot
375 	 */
376 	if (gd->dest_addr > determine_mp_bootpg(NULL)) {
377 		gd->dest_addr = determine_mp_bootpg(NULL);
378 		debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
379 	}
380 #endif
381 	gd->dest_addr_sp = gd->dest_addr;
382 	return 0;
383 }
384 
385 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
386 static int reserve_logbuffer(void)
387 {
388 	/* reserve kernel log buffer */
389 	gd->dest_addr -= LOGBUFF_RESERVE;
390 	debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
391 		gd->dest_addr);
392 	return 0;
393 }
394 #endif
395 
396 #ifdef CONFIG_PRAM
397 /* reserve protected RAM */
398 static int reserve_pram(void)
399 {
400 	ulong reg;
401 
402 	reg = getenv_ulong("pram", 10, CONFIG_PRAM);
403 	gd->dest_addr -= (reg << 10);		/* size is in kB */
404 	debug("Reserving %ldk for protected RAM at %08lx\n", reg,
405 	      gd->dest_addr);
406 	return 0;
407 }
408 #endif /* CONFIG_PRAM */
409 
410 /* Round memory pointer down to next 4 kB limit */
411 static int reserve_round_4k(void)
412 {
413 	gd->dest_addr &= ~(4096 - 1);
414 	return 0;
415 }
416 
417 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
418 		defined(CONFIG_ARM)
419 static int reserve_mmu(void)
420 {
421 	/* reserve TLB table */
422 	gd->arch.tlb_size = 4096 * 4;
423 	gd->dest_addr -= gd->arch.tlb_size;
424 
425 	/* round down to next 64 kB limit */
426 	gd->dest_addr &= ~(0x10000 - 1);
427 
428 	gd->arch.tlb_addr = gd->dest_addr;
429 	debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
430 	      gd->arch.tlb_addr + gd->arch.tlb_size);
431 	return 0;
432 }
433 #endif
434 
435 #ifdef CONFIG_LCD
436 static int reserve_lcd(void)
437 {
438 #ifdef CONFIG_FB_ADDR
439 	gd->fb_base = CONFIG_FB_ADDR;
440 #else
441 	/* reserve memory for LCD display (always full pages) */
442 	gd->dest_addr = lcd_setmem(gd->dest_addr);
443 	gd->fb_base = gd->dest_addr;
444 #endif /* CONFIG_FB_ADDR */
445 	return 0;
446 }
447 #endif /* CONFIG_LCD */
448 
449 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
450 		&& !defined(CONFIG_ARM) && !defined(CONFIG_X86)
451 static int reserve_video(void)
452 {
453 	/* reserve memory for video display (always full pages) */
454 	gd->dest_addr = video_setmem(gd->dest_addr);
455 	gd->fb_base = gd->dest_addr;
456 
457 	return 0;
458 }
459 #endif
460 
461 static int reserve_uboot(void)
462 {
463 	/*
464 	 * reserve memory for U-Boot code, data & bss
465 	 * round down to next 4 kB limit
466 	 */
467 	gd->dest_addr -= gd->mon_len;
468 	gd->dest_addr &= ~(4096 - 1);
469 #ifdef CONFIG_E500
470 	/* round down to next 64 kB limit so that IVPR stays aligned */
471 	gd->dest_addr &= ~(65536 - 1);
472 #endif
473 
474 	debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
475 	      gd->dest_addr);
476 	return 0;
477 }
478 
479 #ifndef CONFIG_SPL_BUILD
480 /* reserve memory for malloc() area */
481 static int reserve_malloc(void)
482 {
483 	gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN;
484 	debug("Reserving %dk for malloc() at: %08lx\n",
485 			TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp);
486 	return 0;
487 }
488 
489 /* (permanently) allocate a Board Info struct */
490 static int reserve_board(void)
491 {
492 	gd->dest_addr_sp -= sizeof(bd_t);
493 	gd->bd = (bd_t *)map_sysmem(gd->dest_addr_sp, sizeof(bd_t));
494 	memset(gd->bd, '\0', sizeof(bd_t));
495 	debug("Reserving %zu Bytes for Board Info at: %08lx\n",
496 			sizeof(bd_t), gd->dest_addr_sp);
497 	return 0;
498 }
499 #endif
500 
501 static int setup_machine(void)
502 {
503 #ifdef CONFIG_MACH_TYPE
504 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
505 #endif
506 	return 0;
507 }
508 
509 static int reserve_global_data(void)
510 {
511 	gd->dest_addr_sp -= sizeof(gd_t);
512 	gd->new_gd = (gd_t *)map_sysmem(gd->dest_addr_sp, sizeof(gd_t));
513 	debug("Reserving %zu Bytes for Global Data at: %08lx\n",
514 			sizeof(gd_t), gd->dest_addr_sp);
515 	return 0;
516 }
517 
518 static int reserve_fdt(void)
519 {
520 	/*
521 	 * If the device tree is sitting immediate above our image then we
522 	 * must relocate it. If it is embedded in the data section, then it
523 	 * will be relocated with other data.
524 	 */
525 	if (gd->fdt_blob) {
526 		gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
527 
528 		gd->dest_addr_sp -= gd->fdt_size;
529 		gd->new_fdt = map_sysmem(gd->dest_addr_sp, gd->fdt_size);
530 		debug("Reserving %lu Bytes for FDT at: %08lx\n",
531 		      gd->fdt_size, gd->dest_addr_sp);
532 	}
533 
534 	return 0;
535 }
536 
537 static int reserve_stacks(void)
538 {
539 #ifdef CONFIG_SPL_BUILD
540 # ifdef CONFIG_ARM
541 	gd->dest_addr_sp -= 128;	/* leave 32 words for abort-stack */
542 	gd->irq_sp = gd->dest_addr_sp;
543 # endif
544 #else
545 # ifdef CONFIG_PPC
546 	ulong *s;
547 # endif
548 
549 	/* setup stack pointer for exceptions */
550 	gd->dest_addr_sp -= 16;
551 	gd->dest_addr_sp &= ~0xf;
552 	gd->irq_sp = gd->dest_addr_sp;
553 
554 	/*
555 	 * Handle architecture-specific things here
556 	 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
557 	 * to handle this and put in arch/xxx/lib/stack.c
558 	 */
559 # ifdef CONFIG_ARM
560 #  ifdef CONFIG_USE_IRQ
561 	gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
562 	debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
563 		CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp);
564 
565 	/* 8-byte alignment for ARM ABI compliance */
566 	gd->dest_addr_sp &= ~0x07;
567 #  endif
568 	/* leave 3 words for abort-stack, plus 1 for alignment */
569 	gd->dest_addr_sp -= 16;
570 # elif defined(CONFIG_PPC)
571 	/* Clear initial stack frame */
572 	s = (ulong *) gd->dest_addr_sp;
573 	*s = 0; /* Terminate back chain */
574 	*++s = 0; /* NULL return address */
575 # endif /* Architecture specific code */
576 
577 	return 0;
578 #endif
579 }
580 
581 static int display_new_sp(void)
582 {
583 	debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp);
584 
585 	return 0;
586 }
587 
588 #ifdef CONFIG_PPC
589 static int setup_board_part1(void)
590 {
591 	bd_t *bd = gd->bd;
592 
593 	/*
594 	 * Save local variables to board info struct
595 	 */
596 
597 	bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;	/* start of memory */
598 	bd->bi_memsize = gd->ram_size;			/* size in bytes */
599 
600 #ifdef CONFIG_SYS_SRAM_BASE
601 	bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;	/* start of SRAM */
602 	bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;		/* size  of SRAM */
603 #endif
604 
605 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
606 		defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
607 	bd->bi_immr_base = CONFIG_SYS_IMMR;	/* base  of IMMR register     */
608 #endif
609 #if defined(CONFIG_MPC5xxx)
610 	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
611 #endif
612 #if defined(CONFIG_MPC83xx)
613 	bd->bi_immrbar = CONFIG_SYS_IMMR;
614 #endif
615 #if defined(CONFIG_MPC8220)
616 	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
617 	bd->bi_inpfreq = gd->arch.inp_clk;
618 	bd->bi_pcifreq = gd->pci_clk;
619 	bd->bi_vcofreq = gd->arch.vco_clk;
620 	bd->bi_pevfreq = gd->arch.pev_clk;
621 	bd->bi_flbfreq = gd->arch.flb_clk;
622 
623 	/* store bootparam to sram (backward compatible), here? */
624 	{
625 		u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
626 
627 		*sram++ = gd->ram_size;
628 		*sram++ = gd->bus_clk;
629 		*sram++ = gd->arch.inp_clk;
630 		*sram++ = gd->cpu_clk;
631 		*sram++ = gd->arch.vco_clk;
632 		*sram++ = gd->arch.flb_clk;
633 		*sram++ = 0xb8c3ba11;	/* boot signature */
634 	}
635 #endif
636 
637 	return 0;
638 }
639 
640 static int setup_board_part2(void)
641 {
642 	bd_t *bd = gd->bd;
643 
644 	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
645 	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
646 #if defined(CONFIG_CPM2)
647 	bd->bi_cpmfreq = gd->arch.cpm_clk;
648 	bd->bi_brgfreq = gd->arch.brg_clk;
649 	bd->bi_sccfreq = gd->arch.scc_clk;
650 	bd->bi_vco = gd->arch.vco_out;
651 #endif /* CONFIG_CPM2 */
652 #if defined(CONFIG_MPC512X)
653 	bd->bi_ipsfreq = gd->arch.ips_clk;
654 #endif /* CONFIG_MPC512X */
655 #if defined(CONFIG_MPC5xxx)
656 	bd->bi_ipbfreq = gd->arch.ipb_clk;
657 	bd->bi_pcifreq = gd->pci_clk;
658 #endif /* CONFIG_MPC5xxx */
659 
660 	return 0;
661 }
662 #endif
663 
664 #ifdef CONFIG_SYS_EXTBDINFO
665 static int setup_board_extra(void)
666 {
667 	bd_t *bd = gd->bd;
668 
669 	strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
670 	strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
671 		sizeof(bd->bi_r_version));
672 
673 	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
674 	bd->bi_plb_busfreq = gd->bus_clk;
675 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
676 		defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
677 		defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
678 	bd->bi_pci_busfreq = get_PCI_freq();
679 	bd->bi_opbfreq = get_OPB_freq();
680 #elif defined(CONFIG_XILINX_405)
681 	bd->bi_pci_busfreq = get_PCI_freq();
682 #endif
683 
684 	return 0;
685 }
686 #endif
687 
688 #ifdef CONFIG_POST
689 static int init_post(void)
690 {
691 	post_bootmode_init();
692 	post_run(NULL, POST_ROM | post_bootmode_get(0));
693 
694 	return 0;
695 }
696 #endif
697 
698 static int setup_baud_rate(void)
699 {
700 	/* Ick, can we get rid of this line? */
701 	gd->bd->bi_baudrate = gd->baudrate;
702 
703 	return 0;
704 }
705 
706 static int setup_dram_config(void)
707 {
708 	/* Ram is board specific, so move it to board code ... */
709 	dram_init_banksize();
710 
711 	return 0;
712 }
713 
714 static int reloc_fdt(void)
715 {
716 	if (gd->new_fdt) {
717 		memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
718 		gd->fdt_blob = gd->new_fdt;
719 	}
720 
721 	return 0;
722 }
723 
724 static int setup_reloc(void)
725 {
726 	gd->relocaddr = gd->dest_addr;
727 	gd->start_addr_sp = gd->dest_addr_sp;
728 	gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE;
729 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
730 
731 	debug("Relocation Offset is: %08lx\n", gd->reloc_off);
732 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
733 	      gd->dest_addr, (ulong)map_to_sysmem(gd->new_gd),
734 	      gd->dest_addr_sp);
735 
736 	return 0;
737 }
738 
739 /* ARM calls relocate_code from its crt0.S */
740 #if !defined(CONFIG_ARM)
741 
742 static int jump_to_copy(void)
743 {
744 	/*
745 	 * x86 is special, but in a nice way. It uses a trampoline which
746 	 * enables the dcache if possible.
747 	 *
748 	 * For now, other archs use relocate_code(), which is implemented
749 	 * similarly for all archs. When we do generic relocation, hopefully
750 	 * we can make all archs enable the dcache prior to relocation.
751 	 */
752 #ifdef CONFIG_X86
753 	/*
754 	 * SDRAM and console are now initialised. The final stack can now
755 	 * be setup in SDRAM. Code execution will continue in Flash, but
756 	 * with the stack in SDRAM and Global Data in temporary memory
757 	 * (CPU cache)
758 	 */
759 	board_init_f_r_trampoline(gd->start_addr_sp);
760 #elif defined(CONFIG_SANDBOX)
761 	board_init_r(gd->new_gd, 0);
762 #else
763 	relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr);
764 #endif
765 
766 	return 0;
767 }
768 #endif
769 
770 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
771 static int mark_bootstage(void)
772 {
773 	bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
774 
775 	return 0;
776 }
777 
778 static init_fnc_t init_sequence_f[] = {
779 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
780 		!defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
781 		!defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
782 	zero_global_data,
783 #endif
784 #ifdef CONFIG_SANDBOX
785 	setup_ram_buf,
786 #endif
787 	setup_fdt,
788 	setup_mon_len,
789 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
790 	/* TODO: can this go into arch_cpu_init()? */
791 	probecpu,
792 #endif
793 	arch_cpu_init,		/* basic arch cpu dependent setup */
794 #ifdef CONFIG_X86
795 	cpu_init_f,		/* TODO(sjg@chromium.org): remove */
796 # ifdef CONFIG_OF_CONTROL
797 	find_fdt,		/* TODO(sjg@chromium.org): remove */
798 # endif
799 #endif
800 	mark_bootstage,
801 #ifdef CONFIG_OF_CONTROL
802 	fdtdec_check_fdt,
803 #endif
804 #if defined(CONFIG_BOARD_EARLY_INIT_F)
805 	board_early_init_f,
806 #endif
807 	/* TODO: can any of this go into arch_cpu_init()? */
808 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
809 	get_clocks,		/* get CPU and bus clocks (etc.) */
810 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
811 		&& !defined(CONFIG_TQM885D)
812 	adjust_sdram_tbs_8xx,
813 #endif
814 	/* TODO: can we rename this to timer_init()? */
815 	init_timebase,
816 #endif
817 #ifdef CONFIG_ARM
818 	timer_init,		/* initialize timer */
819 #endif
820 #ifdef CONFIG_BOARD_POSTCLK_INIT
821 	board_postclk_init,
822 #endif
823 #ifdef CONFIG_FSL_ESDHC
824 	get_clocks,
825 #endif
826 #ifdef CONFIG_SYS_ALLOC_DPRAM
827 #if !defined(CONFIG_CPM2)
828 	dpram_init,
829 #endif
830 #endif
831 #if defined(CONFIG_BOARD_POSTCLK_INIT)
832 	board_postclk_init,
833 #endif
834 	env_init,		/* initialize environment */
835 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
836 	/* get CPU and bus clocks according to the environment variable */
837 	get_clocks_866,
838 	/* adjust sdram refresh rate according to the new clock */
839 	sdram_adjust_866,
840 	init_timebase,
841 #endif
842 	init_baud_rate,		/* initialze baudrate settings */
843 	serial_init,		/* serial communications setup */
844 	console_init_f,		/* stage 1 init of console */
845 #ifdef CONFIG_SANDBOX
846 	sandbox_early_getopt_check,
847 #endif
848 #ifdef CONFIG_OF_CONTROL
849 	fdtdec_prepare_fdt,
850 #endif
851 	display_options,	/* say that we are here */
852 	display_text_info,	/* show debugging info if required */
853 #if defined(CONFIG_8260)
854 	prt_8260_rsr,
855 	prt_8260_clks,
856 #endif /* CONFIG_8260 */
857 #if defined(CONFIG_MPC83xx)
858 	prt_83xx_rsr,
859 #endif
860 #ifdef CONFIG_PPC
861 	checkcpu,
862 #endif
863 #if defined(CONFIG_DISPLAY_CPUINFO)
864 	print_cpuinfo,		/* display cpu info (and speed) */
865 #endif
866 #if defined(CONFIG_MPC5xxx)
867 	prt_mpc5xxx_clks,
868 #endif /* CONFIG_MPC5xxx */
869 #if defined(CONFIG_MPC8220)
870 	prt_mpc8220_clks,
871 #endif
872 #if defined(CONFIG_DISPLAY_BOARDINFO)
873 	checkboard,		/* display board info */
874 #endif
875 	INIT_FUNC_WATCHDOG_INIT
876 #if defined(CONFIG_MISC_INIT_F)
877 	misc_init_f,
878 #endif
879 	INIT_FUNC_WATCHDOG_RESET
880 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
881 	init_func_i2c,
882 #endif
883 #if defined(CONFIG_HARD_SPI)
884 	init_func_spi,
885 #endif
886 #ifdef CONFIG_X86
887 	dram_init_f,		/* configure available RAM banks */
888 	calculate_relocation_address,
889 #endif
890 	announce_dram_init,
891 	/* TODO: unify all these dram functions? */
892 #ifdef CONFIG_ARM
893 	dram_init,		/* configure available RAM banks */
894 #endif
895 #ifdef CONFIG_PPC
896 	init_func_ram,
897 #endif
898 #ifdef CONFIG_POST
899 	post_init_f,
900 #endif
901 	INIT_FUNC_WATCHDOG_RESET
902 #if defined(CONFIG_SYS_DRAM_TEST)
903 	testdram,
904 #endif /* CONFIG_SYS_DRAM_TEST */
905 	INIT_FUNC_WATCHDOG_RESET
906 
907 #ifdef CONFIG_POST
908 	init_post,
909 #endif
910 	INIT_FUNC_WATCHDOG_RESET
911 	/*
912 	 * Now that we have DRAM mapped and working, we can
913 	 * relocate the code and continue running from DRAM.
914 	 *
915 	 * Reserve memory at end of RAM for (top down in that order):
916 	 *  - area that won't get touched by U-Boot and Linux (optional)
917 	 *  - kernel log buffer
918 	 *  - protected RAM
919 	 *  - LCD framebuffer
920 	 *  - monitor code
921 	 *  - board info struct
922 	 */
923 	setup_dest_addr,
924 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
925 	reserve_logbuffer,
926 #endif
927 #ifdef CONFIG_PRAM
928 	reserve_pram,
929 #endif
930 	reserve_round_4k,
931 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
932 		defined(CONFIG_ARM)
933 	reserve_mmu,
934 #endif
935 #ifdef CONFIG_LCD
936 	reserve_lcd,
937 #endif
938 	/* TODO: Why the dependency on CONFIG_8xx? */
939 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
940 		&& !defined(CONFIG_ARM) && !defined(CONFIG_X86)
941 	reserve_video,
942 #endif
943 	reserve_uboot,
944 #ifndef CONFIG_SPL_BUILD
945 	reserve_malloc,
946 	reserve_board,
947 #endif
948 	setup_machine,
949 	reserve_global_data,
950 	reserve_fdt,
951 	reserve_stacks,
952 	setup_dram_config,
953 	show_dram_config,
954 #ifdef CONFIG_PPC
955 	setup_board_part1,
956 	INIT_FUNC_WATCHDOG_RESET
957 	setup_board_part2,
958 #endif
959 	setup_baud_rate,
960 	display_new_sp,
961 #ifdef CONFIG_SYS_EXTBDINFO
962 	setup_board_extra,
963 #endif
964 	INIT_FUNC_WATCHDOG_RESET
965 	reloc_fdt,
966 	setup_reloc,
967 #ifndef CONFIG_ARM
968 	jump_to_copy,
969 #endif
970 	NULL,
971 };
972 
973 void board_init_f(ulong boot_flags)
974 {
975 #ifndef CONFIG_X86
976 	gd_t data;
977 
978 	gd = &data;
979 #endif
980 
981 	gd->flags = boot_flags;
982 
983 	if (initcall_run_list(init_sequence_f))
984 		hang();
985 
986 #ifndef CONFIG_ARM
987 	/* NOTREACHED - jump_to_copy() does not return */
988 	hang();
989 #endif
990 }
991 
992 #ifdef CONFIG_X86
993 /*
994  * For now this code is only used on x86.
995  *
996  * init_sequence_f_r is the list of init functions which are run when
997  * U-Boot is executing from Flash with a semi-limited 'C' environment.
998  * The following limitations must be considered when implementing an
999  * '_f_r' function:
1000  *  - 'static' variables are read-only
1001  *  - Global Data (gd->xxx) is read/write
1002  *
1003  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1004  * supported).  It _should_, if possible, copy global data to RAM and
1005  * initialise the CPU caches (to speed up the relocation process)
1006  *
1007  * NOTE: At present only x86 uses this route, but it is intended that
1008  * all archs will move to this when generic relocation is implemented.
1009  */
1010 static init_fnc_t init_sequence_f_r[] = {
1011 	init_cache_f_r,
1012 	copy_uboot_to_ram,
1013 	clear_bss,
1014 	do_elf_reloc_fixups,
1015 
1016 	NULL,
1017 };
1018 
1019 void board_init_f_r(void)
1020 {
1021 	if (initcall_run_list(init_sequence_f_r))
1022 		hang();
1023 
1024 	/*
1025 	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1026 	 * Transfer execution from Flash to RAM by calculating the address
1027 	 * of the in-RAM copy of board_init_r() and calling it
1028 	 */
1029 	(board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1030 
1031 	/* NOTREACHED - board_init_r() does not return */
1032 	hang();
1033 }
1034 #endif /* CONFIG_X86 */
1035 
1036 void hang(void)
1037 {
1038 	puts("### ERROR ### Please RESET the board ###\n");
1039 #ifdef CONFIG_SANDBOX
1040 	os_exit(0);
1041 #else
1042 	for (;;);
1043 #endif
1044 }
1045