1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <console.h> 15 #include <environment.h> 16 #include <dm.h> 17 #include <fdtdec.h> 18 #include <fs.h> 19 #include <i2c.h> 20 #include <initcall.h> 21 #include <init_helpers.h> 22 #include <logbuff.h> 23 #include <malloc.h> 24 #include <mapmem.h> 25 26 /* TODO: Can we move these into arch/ headers? */ 27 #ifdef CONFIG_8xx 28 #include <mpc8xx.h> 29 #endif 30 #ifdef CONFIG_5xx 31 #include <mpc5xx.h> 32 #endif 33 #ifdef CONFIG_MPC5xxx 34 #include <mpc5xxx.h> 35 #endif 36 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 37 #include <asm/mp.h> 38 #endif 39 40 #include <os.h> 41 #include <post.h> 42 #include <spi.h> 43 #include <status_led.h> 44 #include <timer.h> 45 #include <trace.h> 46 #include <video.h> 47 #include <watchdog.h> 48 #include <asm/io.h> 49 #include <asm/sections.h> 50 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 51 #include <asm/relocate.h> 52 #endif 53 #include <dm/root.h> 54 #include <linux/errno.h> 55 56 /* 57 * Pointer to initial global data area 58 * 59 * Here we initialize it if needed. 60 */ 61 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 62 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 63 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 64 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 65 #else 66 DECLARE_GLOBAL_DATA_PTR; 67 #endif 68 69 /* 70 * TODO(sjg@chromium.org): IMO this code should be 71 * refactored to a single function, something like: 72 * 73 * void led_set_state(enum led_colour_t colour, int on); 74 */ 75 /************************************************************************ 76 * Coloured LED functionality 77 ************************************************************************ 78 * May be supplied by boards if desired 79 */ 80 __weak void coloured_LED_init(void) {} 81 __weak void red_led_on(void) {} 82 __weak void red_led_off(void) {} 83 __weak void green_led_on(void) {} 84 __weak void green_led_off(void) {} 85 __weak void yellow_led_on(void) {} 86 __weak void yellow_led_off(void) {} 87 __weak void blue_led_on(void) {} 88 __weak void blue_led_off(void) {} 89 90 /* 91 * Why is gd allocated a register? Prior to reloc it might be better to 92 * just pass it around to each function in this file? 93 * 94 * After reloc one could argue that it is hardly used and doesn't need 95 * to be in a register. Or if it is it should perhaps hold pointers to all 96 * global data for all modules, so that post-reloc we can avoid the massive 97 * literal pool we get on ARM. Or perhaps just encourage each module to use 98 * a structure... 99 */ 100 101 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 102 static int init_func_watchdog_init(void) 103 { 104 # if defined(CONFIG_HW_WATCHDOG) && \ 105 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 106 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 107 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 108 defined(CONFIG_IMX_WATCHDOG)) 109 hw_watchdog_init(); 110 puts(" Watchdog enabled\n"); 111 # endif 112 WATCHDOG_RESET(); 113 114 return 0; 115 } 116 117 int init_func_watchdog_reset(void) 118 { 119 WATCHDOG_RESET(); 120 121 return 0; 122 } 123 #endif /* CONFIG_WATCHDOG */ 124 125 __weak void board_add_ram_info(int use_default) 126 { 127 /* please define platform specific board_add_ram_info() */ 128 } 129 130 static int init_baud_rate(void) 131 { 132 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 133 return 0; 134 } 135 136 static int display_text_info(void) 137 { 138 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 139 ulong bss_start, bss_end, text_base; 140 141 bss_start = (ulong)&__bss_start; 142 bss_end = (ulong)&__bss_end; 143 144 #ifdef CONFIG_SYS_TEXT_BASE 145 text_base = CONFIG_SYS_TEXT_BASE; 146 #else 147 text_base = CONFIG_SYS_MONITOR_BASE; 148 #endif 149 150 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 151 text_base, bss_start, bss_end); 152 #endif 153 154 #ifdef CONFIG_USE_IRQ 155 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 156 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 157 #endif 158 159 return 0; 160 } 161 162 static int announce_dram_init(void) 163 { 164 puts("DRAM: "); 165 return 0; 166 } 167 168 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 169 static int init_func_ram(void) 170 { 171 return initdram(); 172 } 173 #endif 174 175 static int show_dram_config(void) 176 { 177 unsigned long long size; 178 179 #ifdef CONFIG_NR_DRAM_BANKS 180 int i; 181 182 debug("\nRAM Configuration:\n"); 183 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 184 size += gd->bd->bi_dram[i].size; 185 debug("Bank #%d: %llx ", i, 186 (unsigned long long)(gd->bd->bi_dram[i].start)); 187 #ifdef DEBUG 188 print_size(gd->bd->bi_dram[i].size, "\n"); 189 #endif 190 } 191 debug("\nDRAM: "); 192 #else 193 size = gd->ram_size; 194 #endif 195 196 print_size(size, ""); 197 board_add_ram_info(0); 198 putc('\n'); 199 200 return 0; 201 } 202 203 __weak int dram_init_banksize(void) 204 { 205 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 206 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 207 gd->bd->bi_dram[0].size = get_effective_memsize(); 208 #endif 209 210 return 0; 211 } 212 213 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 214 static int init_func_i2c(void) 215 { 216 puts("I2C: "); 217 #ifdef CONFIG_SYS_I2C 218 i2c_init_all(); 219 #else 220 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 221 #endif 222 puts("ready\n"); 223 return 0; 224 } 225 #endif 226 227 #if defined(CONFIG_HARD_SPI) 228 static int init_func_spi(void) 229 { 230 puts("SPI: "); 231 spi_init(); 232 puts("ready\n"); 233 return 0; 234 } 235 #endif 236 237 __maybe_unused 238 static int zero_global_data(void) 239 { 240 memset((void *)gd, '\0', sizeof(gd_t)); 241 242 return 0; 243 } 244 245 static int setup_mon_len(void) 246 { 247 #if defined(__ARM__) || defined(__MICROBLAZE__) 248 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 249 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 250 gd->mon_len = (ulong)&_end - (ulong)_init; 251 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 252 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 253 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 254 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 255 #elif defined(CONFIG_SYS_MONITOR_BASE) 256 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 257 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 258 #endif 259 return 0; 260 } 261 262 __weak int arch_cpu_init(void) 263 { 264 return 0; 265 } 266 267 __weak int mach_cpu_init(void) 268 { 269 return 0; 270 } 271 272 /* Get the top of usable RAM */ 273 __weak ulong board_get_usable_ram_top(ulong total_size) 274 { 275 #ifdef CONFIG_SYS_SDRAM_BASE 276 /* 277 * Detect whether we have so much RAM that it goes past the end of our 278 * 32-bit address space. If so, clip the usable RAM so it doesn't. 279 */ 280 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 281 /* 282 * Will wrap back to top of 32-bit space when reservations 283 * are made. 284 */ 285 return 0; 286 #endif 287 return gd->ram_top; 288 } 289 290 static int setup_dest_addr(void) 291 { 292 debug("Monitor len: %08lX\n", gd->mon_len); 293 /* 294 * Ram is setup, size stored in gd !! 295 */ 296 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 297 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 298 /* 299 * Subtract specified amount of memory to hide so that it won't 300 * get "touched" at all by U-Boot. By fixing up gd->ram_size 301 * the Linux kernel should now get passed the now "corrected" 302 * memory size and won't touch it either. This should work 303 * for arch/ppc and arch/powerpc. Only Linux board ports in 304 * arch/powerpc with bootwrapper support, that recalculate the 305 * memory size from the SDRAM controller setup will have to 306 * get fixed. 307 */ 308 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 309 #endif 310 #ifdef CONFIG_SYS_SDRAM_BASE 311 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 312 #endif 313 gd->ram_top += get_effective_memsize(); 314 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 315 gd->relocaddr = gd->ram_top; 316 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 317 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 318 /* 319 * We need to make sure the location we intend to put secondary core 320 * boot code is reserved and not used by any part of u-boot 321 */ 322 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 323 gd->relocaddr = determine_mp_bootpg(NULL); 324 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 325 } 326 #endif 327 return 0; 328 } 329 330 #if defined(CONFIG_LOGBUFFER) 331 static int reserve_logbuffer(void) 332 { 333 #ifndef CONFIG_ALT_LB_ADDR 334 /* reserve kernel log buffer */ 335 gd->relocaddr -= LOGBUFF_RESERVE; 336 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 337 gd->relocaddr); 338 #endif 339 340 return 0; 341 } 342 #endif 343 344 #ifdef CONFIG_PRAM 345 /* reserve protected RAM */ 346 static int reserve_pram(void) 347 { 348 ulong reg; 349 350 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 351 gd->relocaddr -= (reg << 10); /* size is in kB */ 352 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 353 gd->relocaddr); 354 return 0; 355 } 356 #endif /* CONFIG_PRAM */ 357 358 /* Round memory pointer down to next 4 kB limit */ 359 static int reserve_round_4k(void) 360 { 361 gd->relocaddr &= ~(4096 - 1); 362 return 0; 363 } 364 365 #ifdef CONFIG_ARM 366 static int reserve_mmu(void) 367 { 368 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 369 /* reserve TLB table */ 370 gd->arch.tlb_size = PGTABLE_SIZE; 371 gd->relocaddr -= gd->arch.tlb_size; 372 373 /* round down to next 64 kB limit */ 374 gd->relocaddr &= ~(0x10000 - 1); 375 376 gd->arch.tlb_addr = gd->relocaddr; 377 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 378 gd->arch.tlb_addr + gd->arch.tlb_size); 379 380 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 381 /* 382 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 383 * with location within secure ram. 384 */ 385 gd->arch.tlb_allocated = gd->arch.tlb_addr; 386 #endif 387 #endif 388 389 return 0; 390 } 391 #endif 392 393 static int reserve_video(void) 394 { 395 #ifdef CONFIG_DM_VIDEO 396 ulong addr; 397 int ret; 398 399 addr = gd->relocaddr; 400 ret = video_reserve(&addr); 401 if (ret) 402 return ret; 403 gd->relocaddr = addr; 404 #elif defined(CONFIG_LCD) 405 # ifdef CONFIG_FB_ADDR 406 gd->fb_base = CONFIG_FB_ADDR; 407 # else 408 /* reserve memory for LCD display (always full pages) */ 409 gd->relocaddr = lcd_setmem(gd->relocaddr); 410 gd->fb_base = gd->relocaddr; 411 # endif /* CONFIG_FB_ADDR */ 412 #elif defined(CONFIG_VIDEO) && \ 413 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 414 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 415 !defined(CONFIG_M68K) 416 /* reserve memory for video display (always full pages) */ 417 gd->relocaddr = video_setmem(gd->relocaddr); 418 gd->fb_base = gd->relocaddr; 419 #endif 420 421 return 0; 422 } 423 424 static int reserve_trace(void) 425 { 426 #ifdef CONFIG_TRACE 427 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 428 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 429 debug("Reserving %dk for trace data at: %08lx\n", 430 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 431 #endif 432 433 return 0; 434 } 435 436 static int reserve_uboot(void) 437 { 438 /* 439 * reserve memory for U-Boot code, data & bss 440 * round down to next 4 kB limit 441 */ 442 gd->relocaddr -= gd->mon_len; 443 gd->relocaddr &= ~(4096 - 1); 444 #ifdef CONFIG_E500 445 /* round down to next 64 kB limit so that IVPR stays aligned */ 446 gd->relocaddr &= ~(65536 - 1); 447 #endif 448 449 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 450 gd->relocaddr); 451 452 gd->start_addr_sp = gd->relocaddr; 453 454 return 0; 455 } 456 457 /* reserve memory for malloc() area */ 458 static int reserve_malloc(void) 459 { 460 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 461 debug("Reserving %dk for malloc() at: %08lx\n", 462 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 463 return 0; 464 } 465 466 /* (permanently) allocate a Board Info struct */ 467 static int reserve_board(void) 468 { 469 if (!gd->bd) { 470 gd->start_addr_sp -= sizeof(bd_t); 471 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 472 memset(gd->bd, '\0', sizeof(bd_t)); 473 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 474 sizeof(bd_t), gd->start_addr_sp); 475 } 476 return 0; 477 } 478 479 static int setup_machine(void) 480 { 481 #ifdef CONFIG_MACH_TYPE 482 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 483 #endif 484 return 0; 485 } 486 487 static int reserve_global_data(void) 488 { 489 gd->start_addr_sp -= sizeof(gd_t); 490 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 491 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 492 sizeof(gd_t), gd->start_addr_sp); 493 return 0; 494 } 495 496 static int reserve_fdt(void) 497 { 498 #ifndef CONFIG_OF_EMBED 499 /* 500 * If the device tree is sitting immediately above our image then we 501 * must relocate it. If it is embedded in the data section, then it 502 * will be relocated with other data. 503 */ 504 if (gd->fdt_blob) { 505 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 506 507 gd->start_addr_sp -= gd->fdt_size; 508 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 509 debug("Reserving %lu Bytes for FDT at: %08lx\n", 510 gd->fdt_size, gd->start_addr_sp); 511 } 512 #endif 513 514 return 0; 515 } 516 517 int arch_reserve_stacks(void) 518 { 519 return 0; 520 } 521 522 static int reserve_stacks(void) 523 { 524 /* make stack pointer 16-byte aligned */ 525 gd->start_addr_sp -= 16; 526 gd->start_addr_sp &= ~0xf; 527 528 /* 529 * let the architecture-specific code tailor gd->start_addr_sp and 530 * gd->irq_sp 531 */ 532 return arch_reserve_stacks(); 533 } 534 535 static int display_new_sp(void) 536 { 537 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 538 539 return 0; 540 } 541 542 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 543 defined(CONFIG_SH) 544 static int setup_board_part1(void) 545 { 546 bd_t *bd = gd->bd; 547 548 /* 549 * Save local variables to board info struct 550 */ 551 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 552 bd->bi_memsize = gd->ram_size; /* size in bytes */ 553 554 #ifdef CONFIG_SYS_SRAM_BASE 555 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 556 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 557 #endif 558 559 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 560 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 561 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 562 #endif 563 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 564 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 565 #endif 566 #if defined(CONFIG_MPC83xx) 567 bd->bi_immrbar = CONFIG_SYS_IMMR; 568 #endif 569 570 return 0; 571 } 572 #endif 573 574 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 575 static int setup_board_part2(void) 576 { 577 bd_t *bd = gd->bd; 578 579 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 580 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 581 #if defined(CONFIG_CPM2) 582 bd->bi_cpmfreq = gd->arch.cpm_clk; 583 bd->bi_brgfreq = gd->arch.brg_clk; 584 bd->bi_sccfreq = gd->arch.scc_clk; 585 bd->bi_vco = gd->arch.vco_out; 586 #endif /* CONFIG_CPM2 */ 587 #if defined(CONFIG_MPC512X) 588 bd->bi_ipsfreq = gd->arch.ips_clk; 589 #endif /* CONFIG_MPC512X */ 590 #if defined(CONFIG_MPC5xxx) 591 bd->bi_ipbfreq = gd->arch.ipb_clk; 592 bd->bi_pcifreq = gd->pci_clk; 593 #endif /* CONFIG_MPC5xxx */ 594 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 595 bd->bi_pcifreq = gd->pci_clk; 596 #endif 597 #if defined(CONFIG_EXTRA_CLOCK) 598 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 599 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 600 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 601 #endif 602 603 return 0; 604 } 605 #endif 606 607 #ifdef CONFIG_POST 608 static int init_post(void) 609 { 610 post_bootmode_init(); 611 post_run(NULL, POST_ROM | post_bootmode_get(0)); 612 613 return 0; 614 } 615 #endif 616 617 static int reloc_fdt(void) 618 { 619 #ifndef CONFIG_OF_EMBED 620 if (gd->flags & GD_FLG_SKIP_RELOC) 621 return 0; 622 if (gd->new_fdt) { 623 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 624 gd->fdt_blob = gd->new_fdt; 625 } 626 #endif 627 628 return 0; 629 } 630 631 static int setup_reloc(void) 632 { 633 if (gd->flags & GD_FLG_SKIP_RELOC) { 634 debug("Skipping relocation due to flag\n"); 635 return 0; 636 } 637 638 #ifdef CONFIG_SYS_TEXT_BASE 639 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 640 #ifdef CONFIG_M68K 641 /* 642 * On all ColdFire arch cpu, monitor code starts always 643 * just after the default vector table location, so at 0x400 644 */ 645 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 646 #endif 647 #endif 648 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 649 650 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 651 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 652 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 653 gd->start_addr_sp); 654 655 return 0; 656 } 657 658 #ifdef CONFIG_OF_BOARD_FIXUP 659 static int fix_fdt(void) 660 { 661 return board_fix_fdt((void *)gd->fdt_blob); 662 } 663 #endif 664 665 /* ARM calls relocate_code from its crt0.S */ 666 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 667 !CONFIG_IS_ENABLED(X86_64) 668 669 static int jump_to_copy(void) 670 { 671 if (gd->flags & GD_FLG_SKIP_RELOC) 672 return 0; 673 /* 674 * x86 is special, but in a nice way. It uses a trampoline which 675 * enables the dcache if possible. 676 * 677 * For now, other archs use relocate_code(), which is implemented 678 * similarly for all archs. When we do generic relocation, hopefully 679 * we can make all archs enable the dcache prior to relocation. 680 */ 681 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 682 /* 683 * SDRAM and console are now initialised. The final stack can now 684 * be setup in SDRAM. Code execution will continue in Flash, but 685 * with the stack in SDRAM and Global Data in temporary memory 686 * (CPU cache) 687 */ 688 arch_setup_gd(gd->new_gd); 689 board_init_f_r_trampoline(gd->start_addr_sp); 690 #else 691 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 692 #endif 693 694 return 0; 695 } 696 #endif 697 698 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 699 static int mark_bootstage(void) 700 { 701 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 702 703 return 0; 704 } 705 706 static int initf_console_record(void) 707 { 708 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 709 return console_record_init(); 710 #else 711 return 0; 712 #endif 713 } 714 715 static int initf_dm(void) 716 { 717 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 718 int ret; 719 720 ret = dm_init_and_scan(true); 721 if (ret) 722 return ret; 723 #endif 724 #ifdef CONFIG_TIMER_EARLY 725 ret = dm_timer_init(); 726 if (ret) 727 return ret; 728 #endif 729 730 return 0; 731 } 732 733 /* Architecture-specific memory reservation */ 734 __weak int reserve_arch(void) 735 { 736 return 0; 737 } 738 739 __weak int arch_cpu_init_dm(void) 740 { 741 return 0; 742 } 743 744 static const init_fnc_t init_sequence_f[] = { 745 setup_mon_len, 746 #ifdef CONFIG_OF_CONTROL 747 fdtdec_setup, 748 #endif 749 #ifdef CONFIG_TRACE 750 trace_early_init, 751 #endif 752 initf_malloc, 753 initf_console_record, 754 #if defined(CONFIG_HAVE_FSP) 755 arch_fsp_init, 756 #endif 757 arch_cpu_init, /* basic arch cpu dependent setup */ 758 mach_cpu_init, /* SoC/machine dependent CPU setup */ 759 initf_dm, 760 arch_cpu_init_dm, 761 mark_bootstage, /* need timer, go after init dm */ 762 #if defined(CONFIG_BOARD_EARLY_INIT_F) 763 board_early_init_f, 764 #endif 765 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 766 /* get CPU and bus clocks according to the environment variable */ 767 get_clocks, /* get CPU and bus clocks (etc.) */ 768 #endif 769 timer_init, /* initialize timer */ 770 #if defined(CONFIG_BOARD_POSTCLK_INIT) 771 board_postclk_init, 772 #endif 773 env_init, /* initialize environment */ 774 init_baud_rate, /* initialze baudrate settings */ 775 serial_init, /* serial communications setup */ 776 console_init_f, /* stage 1 init of console */ 777 display_options, /* say that we are here */ 778 display_text_info, /* show debugging info if required */ 779 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 780 defined(CONFIG_X86) 781 checkcpu, 782 #endif 783 #if defined(CONFIG_DISPLAY_CPUINFO) 784 print_cpuinfo, /* display cpu info (and speed) */ 785 #endif 786 #if defined(CONFIG_DISPLAY_BOARDINFO) 787 show_board_info, 788 #endif 789 INIT_FUNC_WATCHDOG_INIT 790 #if defined(CONFIG_MISC_INIT_F) 791 misc_init_f, 792 #endif 793 INIT_FUNC_WATCHDOG_RESET 794 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 795 init_func_i2c, 796 #endif 797 #if defined(CONFIG_HARD_SPI) 798 init_func_spi, 799 #endif 800 announce_dram_init, 801 /* TODO: unify all these dram functions? */ 802 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 803 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 804 defined(CONFIG_SH) 805 dram_init, /* configure available RAM banks */ 806 #endif 807 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 808 init_func_ram, 809 #endif 810 #ifdef CONFIG_POST 811 post_init_f, 812 #endif 813 INIT_FUNC_WATCHDOG_RESET 814 #if defined(CONFIG_SYS_DRAM_TEST) 815 testdram, 816 #endif /* CONFIG_SYS_DRAM_TEST */ 817 INIT_FUNC_WATCHDOG_RESET 818 819 #ifdef CONFIG_POST 820 init_post, 821 #endif 822 INIT_FUNC_WATCHDOG_RESET 823 /* 824 * Now that we have DRAM mapped and working, we can 825 * relocate the code and continue running from DRAM. 826 * 827 * Reserve memory at end of RAM for (top down in that order): 828 * - area that won't get touched by U-Boot and Linux (optional) 829 * - kernel log buffer 830 * - protected RAM 831 * - LCD framebuffer 832 * - monitor code 833 * - board info struct 834 */ 835 setup_dest_addr, 836 #if defined(CONFIG_LOGBUFFER) 837 reserve_logbuffer, 838 #endif 839 #ifdef CONFIG_PRAM 840 reserve_pram, 841 #endif 842 reserve_round_4k, 843 #ifdef CONFIG_ARM 844 reserve_mmu, 845 #endif 846 reserve_video, 847 reserve_trace, 848 reserve_uboot, 849 reserve_malloc, 850 reserve_board, 851 setup_machine, 852 reserve_global_data, 853 reserve_fdt, 854 reserve_arch, 855 reserve_stacks, 856 dram_init_banksize, 857 show_dram_config, 858 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 859 defined(CONFIG_SH) 860 setup_board_part1, 861 #endif 862 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 863 INIT_FUNC_WATCHDOG_RESET 864 setup_board_part2, 865 #endif 866 display_new_sp, 867 #ifdef CONFIG_SYS_EXTBDINFO 868 setup_board_extra, 869 #endif 870 #ifdef CONFIG_OF_BOARD_FIXUP 871 fix_fdt, 872 #endif 873 INIT_FUNC_WATCHDOG_RESET 874 reloc_fdt, 875 setup_reloc, 876 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 877 copy_uboot_to_ram, 878 do_elf_reloc_fixups, 879 clear_bss, 880 #endif 881 #if defined(CONFIG_XTENSA) 882 clear_bss, 883 #endif 884 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 885 !CONFIG_IS_ENABLED(X86_64) 886 jump_to_copy, 887 #endif 888 NULL, 889 }; 890 891 void board_init_f(ulong boot_flags) 892 { 893 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 894 /* 895 * For some architectures, global data is initialized and used before 896 * calling this function. The data should be preserved. For others, 897 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 898 * here to host global data until relocation. 899 */ 900 gd_t data; 901 902 gd = &data; 903 904 /* 905 * Clear global data before it is accessed at debug print 906 * in initcall_run_list. Otherwise the debug print probably 907 * get the wrong value of gd->have_console. 908 */ 909 zero_global_data(); 910 #endif 911 912 gd->flags = boot_flags; 913 gd->have_console = 0; 914 915 if (initcall_run_list(init_sequence_f)) 916 hang(); 917 918 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 919 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 920 /* NOTREACHED - jump_to_copy() does not return */ 921 hang(); 922 #endif 923 } 924 925 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 926 /* 927 * For now this code is only used on x86. 928 * 929 * init_sequence_f_r is the list of init functions which are run when 930 * U-Boot is executing from Flash with a semi-limited 'C' environment. 931 * The following limitations must be considered when implementing an 932 * '_f_r' function: 933 * - 'static' variables are read-only 934 * - Global Data (gd->xxx) is read/write 935 * 936 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 937 * supported). It _should_, if possible, copy global data to RAM and 938 * initialise the CPU caches (to speed up the relocation process) 939 * 940 * NOTE: At present only x86 uses this route, but it is intended that 941 * all archs will move to this when generic relocation is implemented. 942 */ 943 static const init_fnc_t init_sequence_f_r[] = { 944 #if !CONFIG_IS_ENABLED(X86_64) 945 init_cache_f_r, 946 #endif 947 948 NULL, 949 }; 950 951 void board_init_f_r(void) 952 { 953 if (initcall_run_list(init_sequence_f_r)) 954 hang(); 955 956 /* 957 * The pre-relocation drivers may be using memory that has now gone 958 * away. Mark serial as unavailable - this will fall back to the debug 959 * UART if available. 960 */ 961 gd->flags &= ~GD_FLG_SERIAL_READY; 962 963 /* 964 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 965 * Transfer execution from Flash to RAM by calculating the address 966 * of the in-RAM copy of board_init_r() and calling it 967 */ 968 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 969 970 /* NOTREACHED - board_init_r() does not return */ 971 hang(); 972 } 973 #endif /* CONFIG_X86 */ 974