1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 /* 110 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 111 */ 112 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 114 static int init_func_watchdog_init(void) 115 { 116 # if defined(CONFIG_HW_WATCHDOG) && \ 117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 120 defined(CONFIG_IMX_WATCHDOG)) 121 hw_watchdog_init(); 122 puts(" Watchdog enabled\n"); 123 # endif 124 WATCHDOG_RESET(); 125 126 return 0; 127 } 128 129 int init_func_watchdog_reset(void) 130 { 131 WATCHDOG_RESET(); 132 133 return 0; 134 } 135 #endif /* CONFIG_WATCHDOG */ 136 137 __weak void board_add_ram_info(int use_default) 138 { 139 /* please define platform specific board_add_ram_info() */ 140 } 141 142 static int init_baud_rate(void) 143 { 144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 145 return 0; 146 } 147 148 static int display_text_info(void) 149 { 150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 151 ulong bss_start, bss_end, text_base; 152 153 bss_start = (ulong)&__bss_start; 154 bss_end = (ulong)&__bss_end; 155 156 #ifdef CONFIG_SYS_TEXT_BASE 157 text_base = CONFIG_SYS_TEXT_BASE; 158 #else 159 text_base = CONFIG_SYS_MONITOR_BASE; 160 #endif 161 162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 163 text_base, bss_start, bss_end); 164 #endif 165 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 181 static int init_func_ram(void) 182 { 183 return initdram(); 184 } 185 #endif 186 187 static int show_dram_config(void) 188 { 189 unsigned long long size; 190 191 #ifdef CONFIG_NR_DRAM_BANKS 192 int i; 193 194 debug("\nRAM Configuration:\n"); 195 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 196 size += gd->bd->bi_dram[i].size; 197 debug("Bank #%d: %llx ", i, 198 (unsigned long long)(gd->bd->bi_dram[i].start)); 199 #ifdef DEBUG 200 print_size(gd->bd->bi_dram[i].size, "\n"); 201 #endif 202 } 203 debug("\nDRAM: "); 204 #else 205 size = gd->ram_size; 206 #endif 207 208 print_size(size, ""); 209 board_add_ram_info(0); 210 putc('\n'); 211 212 return 0; 213 } 214 215 __weak void dram_init_banksize(void) 216 { 217 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 218 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 219 gd->bd->bi_dram[0].size = get_effective_memsize(); 220 #endif 221 } 222 223 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 224 static int init_func_i2c(void) 225 { 226 puts("I2C: "); 227 #ifdef CONFIG_SYS_I2C 228 i2c_init_all(); 229 #else 230 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 231 #endif 232 puts("ready\n"); 233 return 0; 234 } 235 #endif 236 237 #if defined(CONFIG_HARD_SPI) 238 static int init_func_spi(void) 239 { 240 puts("SPI: "); 241 spi_init(); 242 puts("ready\n"); 243 return 0; 244 } 245 #endif 246 247 __maybe_unused 248 static int zero_global_data(void) 249 { 250 memset((void *)gd, '\0', sizeof(gd_t)); 251 252 return 0; 253 } 254 255 static int setup_mon_len(void) 256 { 257 #if defined(__ARM__) || defined(__MICROBLAZE__) 258 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 259 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 260 gd->mon_len = (ulong)&_end - (ulong)_init; 261 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 262 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 263 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 264 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 265 #elif defined(CONFIG_SYS_MONITOR_BASE) 266 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 267 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 268 #endif 269 return 0; 270 } 271 272 __weak int arch_cpu_init(void) 273 { 274 return 0; 275 } 276 277 __weak int mach_cpu_init(void) 278 { 279 return 0; 280 } 281 282 /* Get the top of usable RAM */ 283 __weak ulong board_get_usable_ram_top(ulong total_size) 284 { 285 #ifdef CONFIG_SYS_SDRAM_BASE 286 /* 287 * Detect whether we have so much RAM that it goes past the end of our 288 * 32-bit address space. If so, clip the usable RAM so it doesn't. 289 */ 290 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 291 /* 292 * Will wrap back to top of 32-bit space when reservations 293 * are made. 294 */ 295 return 0; 296 #endif 297 return gd->ram_top; 298 } 299 300 static int setup_dest_addr(void) 301 { 302 debug("Monitor len: %08lX\n", gd->mon_len); 303 /* 304 * Ram is setup, size stored in gd !! 305 */ 306 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 307 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 308 /* 309 * Subtract specified amount of memory to hide so that it won't 310 * get "touched" at all by U-Boot. By fixing up gd->ram_size 311 * the Linux kernel should now get passed the now "corrected" 312 * memory size and won't touch it either. This should work 313 * for arch/ppc and arch/powerpc. Only Linux board ports in 314 * arch/powerpc with bootwrapper support, that recalculate the 315 * memory size from the SDRAM controller setup will have to 316 * get fixed. 317 */ 318 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 319 #endif 320 #ifdef CONFIG_SYS_SDRAM_BASE 321 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 322 #endif 323 gd->ram_top += get_effective_memsize(); 324 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 325 gd->relocaddr = gd->ram_top; 326 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 327 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 328 /* 329 * We need to make sure the location we intend to put secondary core 330 * boot code is reserved and not used by any part of u-boot 331 */ 332 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 333 gd->relocaddr = determine_mp_bootpg(NULL); 334 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 335 } 336 #endif 337 return 0; 338 } 339 340 #if defined(CONFIG_LOGBUFFER) 341 static int reserve_logbuffer(void) 342 { 343 #ifndef CONFIG_ALT_LB_ADDR 344 /* reserve kernel log buffer */ 345 gd->relocaddr -= LOGBUFF_RESERVE; 346 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 347 gd->relocaddr); 348 #endif 349 350 return 0; 351 } 352 #endif 353 354 #ifdef CONFIG_PRAM 355 /* reserve protected RAM */ 356 static int reserve_pram(void) 357 { 358 ulong reg; 359 360 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 361 gd->relocaddr -= (reg << 10); /* size is in kB */ 362 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 363 gd->relocaddr); 364 return 0; 365 } 366 #endif /* CONFIG_PRAM */ 367 368 /* Round memory pointer down to next 4 kB limit */ 369 static int reserve_round_4k(void) 370 { 371 gd->relocaddr &= ~(4096 - 1); 372 return 0; 373 } 374 375 #ifdef CONFIG_ARM 376 static int reserve_mmu(void) 377 { 378 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 379 /* reserve TLB table */ 380 gd->arch.tlb_size = PGTABLE_SIZE; 381 gd->relocaddr -= gd->arch.tlb_size; 382 383 /* round down to next 64 kB limit */ 384 gd->relocaddr &= ~(0x10000 - 1); 385 386 gd->arch.tlb_addr = gd->relocaddr; 387 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 388 gd->arch.tlb_addr + gd->arch.tlb_size); 389 390 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 391 /* 392 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 393 * with location within secure ram. 394 */ 395 gd->arch.tlb_allocated = gd->arch.tlb_addr; 396 #endif 397 #endif 398 399 return 0; 400 } 401 #endif 402 403 #ifdef CONFIG_DM_VIDEO 404 static int reserve_video(void) 405 { 406 ulong addr; 407 int ret; 408 409 addr = gd->relocaddr; 410 ret = video_reserve(&addr); 411 if (ret) 412 return ret; 413 gd->relocaddr = addr; 414 415 return 0; 416 } 417 #else 418 419 # ifdef CONFIG_LCD 420 static int reserve_lcd(void) 421 { 422 # ifdef CONFIG_FB_ADDR 423 gd->fb_base = CONFIG_FB_ADDR; 424 # else 425 /* reserve memory for LCD display (always full pages) */ 426 gd->relocaddr = lcd_setmem(gd->relocaddr); 427 gd->fb_base = gd->relocaddr; 428 # endif /* CONFIG_FB_ADDR */ 429 430 return 0; 431 } 432 # endif /* CONFIG_LCD */ 433 434 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 435 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 436 !defined(CONFIG_M68K) 437 static int reserve_legacy_video(void) 438 { 439 /* reserve memory for video display (always full pages) */ 440 gd->relocaddr = video_setmem(gd->relocaddr); 441 gd->fb_base = gd->relocaddr; 442 443 return 0; 444 } 445 # endif 446 #endif /* !CONFIG_DM_VIDEO */ 447 448 static int reserve_trace(void) 449 { 450 #ifdef CONFIG_TRACE 451 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 452 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 453 debug("Reserving %dk for trace data at: %08lx\n", 454 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 455 #endif 456 457 return 0; 458 } 459 460 static int reserve_uboot(void) 461 { 462 /* 463 * reserve memory for U-Boot code, data & bss 464 * round down to next 4 kB limit 465 */ 466 gd->relocaddr -= gd->mon_len; 467 gd->relocaddr &= ~(4096 - 1); 468 #ifdef CONFIG_E500 469 /* round down to next 64 kB limit so that IVPR stays aligned */ 470 gd->relocaddr &= ~(65536 - 1); 471 #endif 472 473 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 474 gd->relocaddr); 475 476 gd->start_addr_sp = gd->relocaddr; 477 478 return 0; 479 } 480 481 #ifndef CONFIG_SPL_BUILD 482 /* reserve memory for malloc() area */ 483 static int reserve_malloc(void) 484 { 485 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 486 debug("Reserving %dk for malloc() at: %08lx\n", 487 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 488 return 0; 489 } 490 491 /* (permanently) allocate a Board Info struct */ 492 static int reserve_board(void) 493 { 494 if (!gd->bd) { 495 gd->start_addr_sp -= sizeof(bd_t); 496 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 497 memset(gd->bd, '\0', sizeof(bd_t)); 498 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 499 sizeof(bd_t), gd->start_addr_sp); 500 } 501 return 0; 502 } 503 #endif 504 505 static int setup_machine(void) 506 { 507 #ifdef CONFIG_MACH_TYPE 508 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 509 #endif 510 return 0; 511 } 512 513 static int reserve_global_data(void) 514 { 515 gd->start_addr_sp -= sizeof(gd_t); 516 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 517 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 518 sizeof(gd_t), gd->start_addr_sp); 519 return 0; 520 } 521 522 static int reserve_fdt(void) 523 { 524 #ifndef CONFIG_OF_EMBED 525 /* 526 * If the device tree is sitting immediately above our image then we 527 * must relocate it. If it is embedded in the data section, then it 528 * will be relocated with other data. 529 */ 530 if (gd->fdt_blob) { 531 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 532 533 gd->start_addr_sp -= gd->fdt_size; 534 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 535 debug("Reserving %lu Bytes for FDT at: %08lx\n", 536 gd->fdt_size, gd->start_addr_sp); 537 } 538 #endif 539 540 return 0; 541 } 542 543 int arch_reserve_stacks(void) 544 { 545 return 0; 546 } 547 548 static int reserve_stacks(void) 549 { 550 /* make stack pointer 16-byte aligned */ 551 gd->start_addr_sp -= 16; 552 gd->start_addr_sp &= ~0xf; 553 554 /* 555 * let the architecture-specific code tailor gd->start_addr_sp and 556 * gd->irq_sp 557 */ 558 return arch_reserve_stacks(); 559 } 560 561 static int display_new_sp(void) 562 { 563 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 564 565 return 0; 566 } 567 568 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 569 defined(CONFIG_SH) 570 static int setup_board_part1(void) 571 { 572 bd_t *bd = gd->bd; 573 574 /* 575 * Save local variables to board info struct 576 */ 577 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 578 bd->bi_memsize = gd->ram_size; /* size in bytes */ 579 580 #ifdef CONFIG_SYS_SRAM_BASE 581 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 582 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 583 #endif 584 585 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 586 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 587 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 588 #endif 589 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 590 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 591 #endif 592 #if defined(CONFIG_MPC83xx) 593 bd->bi_immrbar = CONFIG_SYS_IMMR; 594 #endif 595 596 return 0; 597 } 598 #endif 599 600 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 601 static int setup_board_part2(void) 602 { 603 bd_t *bd = gd->bd; 604 605 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 606 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 607 #if defined(CONFIG_CPM2) 608 bd->bi_cpmfreq = gd->arch.cpm_clk; 609 bd->bi_brgfreq = gd->arch.brg_clk; 610 bd->bi_sccfreq = gd->arch.scc_clk; 611 bd->bi_vco = gd->arch.vco_out; 612 #endif /* CONFIG_CPM2 */ 613 #if defined(CONFIG_MPC512X) 614 bd->bi_ipsfreq = gd->arch.ips_clk; 615 #endif /* CONFIG_MPC512X */ 616 #if defined(CONFIG_MPC5xxx) 617 bd->bi_ipbfreq = gd->arch.ipb_clk; 618 bd->bi_pcifreq = gd->pci_clk; 619 #endif /* CONFIG_MPC5xxx */ 620 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 621 bd->bi_pcifreq = gd->pci_clk; 622 #endif 623 #if defined(CONFIG_EXTRA_CLOCK) 624 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 625 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 626 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 627 #endif 628 629 return 0; 630 } 631 #endif 632 633 #ifdef CONFIG_SYS_EXTBDINFO 634 static int setup_board_extra(void) 635 { 636 bd_t *bd = gd->bd; 637 638 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 639 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 640 sizeof(bd->bi_r_version)); 641 642 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 643 bd->bi_plb_busfreq = gd->bus_clk; 644 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 645 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 646 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 647 bd->bi_pci_busfreq = get_PCI_freq(); 648 bd->bi_opbfreq = get_OPB_freq(); 649 #elif defined(CONFIG_XILINX_405) 650 bd->bi_pci_busfreq = get_PCI_freq(); 651 #endif 652 653 return 0; 654 } 655 #endif 656 657 #ifdef CONFIG_POST 658 static int init_post(void) 659 { 660 post_bootmode_init(); 661 post_run(NULL, POST_ROM | post_bootmode_get(0)); 662 663 return 0; 664 } 665 #endif 666 667 static int setup_dram_config(void) 668 { 669 /* Ram is board specific, so move it to board code ... */ 670 dram_init_banksize(); 671 672 return 0; 673 } 674 675 static int reloc_fdt(void) 676 { 677 #ifndef CONFIG_OF_EMBED 678 if (gd->flags & GD_FLG_SKIP_RELOC) 679 return 0; 680 if (gd->new_fdt) { 681 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 682 gd->fdt_blob = gd->new_fdt; 683 } 684 #endif 685 686 return 0; 687 } 688 689 static int setup_reloc(void) 690 { 691 if (gd->flags & GD_FLG_SKIP_RELOC) { 692 debug("Skipping relocation due to flag\n"); 693 return 0; 694 } 695 696 #ifdef CONFIG_SYS_TEXT_BASE 697 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 698 #ifdef CONFIG_M68K 699 /* 700 * On all ColdFire arch cpu, monitor code starts always 701 * just after the default vector table location, so at 0x400 702 */ 703 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 704 #endif 705 #endif 706 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 707 708 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 709 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 710 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 711 gd->start_addr_sp); 712 713 return 0; 714 } 715 716 #ifdef CONFIG_OF_BOARD_FIXUP 717 static int fix_fdt(void) 718 { 719 return board_fix_fdt((void *)gd->fdt_blob); 720 } 721 #endif 722 723 /* ARM calls relocate_code from its crt0.S */ 724 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 725 !CONFIG_IS_ENABLED(X86_64) 726 727 static int jump_to_copy(void) 728 { 729 if (gd->flags & GD_FLG_SKIP_RELOC) 730 return 0; 731 /* 732 * x86 is special, but in a nice way. It uses a trampoline which 733 * enables the dcache if possible. 734 * 735 * For now, other archs use relocate_code(), which is implemented 736 * similarly for all archs. When we do generic relocation, hopefully 737 * we can make all archs enable the dcache prior to relocation. 738 */ 739 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 740 /* 741 * SDRAM and console are now initialised. The final stack can now 742 * be setup in SDRAM. Code execution will continue in Flash, but 743 * with the stack in SDRAM and Global Data in temporary memory 744 * (CPU cache) 745 */ 746 arch_setup_gd(gd->new_gd); 747 board_init_f_r_trampoline(gd->start_addr_sp); 748 #else 749 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 750 #endif 751 752 return 0; 753 } 754 #endif 755 756 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 757 static int mark_bootstage(void) 758 { 759 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 760 761 return 0; 762 } 763 764 static int initf_console_record(void) 765 { 766 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 767 return console_record_init(); 768 #else 769 return 0; 770 #endif 771 } 772 773 static int initf_dm(void) 774 { 775 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 776 int ret; 777 778 ret = dm_init_and_scan(true); 779 if (ret) 780 return ret; 781 #endif 782 #ifdef CONFIG_TIMER_EARLY 783 ret = dm_timer_init(); 784 if (ret) 785 return ret; 786 #endif 787 788 return 0; 789 } 790 791 /* Architecture-specific memory reservation */ 792 __weak int reserve_arch(void) 793 { 794 return 0; 795 } 796 797 __weak int arch_cpu_init_dm(void) 798 { 799 return 0; 800 } 801 802 static const init_fnc_t init_sequence_f[] = { 803 setup_mon_len, 804 #ifdef CONFIG_OF_CONTROL 805 fdtdec_setup, 806 #endif 807 #ifdef CONFIG_TRACE 808 trace_early_init, 809 #endif 810 initf_malloc, 811 initf_console_record, 812 #if defined(CONFIG_HAVE_FSP) 813 arch_fsp_init, 814 #endif 815 arch_cpu_init, /* basic arch cpu dependent setup */ 816 mach_cpu_init, /* SoC/machine dependent CPU setup */ 817 initf_dm, 818 arch_cpu_init_dm, 819 mark_bootstage, /* need timer, go after init dm */ 820 #if defined(CONFIG_BOARD_EARLY_INIT_F) 821 board_early_init_f, 822 #endif 823 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 824 /* get CPU and bus clocks according to the environment variable */ 825 get_clocks, /* get CPU and bus clocks (etc.) */ 826 #endif 827 timer_init, /* initialize timer */ 828 #if defined(CONFIG_BOARD_POSTCLK_INIT) 829 board_postclk_init, 830 #endif 831 env_init, /* initialize environment */ 832 init_baud_rate, /* initialze baudrate settings */ 833 serial_init, /* serial communications setup */ 834 console_init_f, /* stage 1 init of console */ 835 display_options, /* say that we are here */ 836 display_text_info, /* show debugging info if required */ 837 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 838 defined(CONFIG_X86) 839 checkcpu, 840 #endif 841 #if defined(CONFIG_DISPLAY_CPUINFO) 842 print_cpuinfo, /* display cpu info (and speed) */ 843 #endif 844 #if defined(CONFIG_DISPLAY_BOARDINFO) 845 show_board_info, 846 #endif 847 INIT_FUNC_WATCHDOG_INIT 848 #if defined(CONFIG_MISC_INIT_F) 849 misc_init_f, 850 #endif 851 INIT_FUNC_WATCHDOG_RESET 852 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 853 init_func_i2c, 854 #endif 855 #if defined(CONFIG_HARD_SPI) 856 init_func_spi, 857 #endif 858 announce_dram_init, 859 /* TODO: unify all these dram functions? */ 860 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 861 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 862 defined(CONFIG_SH) 863 dram_init, /* configure available RAM banks */ 864 #endif 865 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 866 init_func_ram, 867 #endif 868 #ifdef CONFIG_POST 869 post_init_f, 870 #endif 871 INIT_FUNC_WATCHDOG_RESET 872 #if defined(CONFIG_SYS_DRAM_TEST) 873 testdram, 874 #endif /* CONFIG_SYS_DRAM_TEST */ 875 INIT_FUNC_WATCHDOG_RESET 876 877 #ifdef CONFIG_POST 878 init_post, 879 #endif 880 INIT_FUNC_WATCHDOG_RESET 881 /* 882 * Now that we have DRAM mapped and working, we can 883 * relocate the code and continue running from DRAM. 884 * 885 * Reserve memory at end of RAM for (top down in that order): 886 * - area that won't get touched by U-Boot and Linux (optional) 887 * - kernel log buffer 888 * - protected RAM 889 * - LCD framebuffer 890 * - monitor code 891 * - board info struct 892 */ 893 setup_dest_addr, 894 #if defined(CONFIG_LOGBUFFER) 895 reserve_logbuffer, 896 #endif 897 #ifdef CONFIG_PRAM 898 reserve_pram, 899 #endif 900 reserve_round_4k, 901 #ifdef CONFIG_ARM 902 reserve_mmu, 903 #endif 904 #ifdef CONFIG_DM_VIDEO 905 reserve_video, 906 #else 907 # ifdef CONFIG_LCD 908 reserve_lcd, 909 # endif 910 /* TODO: Why the dependency on CONFIG_8xx? */ 911 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 912 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 913 !defined(CONFIG_M68K) 914 reserve_legacy_video, 915 # endif 916 #endif /* CONFIG_DM_VIDEO */ 917 reserve_trace, 918 reserve_uboot, 919 #ifndef CONFIG_SPL_BUILD 920 reserve_malloc, 921 reserve_board, 922 #endif 923 setup_machine, 924 reserve_global_data, 925 reserve_fdt, 926 reserve_arch, 927 reserve_stacks, 928 setup_dram_config, 929 show_dram_config, 930 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 931 defined(CONFIG_SH) 932 setup_board_part1, 933 #endif 934 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 935 INIT_FUNC_WATCHDOG_RESET 936 setup_board_part2, 937 #endif 938 display_new_sp, 939 #ifdef CONFIG_SYS_EXTBDINFO 940 setup_board_extra, 941 #endif 942 #ifdef CONFIG_OF_BOARD_FIXUP 943 fix_fdt, 944 #endif 945 INIT_FUNC_WATCHDOG_RESET 946 reloc_fdt, 947 setup_reloc, 948 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 949 copy_uboot_to_ram, 950 do_elf_reloc_fixups, 951 clear_bss, 952 #endif 953 #if defined(CONFIG_XTENSA) 954 clear_bss, 955 #endif 956 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 957 !CONFIG_IS_ENABLED(X86_64) 958 jump_to_copy, 959 #endif 960 NULL, 961 }; 962 963 void board_init_f(ulong boot_flags) 964 { 965 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 966 /* 967 * For some architectures, global data is initialized and used before 968 * calling this function. The data should be preserved. For others, 969 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 970 * here to host global data until relocation. 971 */ 972 gd_t data; 973 974 gd = &data; 975 976 /* 977 * Clear global data before it is accessed at debug print 978 * in initcall_run_list. Otherwise the debug print probably 979 * get the wrong value of gd->have_console. 980 */ 981 zero_global_data(); 982 #endif 983 984 gd->flags = boot_flags; 985 gd->have_console = 0; 986 987 if (initcall_run_list(init_sequence_f)) 988 hang(); 989 990 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 991 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 992 /* NOTREACHED - jump_to_copy() does not return */ 993 hang(); 994 #endif 995 } 996 997 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 998 /* 999 * For now this code is only used on x86. 1000 * 1001 * init_sequence_f_r is the list of init functions which are run when 1002 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1003 * The following limitations must be considered when implementing an 1004 * '_f_r' function: 1005 * - 'static' variables are read-only 1006 * - Global Data (gd->xxx) is read/write 1007 * 1008 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1009 * supported). It _should_, if possible, copy global data to RAM and 1010 * initialise the CPU caches (to speed up the relocation process) 1011 * 1012 * NOTE: At present only x86 uses this route, but it is intended that 1013 * all archs will move to this when generic relocation is implemented. 1014 */ 1015 static const init_fnc_t init_sequence_f_r[] = { 1016 #if !CONFIG_IS_ENABLED(X86_64) 1017 init_cache_f_r, 1018 #endif 1019 1020 NULL, 1021 }; 1022 1023 void board_init_f_r(void) 1024 { 1025 if (initcall_run_list(init_sequence_f_r)) 1026 hang(); 1027 1028 /* 1029 * The pre-relocation drivers may be using memory that has now gone 1030 * away. Mark serial as unavailable - this will fall back to the debug 1031 * UART if available. 1032 */ 1033 gd->flags &= ~GD_FLG_SERIAL_READY; 1034 1035 /* 1036 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1037 * Transfer execution from Flash to RAM by calculating the address 1038 * of the in-RAM copy of board_init_r() and calling it 1039 */ 1040 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1041 1042 /* NOTREACHED - board_init_r() does not return */ 1043 hang(); 1044 } 1045 #endif /* CONFIG_X86 */ 1046