1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 110 static int init_func_watchdog_init(void) 111 { 112 # if defined(CONFIG_HW_WATCHDOG) && \ 113 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 115 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 116 defined(CONFIG_IMX_WATCHDOG)) 117 hw_watchdog_init(); 118 puts(" Watchdog enabled\n"); 119 # endif 120 WATCHDOG_RESET(); 121 122 return 0; 123 } 124 125 int init_func_watchdog_reset(void) 126 { 127 WATCHDOG_RESET(); 128 129 return 0; 130 } 131 #endif /* CONFIG_WATCHDOG */ 132 133 __weak void board_add_ram_info(int use_default) 134 { 135 /* please define platform specific board_add_ram_info() */ 136 } 137 138 static int init_baud_rate(void) 139 { 140 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 141 return 0; 142 } 143 144 static int display_text_info(void) 145 { 146 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 147 ulong bss_start, bss_end, text_base; 148 149 bss_start = (ulong)&__bss_start; 150 bss_end = (ulong)&__bss_end; 151 152 #ifdef CONFIG_SYS_TEXT_BASE 153 text_base = CONFIG_SYS_TEXT_BASE; 154 #else 155 text_base = CONFIG_SYS_MONITOR_BASE; 156 #endif 157 158 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 159 text_base, bss_start, bss_end); 160 #endif 161 162 #ifdef CONFIG_USE_IRQ 163 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 164 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 165 #endif 166 167 return 0; 168 } 169 170 static int announce_dram_init(void) 171 { 172 puts("DRAM: "); 173 return 0; 174 } 175 176 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 177 static int init_func_ram(void) 178 { 179 return initdram(); 180 } 181 #endif 182 183 static int show_dram_config(void) 184 { 185 unsigned long long size; 186 187 #ifdef CONFIG_NR_DRAM_BANKS 188 int i; 189 190 debug("\nRAM Configuration:\n"); 191 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 192 size += gd->bd->bi_dram[i].size; 193 debug("Bank #%d: %llx ", i, 194 (unsigned long long)(gd->bd->bi_dram[i].start)); 195 #ifdef DEBUG 196 print_size(gd->bd->bi_dram[i].size, "\n"); 197 #endif 198 } 199 debug("\nDRAM: "); 200 #else 201 size = gd->ram_size; 202 #endif 203 204 print_size(size, ""); 205 board_add_ram_info(0); 206 putc('\n'); 207 208 return 0; 209 } 210 211 __weak int dram_init_banksize(void) 212 { 213 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 214 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 215 gd->bd->bi_dram[0].size = get_effective_memsize(); 216 #endif 217 218 return 0; 219 } 220 221 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 222 static int init_func_i2c(void) 223 { 224 puts("I2C: "); 225 #ifdef CONFIG_SYS_I2C 226 i2c_init_all(); 227 #else 228 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 229 #endif 230 puts("ready\n"); 231 return 0; 232 } 233 #endif 234 235 #if defined(CONFIG_HARD_SPI) 236 static int init_func_spi(void) 237 { 238 puts("SPI: "); 239 spi_init(); 240 puts("ready\n"); 241 return 0; 242 } 243 #endif 244 245 __maybe_unused 246 static int zero_global_data(void) 247 { 248 memset((void *)gd, '\0', sizeof(gd_t)); 249 250 return 0; 251 } 252 253 static int setup_mon_len(void) 254 { 255 #if defined(__ARM__) || defined(__MICROBLAZE__) 256 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 257 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 258 gd->mon_len = (ulong)&_end - (ulong)_init; 259 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 260 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 261 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 262 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 263 #elif defined(CONFIG_SYS_MONITOR_BASE) 264 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 265 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 266 #endif 267 return 0; 268 } 269 270 __weak int arch_cpu_init(void) 271 { 272 return 0; 273 } 274 275 __weak int mach_cpu_init(void) 276 { 277 return 0; 278 } 279 280 /* Get the top of usable RAM */ 281 __weak ulong board_get_usable_ram_top(ulong total_size) 282 { 283 #ifdef CONFIG_SYS_SDRAM_BASE 284 /* 285 * Detect whether we have so much RAM that it goes past the end of our 286 * 32-bit address space. If so, clip the usable RAM so it doesn't. 287 */ 288 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 289 /* 290 * Will wrap back to top of 32-bit space when reservations 291 * are made. 292 */ 293 return 0; 294 #endif 295 return gd->ram_top; 296 } 297 298 static int setup_dest_addr(void) 299 { 300 debug("Monitor len: %08lX\n", gd->mon_len); 301 /* 302 * Ram is setup, size stored in gd !! 303 */ 304 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 305 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 306 /* 307 * Subtract specified amount of memory to hide so that it won't 308 * get "touched" at all by U-Boot. By fixing up gd->ram_size 309 * the Linux kernel should now get passed the now "corrected" 310 * memory size and won't touch it either. This should work 311 * for arch/ppc and arch/powerpc. Only Linux board ports in 312 * arch/powerpc with bootwrapper support, that recalculate the 313 * memory size from the SDRAM controller setup will have to 314 * get fixed. 315 */ 316 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 317 #endif 318 #ifdef CONFIG_SYS_SDRAM_BASE 319 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 320 #endif 321 gd->ram_top += get_effective_memsize(); 322 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 323 gd->relocaddr = gd->ram_top; 324 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 325 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 326 /* 327 * We need to make sure the location we intend to put secondary core 328 * boot code is reserved and not used by any part of u-boot 329 */ 330 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 331 gd->relocaddr = determine_mp_bootpg(NULL); 332 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 333 } 334 #endif 335 return 0; 336 } 337 338 #if defined(CONFIG_LOGBUFFER) 339 static int reserve_logbuffer(void) 340 { 341 #ifndef CONFIG_ALT_LB_ADDR 342 /* reserve kernel log buffer */ 343 gd->relocaddr -= LOGBUFF_RESERVE; 344 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 345 gd->relocaddr); 346 #endif 347 348 return 0; 349 } 350 #endif 351 352 #ifdef CONFIG_PRAM 353 /* reserve protected RAM */ 354 static int reserve_pram(void) 355 { 356 ulong reg; 357 358 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 359 gd->relocaddr -= (reg << 10); /* size is in kB */ 360 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 361 gd->relocaddr); 362 return 0; 363 } 364 #endif /* CONFIG_PRAM */ 365 366 /* Round memory pointer down to next 4 kB limit */ 367 static int reserve_round_4k(void) 368 { 369 gd->relocaddr &= ~(4096 - 1); 370 return 0; 371 } 372 373 #ifdef CONFIG_ARM 374 static int reserve_mmu(void) 375 { 376 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 377 /* reserve TLB table */ 378 gd->arch.tlb_size = PGTABLE_SIZE; 379 gd->relocaddr -= gd->arch.tlb_size; 380 381 /* round down to next 64 kB limit */ 382 gd->relocaddr &= ~(0x10000 - 1); 383 384 gd->arch.tlb_addr = gd->relocaddr; 385 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 386 gd->arch.tlb_addr + gd->arch.tlb_size); 387 388 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 389 /* 390 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 391 * with location within secure ram. 392 */ 393 gd->arch.tlb_allocated = gd->arch.tlb_addr; 394 #endif 395 #endif 396 397 return 0; 398 } 399 #endif 400 401 static int reserve_video(void) 402 { 403 #ifdef CONFIG_DM_VIDEO 404 ulong addr; 405 int ret; 406 407 addr = gd->relocaddr; 408 ret = video_reserve(&addr); 409 if (ret) 410 return ret; 411 gd->relocaddr = addr; 412 #elif defined(CONFIG_LCD) 413 # ifdef CONFIG_FB_ADDR 414 gd->fb_base = CONFIG_FB_ADDR; 415 # else 416 /* reserve memory for LCD display (always full pages) */ 417 gd->relocaddr = lcd_setmem(gd->relocaddr); 418 gd->fb_base = gd->relocaddr; 419 # endif /* CONFIG_FB_ADDR */ 420 #elif defined(CONFIG_VIDEO) && \ 421 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 422 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 423 !defined(CONFIG_M68K) 424 /* reserve memory for video display (always full pages) */ 425 gd->relocaddr = video_setmem(gd->relocaddr); 426 gd->fb_base = gd->relocaddr; 427 #endif 428 429 return 0; 430 } 431 432 static int reserve_trace(void) 433 { 434 #ifdef CONFIG_TRACE 435 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 436 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 437 debug("Reserving %dk for trace data at: %08lx\n", 438 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 439 #endif 440 441 return 0; 442 } 443 444 static int reserve_uboot(void) 445 { 446 /* 447 * reserve memory for U-Boot code, data & bss 448 * round down to next 4 kB limit 449 */ 450 gd->relocaddr -= gd->mon_len; 451 gd->relocaddr &= ~(4096 - 1); 452 #ifdef CONFIG_E500 453 /* round down to next 64 kB limit so that IVPR stays aligned */ 454 gd->relocaddr &= ~(65536 - 1); 455 #endif 456 457 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 458 gd->relocaddr); 459 460 gd->start_addr_sp = gd->relocaddr; 461 462 return 0; 463 } 464 465 /* reserve memory for malloc() area */ 466 static int reserve_malloc(void) 467 { 468 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 469 debug("Reserving %dk for malloc() at: %08lx\n", 470 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 471 return 0; 472 } 473 474 /* (permanently) allocate a Board Info struct */ 475 static int reserve_board(void) 476 { 477 if (!gd->bd) { 478 gd->start_addr_sp -= sizeof(bd_t); 479 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 480 memset(gd->bd, '\0', sizeof(bd_t)); 481 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 482 sizeof(bd_t), gd->start_addr_sp); 483 } 484 return 0; 485 } 486 487 static int setup_machine(void) 488 { 489 #ifdef CONFIG_MACH_TYPE 490 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 491 #endif 492 return 0; 493 } 494 495 static int reserve_global_data(void) 496 { 497 gd->start_addr_sp -= sizeof(gd_t); 498 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 499 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 500 sizeof(gd_t), gd->start_addr_sp); 501 return 0; 502 } 503 504 static int reserve_fdt(void) 505 { 506 #ifndef CONFIG_OF_EMBED 507 /* 508 * If the device tree is sitting immediately above our image then we 509 * must relocate it. If it is embedded in the data section, then it 510 * will be relocated with other data. 511 */ 512 if (gd->fdt_blob) { 513 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 514 515 gd->start_addr_sp -= gd->fdt_size; 516 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 517 debug("Reserving %lu Bytes for FDT at: %08lx\n", 518 gd->fdt_size, gd->start_addr_sp); 519 } 520 #endif 521 522 return 0; 523 } 524 525 int arch_reserve_stacks(void) 526 { 527 return 0; 528 } 529 530 static int reserve_stacks(void) 531 { 532 /* make stack pointer 16-byte aligned */ 533 gd->start_addr_sp -= 16; 534 gd->start_addr_sp &= ~0xf; 535 536 /* 537 * let the architecture-specific code tailor gd->start_addr_sp and 538 * gd->irq_sp 539 */ 540 return arch_reserve_stacks(); 541 } 542 543 static int display_new_sp(void) 544 { 545 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 546 547 return 0; 548 } 549 550 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 551 defined(CONFIG_SH) 552 static int setup_board_part1(void) 553 { 554 bd_t *bd = gd->bd; 555 556 /* 557 * Save local variables to board info struct 558 */ 559 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 560 bd->bi_memsize = gd->ram_size; /* size in bytes */ 561 562 #ifdef CONFIG_SYS_SRAM_BASE 563 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 564 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 565 #endif 566 567 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 568 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 569 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 570 #endif 571 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 572 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 573 #endif 574 #if defined(CONFIG_MPC83xx) 575 bd->bi_immrbar = CONFIG_SYS_IMMR; 576 #endif 577 578 return 0; 579 } 580 #endif 581 582 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 583 static int setup_board_part2(void) 584 { 585 bd_t *bd = gd->bd; 586 587 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 588 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 589 #if defined(CONFIG_CPM2) 590 bd->bi_cpmfreq = gd->arch.cpm_clk; 591 bd->bi_brgfreq = gd->arch.brg_clk; 592 bd->bi_sccfreq = gd->arch.scc_clk; 593 bd->bi_vco = gd->arch.vco_out; 594 #endif /* CONFIG_CPM2 */ 595 #if defined(CONFIG_MPC512X) 596 bd->bi_ipsfreq = gd->arch.ips_clk; 597 #endif /* CONFIG_MPC512X */ 598 #if defined(CONFIG_MPC5xxx) 599 bd->bi_ipbfreq = gd->arch.ipb_clk; 600 bd->bi_pcifreq = gd->pci_clk; 601 #endif /* CONFIG_MPC5xxx */ 602 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 603 bd->bi_pcifreq = gd->pci_clk; 604 #endif 605 #if defined(CONFIG_EXTRA_CLOCK) 606 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 607 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 608 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 609 #endif 610 611 return 0; 612 } 613 #endif 614 615 #ifdef CONFIG_SYS_EXTBDINFO 616 static int setup_board_extra(void) 617 { 618 bd_t *bd = gd->bd; 619 620 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 621 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 622 sizeof(bd->bi_r_version)); 623 624 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 625 bd->bi_plb_busfreq = gd->bus_clk; 626 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 627 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 628 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 629 bd->bi_pci_busfreq = get_PCI_freq(); 630 bd->bi_opbfreq = get_OPB_freq(); 631 #elif defined(CONFIG_XILINX_405) 632 bd->bi_pci_busfreq = get_PCI_freq(); 633 #endif 634 635 return 0; 636 } 637 #endif 638 639 #ifdef CONFIG_POST 640 static int init_post(void) 641 { 642 post_bootmode_init(); 643 post_run(NULL, POST_ROM | post_bootmode_get(0)); 644 645 return 0; 646 } 647 #endif 648 649 static int reloc_fdt(void) 650 { 651 #ifndef CONFIG_OF_EMBED 652 if (gd->flags & GD_FLG_SKIP_RELOC) 653 return 0; 654 if (gd->new_fdt) { 655 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 656 gd->fdt_blob = gd->new_fdt; 657 } 658 #endif 659 660 return 0; 661 } 662 663 static int setup_reloc(void) 664 { 665 if (gd->flags & GD_FLG_SKIP_RELOC) { 666 debug("Skipping relocation due to flag\n"); 667 return 0; 668 } 669 670 #ifdef CONFIG_SYS_TEXT_BASE 671 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 672 #ifdef CONFIG_M68K 673 /* 674 * On all ColdFire arch cpu, monitor code starts always 675 * just after the default vector table location, so at 0x400 676 */ 677 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 678 #endif 679 #endif 680 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 681 682 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 683 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 684 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 685 gd->start_addr_sp); 686 687 return 0; 688 } 689 690 #ifdef CONFIG_OF_BOARD_FIXUP 691 static int fix_fdt(void) 692 { 693 return board_fix_fdt((void *)gd->fdt_blob); 694 } 695 #endif 696 697 /* ARM calls relocate_code from its crt0.S */ 698 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 699 !CONFIG_IS_ENABLED(X86_64) 700 701 static int jump_to_copy(void) 702 { 703 if (gd->flags & GD_FLG_SKIP_RELOC) 704 return 0; 705 /* 706 * x86 is special, but in a nice way. It uses a trampoline which 707 * enables the dcache if possible. 708 * 709 * For now, other archs use relocate_code(), which is implemented 710 * similarly for all archs. When we do generic relocation, hopefully 711 * we can make all archs enable the dcache prior to relocation. 712 */ 713 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 714 /* 715 * SDRAM and console are now initialised. The final stack can now 716 * be setup in SDRAM. Code execution will continue in Flash, but 717 * with the stack in SDRAM and Global Data in temporary memory 718 * (CPU cache) 719 */ 720 arch_setup_gd(gd->new_gd); 721 board_init_f_r_trampoline(gd->start_addr_sp); 722 #else 723 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 724 #endif 725 726 return 0; 727 } 728 #endif 729 730 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 731 static int mark_bootstage(void) 732 { 733 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 734 735 return 0; 736 } 737 738 static int initf_console_record(void) 739 { 740 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 741 return console_record_init(); 742 #else 743 return 0; 744 #endif 745 } 746 747 static int initf_dm(void) 748 { 749 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 750 int ret; 751 752 ret = dm_init_and_scan(true); 753 if (ret) 754 return ret; 755 #endif 756 #ifdef CONFIG_TIMER_EARLY 757 ret = dm_timer_init(); 758 if (ret) 759 return ret; 760 #endif 761 762 return 0; 763 } 764 765 /* Architecture-specific memory reservation */ 766 __weak int reserve_arch(void) 767 { 768 return 0; 769 } 770 771 __weak int arch_cpu_init_dm(void) 772 { 773 return 0; 774 } 775 776 static const init_fnc_t init_sequence_f[] = { 777 setup_mon_len, 778 #ifdef CONFIG_OF_CONTROL 779 fdtdec_setup, 780 #endif 781 #ifdef CONFIG_TRACE 782 trace_early_init, 783 #endif 784 initf_malloc, 785 initf_console_record, 786 #if defined(CONFIG_HAVE_FSP) 787 arch_fsp_init, 788 #endif 789 arch_cpu_init, /* basic arch cpu dependent setup */ 790 mach_cpu_init, /* SoC/machine dependent CPU setup */ 791 initf_dm, 792 arch_cpu_init_dm, 793 mark_bootstage, /* need timer, go after init dm */ 794 #if defined(CONFIG_BOARD_EARLY_INIT_F) 795 board_early_init_f, 796 #endif 797 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 798 /* get CPU and bus clocks according to the environment variable */ 799 get_clocks, /* get CPU and bus clocks (etc.) */ 800 #endif 801 timer_init, /* initialize timer */ 802 #if defined(CONFIG_BOARD_POSTCLK_INIT) 803 board_postclk_init, 804 #endif 805 env_init, /* initialize environment */ 806 init_baud_rate, /* initialze baudrate settings */ 807 serial_init, /* serial communications setup */ 808 console_init_f, /* stage 1 init of console */ 809 display_options, /* say that we are here */ 810 display_text_info, /* show debugging info if required */ 811 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 812 defined(CONFIG_X86) 813 checkcpu, 814 #endif 815 #if defined(CONFIG_DISPLAY_CPUINFO) 816 print_cpuinfo, /* display cpu info (and speed) */ 817 #endif 818 #if defined(CONFIG_DISPLAY_BOARDINFO) 819 show_board_info, 820 #endif 821 INIT_FUNC_WATCHDOG_INIT 822 #if defined(CONFIG_MISC_INIT_F) 823 misc_init_f, 824 #endif 825 INIT_FUNC_WATCHDOG_RESET 826 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 827 init_func_i2c, 828 #endif 829 #if defined(CONFIG_HARD_SPI) 830 init_func_spi, 831 #endif 832 announce_dram_init, 833 /* TODO: unify all these dram functions? */ 834 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 835 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 836 defined(CONFIG_SH) 837 dram_init, /* configure available RAM banks */ 838 #endif 839 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 840 init_func_ram, 841 #endif 842 #ifdef CONFIG_POST 843 post_init_f, 844 #endif 845 INIT_FUNC_WATCHDOG_RESET 846 #if defined(CONFIG_SYS_DRAM_TEST) 847 testdram, 848 #endif /* CONFIG_SYS_DRAM_TEST */ 849 INIT_FUNC_WATCHDOG_RESET 850 851 #ifdef CONFIG_POST 852 init_post, 853 #endif 854 INIT_FUNC_WATCHDOG_RESET 855 /* 856 * Now that we have DRAM mapped and working, we can 857 * relocate the code and continue running from DRAM. 858 * 859 * Reserve memory at end of RAM for (top down in that order): 860 * - area that won't get touched by U-Boot and Linux (optional) 861 * - kernel log buffer 862 * - protected RAM 863 * - LCD framebuffer 864 * - monitor code 865 * - board info struct 866 */ 867 setup_dest_addr, 868 #if defined(CONFIG_LOGBUFFER) 869 reserve_logbuffer, 870 #endif 871 #ifdef CONFIG_PRAM 872 reserve_pram, 873 #endif 874 reserve_round_4k, 875 #ifdef CONFIG_ARM 876 reserve_mmu, 877 #endif 878 reserve_video, 879 reserve_trace, 880 reserve_uboot, 881 reserve_malloc, 882 reserve_board, 883 setup_machine, 884 reserve_global_data, 885 reserve_fdt, 886 reserve_arch, 887 reserve_stacks, 888 dram_init_banksize, 889 show_dram_config, 890 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 891 defined(CONFIG_SH) 892 setup_board_part1, 893 #endif 894 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 895 INIT_FUNC_WATCHDOG_RESET 896 setup_board_part2, 897 #endif 898 display_new_sp, 899 #ifdef CONFIG_SYS_EXTBDINFO 900 setup_board_extra, 901 #endif 902 #ifdef CONFIG_OF_BOARD_FIXUP 903 fix_fdt, 904 #endif 905 INIT_FUNC_WATCHDOG_RESET 906 reloc_fdt, 907 setup_reloc, 908 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 909 copy_uboot_to_ram, 910 do_elf_reloc_fixups, 911 clear_bss, 912 #endif 913 #if defined(CONFIG_XTENSA) 914 clear_bss, 915 #endif 916 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 917 !CONFIG_IS_ENABLED(X86_64) 918 jump_to_copy, 919 #endif 920 NULL, 921 }; 922 923 void board_init_f(ulong boot_flags) 924 { 925 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 926 /* 927 * For some architectures, global data is initialized and used before 928 * calling this function. The data should be preserved. For others, 929 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 930 * here to host global data until relocation. 931 */ 932 gd_t data; 933 934 gd = &data; 935 936 /* 937 * Clear global data before it is accessed at debug print 938 * in initcall_run_list. Otherwise the debug print probably 939 * get the wrong value of gd->have_console. 940 */ 941 zero_global_data(); 942 #endif 943 944 gd->flags = boot_flags; 945 gd->have_console = 0; 946 947 if (initcall_run_list(init_sequence_f)) 948 hang(); 949 950 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 951 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 952 /* NOTREACHED - jump_to_copy() does not return */ 953 hang(); 954 #endif 955 } 956 957 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 958 /* 959 * For now this code is only used on x86. 960 * 961 * init_sequence_f_r is the list of init functions which are run when 962 * U-Boot is executing from Flash with a semi-limited 'C' environment. 963 * The following limitations must be considered when implementing an 964 * '_f_r' function: 965 * - 'static' variables are read-only 966 * - Global Data (gd->xxx) is read/write 967 * 968 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 969 * supported). It _should_, if possible, copy global data to RAM and 970 * initialise the CPU caches (to speed up the relocation process) 971 * 972 * NOTE: At present only x86 uses this route, but it is intended that 973 * all archs will move to this when generic relocation is implemented. 974 */ 975 static const init_fnc_t init_sequence_f_r[] = { 976 #if !CONFIG_IS_ENABLED(X86_64) 977 init_cache_f_r, 978 #endif 979 980 NULL, 981 }; 982 983 void board_init_f_r(void) 984 { 985 if (initcall_run_list(init_sequence_f_r)) 986 hang(); 987 988 /* 989 * The pre-relocation drivers may be using memory that has now gone 990 * away. Mark serial as unavailable - this will fall back to the debug 991 * UART if available. 992 */ 993 gd->flags &= ~GD_FLG_SERIAL_READY; 994 995 /* 996 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 997 * Transfer execution from Flash to RAM by calculating the address 998 * of the in-RAM copy of board_init_r() and calling it 999 */ 1000 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1001 1002 /* NOTREACHED - board_init_r() does not return */ 1003 hang(); 1004 } 1005 #endif /* CONFIG_X86 */ 1006