1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #if defined(CONFIG_CMD_IDE) 21 #include <ide.h> 22 #endif 23 #include <i2c.h> 24 #include <initcall.h> 25 #include <logbuff.h> 26 #include <malloc.h> 27 #include <mapmem.h> 28 29 /* TODO: Can we move these into arch/ headers? */ 30 #ifdef CONFIG_8xx 31 #include <mpc8xx.h> 32 #endif 33 #ifdef CONFIG_5xx 34 #include <mpc5xx.h> 35 #endif 36 #ifdef CONFIG_MPC5xxx 37 #include <mpc5xxx.h> 38 #endif 39 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 40 #include <asm/mp.h> 41 #endif 42 43 #include <os.h> 44 #include <post.h> 45 #include <spi.h> 46 #include <status_led.h> 47 #include <trace.h> 48 #include <watchdog.h> 49 #include <asm/errno.h> 50 #include <asm/io.h> 51 #include <asm/sections.h> 52 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 53 #include <asm/init_helpers.h> 54 #include <asm/relocate.h> 55 #endif 56 #ifdef CONFIG_SANDBOX 57 #include <asm/state.h> 58 #endif 59 #include <dm/root.h> 60 #include <linux/compiler.h> 61 62 /* 63 * Pointer to initial global data area 64 * 65 * Here we initialize it if needed. 66 */ 67 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 68 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 69 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 70 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 71 #else 72 DECLARE_GLOBAL_DATA_PTR; 73 #endif 74 75 /* 76 * TODO(sjg@chromium.org): IMO this code should be 77 * refactored to a single function, something like: 78 * 79 * void led_set_state(enum led_colour_t colour, int on); 80 */ 81 /************************************************************************ 82 * Coloured LED functionality 83 ************************************************************************ 84 * May be supplied by boards if desired 85 */ 86 __weak void coloured_LED_init(void) {} 87 __weak void red_led_on(void) {} 88 __weak void red_led_off(void) {} 89 __weak void green_led_on(void) {} 90 __weak void green_led_off(void) {} 91 __weak void yellow_led_on(void) {} 92 __weak void yellow_led_off(void) {} 93 __weak void blue_led_on(void) {} 94 __weak void blue_led_off(void) {} 95 96 /* 97 * Why is gd allocated a register? Prior to reloc it might be better to 98 * just pass it around to each function in this file? 99 * 100 * After reloc one could argue that it is hardly used and doesn't need 101 * to be in a register. Or if it is it should perhaps hold pointers to all 102 * global data for all modules, so that post-reloc we can avoid the massive 103 * literal pool we get on ARM. Or perhaps just encourage each module to use 104 * a structure... 105 */ 106 107 /* 108 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 109 */ 110 111 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 112 static int init_func_watchdog_init(void) 113 { 114 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 115 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 116 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 117 defined(CONFIG_IMX_WATCHDOG)) 118 hw_watchdog_init(); 119 # endif 120 puts(" Watchdog enabled\n"); 121 WATCHDOG_RESET(); 122 123 return 0; 124 } 125 126 int init_func_watchdog_reset(void) 127 { 128 WATCHDOG_RESET(); 129 130 return 0; 131 } 132 #endif /* CONFIG_WATCHDOG */ 133 134 __weak void board_add_ram_info(int use_default) 135 { 136 /* please define platform specific board_add_ram_info() */ 137 } 138 139 static int init_baud_rate(void) 140 { 141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 142 return 0; 143 } 144 145 static int display_text_info(void) 146 { 147 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 148 ulong bss_start, bss_end, text_base; 149 150 bss_start = (ulong)&__bss_start; 151 bss_end = (ulong)&__bss_end; 152 153 #ifdef CONFIG_SYS_TEXT_BASE 154 text_base = CONFIG_SYS_TEXT_BASE; 155 #else 156 text_base = CONFIG_SYS_MONITOR_BASE; 157 #endif 158 159 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 160 text_base, bss_start, bss_end); 161 #endif 162 163 #ifdef CONFIG_MODEM_SUPPORT 164 debug("Modem Support enabled\n"); 165 #endif 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 181 static int init_func_ram(void) 182 { 183 #ifdef CONFIG_BOARD_TYPES 184 int board_type = gd->board_type; 185 #else 186 int board_type = 0; /* use dummy arg */ 187 #endif 188 189 gd->ram_size = initdram(board_type); 190 191 if (gd->ram_size > 0) 192 return 0; 193 194 puts("*** failed ***\n"); 195 return 1; 196 } 197 #endif 198 199 static int show_dram_config(void) 200 { 201 unsigned long long size; 202 203 #ifdef CONFIG_NR_DRAM_BANKS 204 int i; 205 206 debug("\nRAM Configuration:\n"); 207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 208 size += gd->bd->bi_dram[i].size; 209 debug("Bank #%d: %llx ", i, 210 (unsigned long long)(gd->bd->bi_dram[i].start)); 211 #ifdef DEBUG 212 print_size(gd->bd->bi_dram[i].size, "\n"); 213 #endif 214 } 215 debug("\nDRAM: "); 216 #else 217 size = gd->ram_size; 218 #endif 219 220 print_size(size, ""); 221 board_add_ram_info(0); 222 putc('\n'); 223 224 return 0; 225 } 226 227 __weak void dram_init_banksize(void) 228 { 229 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 230 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 231 gd->bd->bi_dram[0].size = get_effective_memsize(); 232 #endif 233 } 234 235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 236 static int init_func_i2c(void) 237 { 238 puts("I2C: "); 239 #ifdef CONFIG_SYS_I2C 240 i2c_init_all(); 241 #else 242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 243 #endif 244 puts("ready\n"); 245 return 0; 246 } 247 #endif 248 249 #if defined(CONFIG_HARD_SPI) 250 static int init_func_spi(void) 251 { 252 puts("SPI: "); 253 spi_init(); 254 puts("ready\n"); 255 return 0; 256 } 257 #endif 258 259 __maybe_unused 260 static int zero_global_data(void) 261 { 262 memset((void *)gd, '\0', sizeof(gd_t)); 263 264 return 0; 265 } 266 267 static int setup_mon_len(void) 268 { 269 #if defined(__ARM__) || defined(__MICROBLAZE__) 270 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 271 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 272 gd->mon_len = (ulong)&_end - (ulong)_init; 273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 274 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 275 #else 276 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 277 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 278 #endif 279 return 0; 280 } 281 282 __weak int arch_cpu_init(void) 283 { 284 return 0; 285 } 286 287 #ifdef CONFIG_SANDBOX 288 static int setup_ram_buf(void) 289 { 290 struct sandbox_state *state = state_get_current(); 291 292 gd->arch.ram_buf = state->ram_buf; 293 gd->ram_size = state->ram_size; 294 295 return 0; 296 } 297 #endif 298 299 /* Get the top of usable RAM */ 300 __weak ulong board_get_usable_ram_top(ulong total_size) 301 { 302 #ifdef CONFIG_SYS_SDRAM_BASE 303 /* 304 * Detect whether we have so much RAM that it goes past the end of our 305 * 32-bit address space. If so, clip the usable RAM so it doesn't. 306 */ 307 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 308 /* 309 * Will wrap back to top of 32-bit space when reservations 310 * are made. 311 */ 312 return 0; 313 #endif 314 return gd->ram_top; 315 } 316 317 static int setup_dest_addr(void) 318 { 319 debug("Monitor len: %08lX\n", gd->mon_len); 320 /* 321 * Ram is setup, size stored in gd !! 322 */ 323 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 324 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 325 /* 326 * Subtract specified amount of memory to hide so that it won't 327 * get "touched" at all by U-Boot. By fixing up gd->ram_size 328 * the Linux kernel should now get passed the now "corrected" 329 * memory size and won't touch it either. This should work 330 * for arch/ppc and arch/powerpc. Only Linux board ports in 331 * arch/powerpc with bootwrapper support, that recalculate the 332 * memory size from the SDRAM controller setup will have to 333 * get fixed. 334 */ 335 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 336 #endif 337 #ifdef CONFIG_SYS_SDRAM_BASE 338 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 339 #endif 340 gd->ram_top += get_effective_memsize(); 341 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 342 gd->relocaddr = gd->ram_top; 343 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 344 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 345 /* 346 * We need to make sure the location we intend to put secondary core 347 * boot code is reserved and not used by any part of u-boot 348 */ 349 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 350 gd->relocaddr = determine_mp_bootpg(NULL); 351 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 352 } 353 #endif 354 return 0; 355 } 356 357 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 358 static int reserve_logbuffer(void) 359 { 360 /* reserve kernel log buffer */ 361 gd->relocaddr -= LOGBUFF_RESERVE; 362 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 363 gd->relocaddr); 364 return 0; 365 } 366 #endif 367 368 #ifdef CONFIG_PRAM 369 /* reserve protected RAM */ 370 static int reserve_pram(void) 371 { 372 ulong reg; 373 374 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 375 gd->relocaddr -= (reg << 10); /* size is in kB */ 376 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 377 gd->relocaddr); 378 return 0; 379 } 380 #endif /* CONFIG_PRAM */ 381 382 /* Round memory pointer down to next 4 kB limit */ 383 static int reserve_round_4k(void) 384 { 385 gd->relocaddr &= ~(4096 - 1); 386 return 0; 387 } 388 389 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 390 defined(CONFIG_ARM) 391 static int reserve_mmu(void) 392 { 393 /* reserve TLB table */ 394 gd->arch.tlb_size = PGTABLE_SIZE; 395 gd->relocaddr -= gd->arch.tlb_size; 396 397 /* round down to next 64 kB limit */ 398 gd->relocaddr &= ~(0x10000 - 1); 399 400 gd->arch.tlb_addr = gd->relocaddr; 401 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 402 gd->arch.tlb_addr + gd->arch.tlb_size); 403 return 0; 404 } 405 #endif 406 407 #ifdef CONFIG_LCD 408 static int reserve_lcd(void) 409 { 410 #ifdef CONFIG_FB_ADDR 411 gd->fb_base = CONFIG_FB_ADDR; 412 #else 413 /* reserve memory for LCD display (always full pages) */ 414 gd->relocaddr = lcd_setmem(gd->relocaddr); 415 gd->fb_base = gd->relocaddr; 416 #endif /* CONFIG_FB_ADDR */ 417 return 0; 418 } 419 #endif /* CONFIG_LCD */ 420 421 static int reserve_trace(void) 422 { 423 #ifdef CONFIG_TRACE 424 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 425 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 426 debug("Reserving %dk for trace data at: %08lx\n", 427 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 428 #endif 429 430 return 0; 431 } 432 433 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 434 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 435 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 436 static int reserve_video(void) 437 { 438 /* reserve memory for video display (always full pages) */ 439 gd->relocaddr = video_setmem(gd->relocaddr); 440 gd->fb_base = gd->relocaddr; 441 442 return 0; 443 } 444 #endif 445 446 static int reserve_uboot(void) 447 { 448 /* 449 * reserve memory for U-Boot code, data & bss 450 * round down to next 4 kB limit 451 */ 452 gd->relocaddr -= gd->mon_len; 453 gd->relocaddr &= ~(4096 - 1); 454 #ifdef CONFIG_E500 455 /* round down to next 64 kB limit so that IVPR stays aligned */ 456 gd->relocaddr &= ~(65536 - 1); 457 #endif 458 459 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 460 gd->relocaddr); 461 462 gd->start_addr_sp = gd->relocaddr; 463 464 return 0; 465 } 466 467 #ifndef CONFIG_SPL_BUILD 468 /* reserve memory for malloc() area */ 469 static int reserve_malloc(void) 470 { 471 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 472 debug("Reserving %dk for malloc() at: %08lx\n", 473 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 474 return 0; 475 } 476 477 /* (permanently) allocate a Board Info struct */ 478 static int reserve_board(void) 479 { 480 if (!gd->bd) { 481 gd->start_addr_sp -= sizeof(bd_t); 482 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 483 memset(gd->bd, '\0', sizeof(bd_t)); 484 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 485 sizeof(bd_t), gd->start_addr_sp); 486 } 487 return 0; 488 } 489 #endif 490 491 static int setup_machine(void) 492 { 493 #ifdef CONFIG_MACH_TYPE 494 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 495 #endif 496 return 0; 497 } 498 499 static int reserve_global_data(void) 500 { 501 gd->start_addr_sp -= sizeof(gd_t); 502 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 503 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 504 sizeof(gd_t), gd->start_addr_sp); 505 return 0; 506 } 507 508 static int reserve_fdt(void) 509 { 510 /* 511 * If the device tree is sitting immediately above our image then we 512 * must relocate it. If it is embedded in the data section, then it 513 * will be relocated with other data. 514 */ 515 if (gd->fdt_blob) { 516 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 517 518 gd->start_addr_sp -= gd->fdt_size; 519 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 520 debug("Reserving %lu Bytes for FDT at: %08lx\n", 521 gd->fdt_size, gd->start_addr_sp); 522 } 523 524 return 0; 525 } 526 527 int arch_reserve_stacks(void) 528 { 529 return 0; 530 } 531 532 static int reserve_stacks(void) 533 { 534 /* make stack pointer 16-byte aligned */ 535 gd->start_addr_sp -= 16; 536 gd->start_addr_sp &= ~0xf; 537 538 /* 539 * let the architecture-specific code tailor gd->start_addr_sp and 540 * gd->irq_sp 541 */ 542 return arch_reserve_stacks(); 543 } 544 545 static int display_new_sp(void) 546 { 547 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 548 549 return 0; 550 } 551 552 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 553 static int setup_board_part1(void) 554 { 555 bd_t *bd = gd->bd; 556 557 /* 558 * Save local variables to board info struct 559 */ 560 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 561 bd->bi_memsize = gd->ram_size; /* size in bytes */ 562 563 #ifdef CONFIG_SYS_SRAM_BASE 564 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 565 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 566 #endif 567 568 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 569 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 570 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 571 #endif 572 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 573 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 574 #endif 575 #if defined(CONFIG_MPC83xx) 576 bd->bi_immrbar = CONFIG_SYS_IMMR; 577 #endif 578 579 return 0; 580 } 581 582 static int setup_board_part2(void) 583 { 584 bd_t *bd = gd->bd; 585 586 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 587 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 588 #if defined(CONFIG_CPM2) 589 bd->bi_cpmfreq = gd->arch.cpm_clk; 590 bd->bi_brgfreq = gd->arch.brg_clk; 591 bd->bi_sccfreq = gd->arch.scc_clk; 592 bd->bi_vco = gd->arch.vco_out; 593 #endif /* CONFIG_CPM2 */ 594 #if defined(CONFIG_MPC512X) 595 bd->bi_ipsfreq = gd->arch.ips_clk; 596 #endif /* CONFIG_MPC512X */ 597 #if defined(CONFIG_MPC5xxx) 598 bd->bi_ipbfreq = gd->arch.ipb_clk; 599 bd->bi_pcifreq = gd->pci_clk; 600 #endif /* CONFIG_MPC5xxx */ 601 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 602 bd->bi_pcifreq = gd->pci_clk; 603 #endif 604 #if defined(CONFIG_EXTRA_CLOCK) 605 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 606 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 607 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 608 #endif 609 610 return 0; 611 } 612 #endif 613 614 #ifdef CONFIG_SYS_EXTBDINFO 615 static int setup_board_extra(void) 616 { 617 bd_t *bd = gd->bd; 618 619 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 620 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 621 sizeof(bd->bi_r_version)); 622 623 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 624 bd->bi_plb_busfreq = gd->bus_clk; 625 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 626 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 627 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 628 bd->bi_pci_busfreq = get_PCI_freq(); 629 bd->bi_opbfreq = get_OPB_freq(); 630 #elif defined(CONFIG_XILINX_405) 631 bd->bi_pci_busfreq = get_PCI_freq(); 632 #endif 633 634 return 0; 635 } 636 #endif 637 638 #ifdef CONFIG_POST 639 static int init_post(void) 640 { 641 post_bootmode_init(); 642 post_run(NULL, POST_ROM | post_bootmode_get(0)); 643 644 return 0; 645 } 646 #endif 647 648 static int setup_dram_config(void) 649 { 650 /* Ram is board specific, so move it to board code ... */ 651 dram_init_banksize(); 652 653 return 0; 654 } 655 656 static int reloc_fdt(void) 657 { 658 if (gd->flags & GD_FLG_SKIP_RELOC) 659 return 0; 660 if (gd->new_fdt) { 661 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 662 gd->fdt_blob = gd->new_fdt; 663 } 664 665 return 0; 666 } 667 668 static int setup_reloc(void) 669 { 670 if (gd->flags & GD_FLG_SKIP_RELOC) { 671 debug("Skipping relocation due to flag\n"); 672 return 0; 673 } 674 675 #ifdef CONFIG_SYS_TEXT_BASE 676 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 677 #ifdef CONFIG_M68K 678 /* 679 * On all ColdFire arch cpu, monitor code starts always 680 * just after the default vector table location, so at 0x400 681 */ 682 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 683 #endif 684 #endif 685 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 686 687 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 688 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 689 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 690 gd->start_addr_sp); 691 692 return 0; 693 } 694 695 /* ARM calls relocate_code from its crt0.S */ 696 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 697 698 static int jump_to_copy(void) 699 { 700 if (gd->flags & GD_FLG_SKIP_RELOC) 701 return 0; 702 /* 703 * x86 is special, but in a nice way. It uses a trampoline which 704 * enables the dcache if possible. 705 * 706 * For now, other archs use relocate_code(), which is implemented 707 * similarly for all archs. When we do generic relocation, hopefully 708 * we can make all archs enable the dcache prior to relocation. 709 */ 710 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 711 /* 712 * SDRAM and console are now initialised. The final stack can now 713 * be setup in SDRAM. Code execution will continue in Flash, but 714 * with the stack in SDRAM and Global Data in temporary memory 715 * (CPU cache) 716 */ 717 board_init_f_r_trampoline(gd->start_addr_sp); 718 #else 719 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 720 #endif 721 722 return 0; 723 } 724 #endif 725 726 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 727 static int mark_bootstage(void) 728 { 729 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 730 731 return 0; 732 } 733 734 static int initf_dm(void) 735 { 736 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 737 int ret; 738 739 ret = dm_init_and_scan(true); 740 if (ret) 741 return ret; 742 #endif 743 744 return 0; 745 } 746 747 /* Architecture-specific memory reservation */ 748 __weak int reserve_arch(void) 749 { 750 return 0; 751 } 752 753 __weak int arch_cpu_init_dm(void) 754 { 755 return 0; 756 } 757 758 static init_fnc_t init_sequence_f[] = { 759 #ifdef CONFIG_SANDBOX 760 setup_ram_buf, 761 #endif 762 setup_mon_len, 763 #ifdef CONFIG_OF_CONTROL 764 fdtdec_setup, 765 #endif 766 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) 767 x86_fsp_init, 768 #endif 769 #ifdef CONFIG_TRACE 770 trace_early_init, 771 #endif 772 initf_malloc, 773 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 774 /* TODO: can this go into arch_cpu_init()? */ 775 probecpu, 776 #endif 777 arch_cpu_init, /* basic arch cpu dependent setup */ 778 mark_bootstage, 779 initf_dm, 780 arch_cpu_init_dm, 781 #if defined(CONFIG_BOARD_EARLY_INIT_F) 782 board_early_init_f, 783 #endif 784 /* TODO: can any of this go into arch_cpu_init()? */ 785 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 786 get_clocks, /* get CPU and bus clocks (etc.) */ 787 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 788 && !defined(CONFIG_TQM885D) 789 adjust_sdram_tbs_8xx, 790 #endif 791 /* TODO: can we rename this to timer_init()? */ 792 init_timebase, 793 #endif 794 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN) 795 timer_init, /* initialize timer */ 796 #endif 797 #ifdef CONFIG_SYS_ALLOC_DPRAM 798 #if !defined(CONFIG_CPM2) 799 dpram_init, 800 #endif 801 #endif 802 #if defined(CONFIG_BOARD_POSTCLK_INIT) 803 board_postclk_init, 804 #endif 805 #ifdef CONFIG_FSL_ESDHC 806 get_clocks, 807 #endif 808 #ifdef CONFIG_M68K 809 get_clocks, 810 #endif 811 env_init, /* initialize environment */ 812 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 813 /* get CPU and bus clocks according to the environment variable */ 814 get_clocks_866, 815 /* adjust sdram refresh rate according to the new clock */ 816 sdram_adjust_866, 817 init_timebase, 818 #endif 819 init_baud_rate, /* initialze baudrate settings */ 820 serial_init, /* serial communications setup */ 821 console_init_f, /* stage 1 init of console */ 822 #ifdef CONFIG_SANDBOX 823 sandbox_early_getopt_check, 824 #endif 825 #ifdef CONFIG_OF_CONTROL 826 fdtdec_prepare_fdt, 827 #endif 828 display_options, /* say that we are here */ 829 display_text_info, /* show debugging info if required */ 830 #if defined(CONFIG_MPC8260) 831 prt_8260_rsr, 832 prt_8260_clks, 833 #endif /* CONFIG_MPC8260 */ 834 #if defined(CONFIG_MPC83xx) 835 prt_83xx_rsr, 836 #endif 837 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 838 checkcpu, 839 #endif 840 print_cpuinfo, /* display cpu info (and speed) */ 841 #if defined(CONFIG_MPC5xxx) 842 prt_mpc5xxx_clks, 843 #endif /* CONFIG_MPC5xxx */ 844 #if defined(CONFIG_DISPLAY_BOARDINFO) 845 show_board_info, 846 #endif 847 INIT_FUNC_WATCHDOG_INIT 848 #if defined(CONFIG_MISC_INIT_F) 849 misc_init_f, 850 #endif 851 INIT_FUNC_WATCHDOG_RESET 852 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 853 init_func_i2c, 854 #endif 855 #if defined(CONFIG_HARD_SPI) 856 init_func_spi, 857 #endif 858 announce_dram_init, 859 /* TODO: unify all these dram functions? */ 860 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) 861 dram_init, /* configure available RAM banks */ 862 #endif 863 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 864 init_func_ram, 865 #endif 866 #ifdef CONFIG_POST 867 post_init_f, 868 #endif 869 INIT_FUNC_WATCHDOG_RESET 870 #if defined(CONFIG_SYS_DRAM_TEST) 871 testdram, 872 #endif /* CONFIG_SYS_DRAM_TEST */ 873 INIT_FUNC_WATCHDOG_RESET 874 875 #ifdef CONFIG_POST 876 init_post, 877 #endif 878 INIT_FUNC_WATCHDOG_RESET 879 /* 880 * Now that we have DRAM mapped and working, we can 881 * relocate the code and continue running from DRAM. 882 * 883 * Reserve memory at end of RAM for (top down in that order): 884 * - area that won't get touched by U-Boot and Linux (optional) 885 * - kernel log buffer 886 * - protected RAM 887 * - LCD framebuffer 888 * - monitor code 889 * - board info struct 890 */ 891 setup_dest_addr, 892 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 893 /* Blackfin u-boot monitor should be on top of the ram */ 894 reserve_uboot, 895 #endif 896 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 897 reserve_logbuffer, 898 #endif 899 #ifdef CONFIG_PRAM 900 reserve_pram, 901 #endif 902 reserve_round_4k, 903 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 904 defined(CONFIG_ARM) 905 reserve_mmu, 906 #endif 907 #ifdef CONFIG_LCD 908 reserve_lcd, 909 #endif 910 reserve_trace, 911 /* TODO: Why the dependency on CONFIG_8xx? */ 912 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 913 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 914 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 915 reserve_video, 916 #endif 917 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2) 918 reserve_uboot, 919 #endif 920 #ifndef CONFIG_SPL_BUILD 921 reserve_malloc, 922 reserve_board, 923 #endif 924 setup_machine, 925 reserve_global_data, 926 reserve_fdt, 927 reserve_arch, 928 reserve_stacks, 929 setup_dram_config, 930 show_dram_config, 931 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 932 setup_board_part1, 933 INIT_FUNC_WATCHDOG_RESET 934 setup_board_part2, 935 #endif 936 display_new_sp, 937 #ifdef CONFIG_SYS_EXTBDINFO 938 setup_board_extra, 939 #endif 940 INIT_FUNC_WATCHDOG_RESET 941 reloc_fdt, 942 setup_reloc, 943 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 944 copy_uboot_to_ram, 945 clear_bss, 946 do_elf_reloc_fixups, 947 #endif 948 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 949 jump_to_copy, 950 #endif 951 NULL, 952 }; 953 954 void board_init_f(ulong boot_flags) 955 { 956 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 957 /* 958 * For some archtectures, global data is initialized and used before 959 * calling this function. The data should be preserved. For others, 960 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 961 * here to host global data until relocation. 962 */ 963 gd_t data; 964 965 gd = &data; 966 967 /* 968 * Clear global data before it is accessed at debug print 969 * in initcall_run_list. Otherwise the debug print probably 970 * get the wrong vaule of gd->have_console. 971 */ 972 zero_global_data(); 973 #endif 974 975 gd->flags = boot_flags; 976 gd->have_console = 0; 977 978 if (initcall_run_list(init_sequence_f)) 979 hang(); 980 981 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 982 !defined(CONFIG_EFI_APP) 983 /* NOTREACHED - jump_to_copy() does not return */ 984 hang(); 985 #endif 986 } 987 988 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 989 /* 990 * For now this code is only used on x86. 991 * 992 * init_sequence_f_r is the list of init functions which are run when 993 * U-Boot is executing from Flash with a semi-limited 'C' environment. 994 * The following limitations must be considered when implementing an 995 * '_f_r' function: 996 * - 'static' variables are read-only 997 * - Global Data (gd->xxx) is read/write 998 * 999 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1000 * supported). It _should_, if possible, copy global data to RAM and 1001 * initialise the CPU caches (to speed up the relocation process) 1002 * 1003 * NOTE: At present only x86 uses this route, but it is intended that 1004 * all archs will move to this when generic relocation is implemented. 1005 */ 1006 static init_fnc_t init_sequence_f_r[] = { 1007 init_cache_f_r, 1008 1009 NULL, 1010 }; 1011 1012 void board_init_f_r(void) 1013 { 1014 if (initcall_run_list(init_sequence_f_r)) 1015 hang(); 1016 1017 /* 1018 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1019 * Transfer execution from Flash to RAM by calculating the address 1020 * of the in-RAM copy of board_init_r() and calling it 1021 */ 1022 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1023 1024 /* NOTREACHED - board_init_r() does not return */ 1025 hang(); 1026 } 1027 #endif /* CONFIG_X86 */ 1028 1029 #ifndef CONFIG_X86 1030 ulong board_init_f_mem(ulong top) 1031 { 1032 /* Leave space for the stack we are running with now */ 1033 top -= 0x40; 1034 1035 top -= sizeof(struct global_data); 1036 top = ALIGN(top, 16); 1037 gd = (struct global_data *)top; 1038 memset((void *)gd, '\0', sizeof(*gd)); 1039 1040 #ifdef CONFIG_SYS_MALLOC_F_LEN 1041 top -= CONFIG_SYS_MALLOC_F_LEN; 1042 gd->malloc_base = top; 1043 #endif 1044 1045 return top; 1046 } 1047 #endif /* !CONFIG_X86 */ 1048