1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #if defined(CONFIG_CMD_IDE) 21 #include <ide.h> 22 #endif 23 #include <i2c.h> 24 #include <initcall.h> 25 #include <logbuff.h> 26 27 /* TODO: Can we move these into arch/ headers? */ 28 #ifdef CONFIG_8xx 29 #include <mpc8xx.h> 30 #endif 31 #ifdef CONFIG_5xx 32 #include <mpc5xx.h> 33 #endif 34 #ifdef CONFIG_MPC5xxx 35 #include <mpc5xxx.h> 36 #endif 37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 38 #include <asm/mp.h> 39 #endif 40 41 #include <os.h> 42 #include <post.h> 43 #include <spi.h> 44 #include <status_led.h> 45 #include <trace.h> 46 #include <watchdog.h> 47 #include <asm/errno.h> 48 #include <asm/io.h> 49 #include <asm/sections.h> 50 #ifdef CONFIG_X86 51 #include <asm/init_helpers.h> 52 #include <asm/relocate.h> 53 #endif 54 #ifdef CONFIG_SANDBOX 55 #include <asm/state.h> 56 #endif 57 #include <dm/root.h> 58 #include <linux/compiler.h> 59 60 /* 61 * Pointer to initial global data area 62 * 63 * Here we initialize it if needed. 64 */ 65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 69 #else 70 DECLARE_GLOBAL_DATA_PTR; 71 #endif 72 73 /* 74 * sjg: IMO this code should be 75 * refactored to a single function, something like: 76 * 77 * void led_set_state(enum led_colour_t colour, int on); 78 */ 79 /************************************************************************ 80 * Coloured LED functionality 81 ************************************************************************ 82 * May be supplied by boards if desired 83 */ 84 __weak void coloured_LED_init(void) {} 85 __weak void red_led_on(void) {} 86 __weak void red_led_off(void) {} 87 __weak void green_led_on(void) {} 88 __weak void green_led_off(void) {} 89 __weak void yellow_led_on(void) {} 90 __weak void yellow_led_off(void) {} 91 __weak void blue_led_on(void) {} 92 __weak void blue_led_off(void) {} 93 94 /* 95 * Why is gd allocated a register? Prior to reloc it might be better to 96 * just pass it around to each function in this file? 97 * 98 * After reloc one could argue that it is hardly used and doesn't need 99 * to be in a register. Or if it is it should perhaps hold pointers to all 100 * global data for all modules, so that post-reloc we can avoid the massive 101 * literal pool we get on ARM. Or perhaps just encourage each module to use 102 * a structure... 103 */ 104 105 /* 106 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 107 */ 108 109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 110 static int init_func_watchdog_init(void) 111 { 112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 114 defined(CONFIG_SH)) 115 hw_watchdog_init(); 116 # endif 117 puts(" Watchdog enabled\n"); 118 WATCHDOG_RESET(); 119 120 return 0; 121 } 122 123 int init_func_watchdog_reset(void) 124 { 125 WATCHDOG_RESET(); 126 127 return 0; 128 } 129 #endif /* CONFIG_WATCHDOG */ 130 131 __weak void board_add_ram_info(int use_default) 132 { 133 /* please define platform specific board_add_ram_info() */ 134 } 135 136 static int init_baud_rate(void) 137 { 138 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 139 return 0; 140 } 141 142 static int display_text_info(void) 143 { 144 #ifndef CONFIG_SANDBOX 145 ulong bss_start, bss_end; 146 147 bss_start = (ulong)&__bss_start; 148 bss_end = (ulong)&__bss_end; 149 150 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", 151 #ifdef CONFIG_SYS_TEXT_BASE 152 CONFIG_SYS_TEXT_BASE, bss_start, bss_end); 153 #else 154 CONFIG_SYS_MONITOR_BASE, bss_start, bss_end); 155 #endif 156 #endif 157 158 #ifdef CONFIG_MODEM_SUPPORT 159 debug("Modem Support enabled\n"); 160 #endif 161 #ifdef CONFIG_USE_IRQ 162 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 163 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 164 #endif 165 166 return 0; 167 } 168 169 static int announce_dram_init(void) 170 { 171 puts("DRAM: "); 172 return 0; 173 } 174 175 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 176 static int init_func_ram(void) 177 { 178 #ifdef CONFIG_BOARD_TYPES 179 int board_type = gd->board_type; 180 #else 181 int board_type = 0; /* use dummy arg */ 182 #endif 183 184 gd->ram_size = initdram(board_type); 185 186 if (gd->ram_size > 0) 187 return 0; 188 189 puts("*** failed ***\n"); 190 return 1; 191 } 192 #endif 193 194 static int show_dram_config(void) 195 { 196 unsigned long long size; 197 198 #ifdef CONFIG_NR_DRAM_BANKS 199 int i; 200 201 debug("\nRAM Configuration:\n"); 202 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 203 size += gd->bd->bi_dram[i].size; 204 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 205 #ifdef DEBUG 206 print_size(gd->bd->bi_dram[i].size, "\n"); 207 #endif 208 } 209 debug("\nDRAM: "); 210 #else 211 size = gd->ram_size; 212 #endif 213 214 print_size(size, ""); 215 board_add_ram_info(0); 216 putc('\n'); 217 218 return 0; 219 } 220 221 __weak void dram_init_banksize(void) 222 { 223 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 224 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 225 gd->bd->bi_dram[0].size = get_effective_memsize(); 226 #endif 227 } 228 229 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 230 static int init_func_i2c(void) 231 { 232 puts("I2C: "); 233 #ifdef CONFIG_SYS_I2C 234 i2c_init_all(); 235 #else 236 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 237 #endif 238 puts("ready\n"); 239 return 0; 240 } 241 #endif 242 243 #if defined(CONFIG_HARD_SPI) 244 static int init_func_spi(void) 245 { 246 puts("SPI: "); 247 spi_init(); 248 puts("ready\n"); 249 return 0; 250 } 251 #endif 252 253 __maybe_unused 254 static int zero_global_data(void) 255 { 256 memset((void *)gd, '\0', sizeof(gd_t)); 257 258 return 0; 259 } 260 261 static int setup_mon_len(void) 262 { 263 #ifdef __ARM__ 264 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 265 #elif defined(CONFIG_SANDBOX) 266 gd->mon_len = (ulong)&_end - (ulong)_init; 267 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 268 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 269 #else 270 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 271 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 272 #endif 273 return 0; 274 } 275 276 __weak int arch_cpu_init(void) 277 { 278 return 0; 279 } 280 281 #ifdef CONFIG_OF_HOSTFILE 282 283 static int read_fdt_from_file(void) 284 { 285 struct sandbox_state *state = state_get_current(); 286 const char *fname = state->fdt_fname; 287 void *blob; 288 ssize_t size; 289 int err; 290 int fd; 291 292 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 293 if (!state->fdt_fname) { 294 err = fdt_create_empty_tree(blob, 256); 295 if (!err) 296 goto done; 297 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 298 return -EINVAL; 299 } 300 301 size = os_get_filesize(fname); 302 if (size < 0) { 303 printf("Failed to file FDT file '%s'\n", fname); 304 return -ENOENT; 305 } 306 fd = os_open(fname, OS_O_RDONLY); 307 if (fd < 0) { 308 printf("Failed to open FDT file '%s'\n", fname); 309 return -EACCES; 310 } 311 if (os_read(fd, blob, size) != size) { 312 os_close(fd); 313 return -EIO; 314 } 315 os_close(fd); 316 317 done: 318 gd->fdt_blob = blob; 319 320 return 0; 321 } 322 #endif 323 324 #ifdef CONFIG_SANDBOX 325 static int setup_ram_buf(void) 326 { 327 struct sandbox_state *state = state_get_current(); 328 329 gd->arch.ram_buf = state->ram_buf; 330 gd->ram_size = state->ram_size; 331 332 return 0; 333 } 334 #endif 335 336 static int setup_fdt(void) 337 { 338 #ifdef CONFIG_OF_CONTROL 339 # ifdef CONFIG_OF_EMBED 340 /* Get a pointer to the FDT */ 341 gd->fdt_blob = __dtb_dt_begin; 342 # elif defined CONFIG_OF_SEPARATE 343 /* FDT is at end of image */ 344 gd->fdt_blob = (ulong *)&_end; 345 # elif defined(CONFIG_OF_HOSTFILE) 346 if (read_fdt_from_file()) { 347 puts("Failed to read control FDT\n"); 348 return -1; 349 } 350 # endif 351 /* Allow the early environment to override the fdt address */ 352 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 353 (uintptr_t)gd->fdt_blob); 354 #endif 355 return 0; 356 } 357 358 /* Get the top of usable RAM */ 359 __weak ulong board_get_usable_ram_top(ulong total_size) 360 { 361 return gd->ram_top; 362 } 363 364 static int setup_dest_addr(void) 365 { 366 debug("Monitor len: %08lX\n", gd->mon_len); 367 /* 368 * Ram is setup, size stored in gd !! 369 */ 370 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 371 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 372 /* 373 * Subtract specified amount of memory to hide so that it won't 374 * get "touched" at all by U-Boot. By fixing up gd->ram_size 375 * the Linux kernel should now get passed the now "corrected" 376 * memory size and won't touch it either. This should work 377 * for arch/ppc and arch/powerpc. Only Linux board ports in 378 * arch/powerpc with bootwrapper support, that recalculate the 379 * memory size from the SDRAM controller setup will have to 380 * get fixed. 381 */ 382 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 383 #endif 384 #ifdef CONFIG_SYS_SDRAM_BASE 385 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 386 #endif 387 gd->ram_top += get_effective_memsize(); 388 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 389 gd->relocaddr = gd->ram_top; 390 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 391 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 392 /* 393 * We need to make sure the location we intend to put secondary core 394 * boot code is reserved and not used by any part of u-boot 395 */ 396 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 397 gd->relocaddr = determine_mp_bootpg(NULL); 398 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 399 } 400 #endif 401 return 0; 402 } 403 404 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 405 static int reserve_logbuffer(void) 406 { 407 /* reserve kernel log buffer */ 408 gd->relocaddr -= LOGBUFF_RESERVE; 409 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 410 gd->relocaddr); 411 return 0; 412 } 413 #endif 414 415 #ifdef CONFIG_PRAM 416 /* reserve protected RAM */ 417 static int reserve_pram(void) 418 { 419 ulong reg; 420 421 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 422 gd->relocaddr -= (reg << 10); /* size is in kB */ 423 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 424 gd->relocaddr); 425 return 0; 426 } 427 #endif /* CONFIG_PRAM */ 428 429 /* Round memory pointer down to next 4 kB limit */ 430 static int reserve_round_4k(void) 431 { 432 gd->relocaddr &= ~(4096 - 1); 433 return 0; 434 } 435 436 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 437 defined(CONFIG_ARM) 438 static int reserve_mmu(void) 439 { 440 /* reserve TLB table */ 441 gd->arch.tlb_size = PGTABLE_SIZE; 442 gd->relocaddr -= gd->arch.tlb_size; 443 444 /* round down to next 64 kB limit */ 445 gd->relocaddr &= ~(0x10000 - 1); 446 447 gd->arch.tlb_addr = gd->relocaddr; 448 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 449 gd->arch.tlb_addr + gd->arch.tlb_size); 450 return 0; 451 } 452 #endif 453 454 #ifdef CONFIG_LCD 455 static int reserve_lcd(void) 456 { 457 #ifdef CONFIG_FB_ADDR 458 gd->fb_base = CONFIG_FB_ADDR; 459 #else 460 /* reserve memory for LCD display (always full pages) */ 461 gd->relocaddr = lcd_setmem(gd->relocaddr); 462 gd->fb_base = gd->relocaddr; 463 #endif /* CONFIG_FB_ADDR */ 464 return 0; 465 } 466 #endif /* CONFIG_LCD */ 467 468 static int reserve_trace(void) 469 { 470 #ifdef CONFIG_TRACE 471 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 472 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 473 debug("Reserving %dk for trace data at: %08lx\n", 474 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 475 #endif 476 477 return 0; 478 } 479 480 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 481 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 482 !defined(CONFIG_BLACKFIN) 483 static int reserve_video(void) 484 { 485 /* reserve memory for video display (always full pages) */ 486 gd->relocaddr = video_setmem(gd->relocaddr); 487 gd->fb_base = gd->relocaddr; 488 489 return 0; 490 } 491 #endif 492 493 static int reserve_uboot(void) 494 { 495 /* 496 * reserve memory for U-Boot code, data & bss 497 * round down to next 4 kB limit 498 */ 499 gd->relocaddr -= gd->mon_len; 500 gd->relocaddr &= ~(4096 - 1); 501 #ifdef CONFIG_E500 502 /* round down to next 64 kB limit so that IVPR stays aligned */ 503 gd->relocaddr &= ~(65536 - 1); 504 #endif 505 506 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 507 gd->relocaddr); 508 509 gd->start_addr_sp = gd->relocaddr; 510 511 return 0; 512 } 513 514 #ifndef CONFIG_SPL_BUILD 515 /* reserve memory for malloc() area */ 516 static int reserve_malloc(void) 517 { 518 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 519 debug("Reserving %dk for malloc() at: %08lx\n", 520 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 521 return 0; 522 } 523 524 /* (permanently) allocate a Board Info struct */ 525 static int reserve_board(void) 526 { 527 if (!gd->bd) { 528 gd->start_addr_sp -= sizeof(bd_t); 529 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 530 memset(gd->bd, '\0', sizeof(bd_t)); 531 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 532 sizeof(bd_t), gd->start_addr_sp); 533 } 534 return 0; 535 } 536 #endif 537 538 static int setup_machine(void) 539 { 540 #ifdef CONFIG_MACH_TYPE 541 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 542 #endif 543 return 0; 544 } 545 546 static int reserve_global_data(void) 547 { 548 gd->start_addr_sp -= sizeof(gd_t); 549 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 550 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 551 sizeof(gd_t), gd->start_addr_sp); 552 return 0; 553 } 554 555 static int reserve_fdt(void) 556 { 557 /* 558 * If the device tree is sitting immediate above our image then we 559 * must relocate it. If it is embedded in the data section, then it 560 * will be relocated with other data. 561 */ 562 if (gd->fdt_blob) { 563 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 564 565 gd->start_addr_sp -= gd->fdt_size; 566 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 567 debug("Reserving %lu Bytes for FDT at: %08lx\n", 568 gd->fdt_size, gd->start_addr_sp); 569 } 570 571 return 0; 572 } 573 574 static int reserve_stacks(void) 575 { 576 #ifdef CONFIG_SPL_BUILD 577 # ifdef CONFIG_ARM 578 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ 579 gd->irq_sp = gd->start_addr_sp; 580 # endif 581 #else 582 # if defined(CONFIG_PPC) || defined(CONFIG_MIPS) 583 ulong *s; 584 # endif 585 586 /* setup stack pointer for exceptions */ 587 gd->start_addr_sp -= 16; 588 gd->start_addr_sp &= ~0xf; 589 gd->irq_sp = gd->start_addr_sp; 590 591 /* 592 * Handle architecture-specific things here 593 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() 594 * to handle this and put in arch/xxx/lib/stack.c 595 */ 596 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) 597 # ifdef CONFIG_USE_IRQ 598 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); 599 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", 600 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); 601 602 /* 8-byte alignment for ARM ABI compliance */ 603 gd->start_addr_sp &= ~0x07; 604 # endif 605 /* leave 3 words for abort-stack, plus 1 for alignment */ 606 gd->start_addr_sp -= 16; 607 # elif defined(CONFIG_PPC) 608 /* Clear initial stack frame */ 609 s = (ulong *) gd->start_addr_sp; 610 *s = 0; /* Terminate back chain */ 611 *++s = 0; /* NULL return address */ 612 # elif defined(CONFIG_MIPS) 613 /* Clear initial stack frame */ 614 s = (ulong *) gd->start_addr_sp; 615 *s-- = 0; 616 *s-- = 0; 617 gd->start_addr_sp = (ulong) s; 618 # endif /* Architecture specific code */ 619 620 return 0; 621 #endif 622 } 623 624 static int display_new_sp(void) 625 { 626 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 627 628 return 0; 629 } 630 631 #ifdef CONFIG_PPC 632 static int setup_board_part1(void) 633 { 634 bd_t *bd = gd->bd; 635 636 /* 637 * Save local variables to board info struct 638 */ 639 640 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 641 bd->bi_memsize = gd->ram_size; /* size in bytes */ 642 643 #ifdef CONFIG_SYS_SRAM_BASE 644 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 645 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 646 #endif 647 648 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 649 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 650 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 651 #endif 652 #if defined(CONFIG_MPC5xxx) 653 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 654 #endif 655 #if defined(CONFIG_MPC83xx) 656 bd->bi_immrbar = CONFIG_SYS_IMMR; 657 #endif 658 659 return 0; 660 } 661 662 static int setup_board_part2(void) 663 { 664 bd_t *bd = gd->bd; 665 666 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 667 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 668 #if defined(CONFIG_CPM2) 669 bd->bi_cpmfreq = gd->arch.cpm_clk; 670 bd->bi_brgfreq = gd->arch.brg_clk; 671 bd->bi_sccfreq = gd->arch.scc_clk; 672 bd->bi_vco = gd->arch.vco_out; 673 #endif /* CONFIG_CPM2 */ 674 #if defined(CONFIG_MPC512X) 675 bd->bi_ipsfreq = gd->arch.ips_clk; 676 #endif /* CONFIG_MPC512X */ 677 #if defined(CONFIG_MPC5xxx) 678 bd->bi_ipbfreq = gd->arch.ipb_clk; 679 bd->bi_pcifreq = gd->pci_clk; 680 #endif /* CONFIG_MPC5xxx */ 681 682 return 0; 683 } 684 #endif 685 686 #ifdef CONFIG_SYS_EXTBDINFO 687 static int setup_board_extra(void) 688 { 689 bd_t *bd = gd->bd; 690 691 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 692 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 693 sizeof(bd->bi_r_version)); 694 695 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 696 bd->bi_plb_busfreq = gd->bus_clk; 697 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 698 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 699 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 700 bd->bi_pci_busfreq = get_PCI_freq(); 701 bd->bi_opbfreq = get_OPB_freq(); 702 #elif defined(CONFIG_XILINX_405) 703 bd->bi_pci_busfreq = get_PCI_freq(); 704 #endif 705 706 return 0; 707 } 708 #endif 709 710 #ifdef CONFIG_POST 711 static int init_post(void) 712 { 713 post_bootmode_init(); 714 post_run(NULL, POST_ROM | post_bootmode_get(0)); 715 716 return 0; 717 } 718 #endif 719 720 static int setup_dram_config(void) 721 { 722 /* Ram is board specific, so move it to board code ... */ 723 dram_init_banksize(); 724 725 return 0; 726 } 727 728 static int reloc_fdt(void) 729 { 730 if (gd->new_fdt) { 731 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 732 gd->fdt_blob = gd->new_fdt; 733 } 734 735 return 0; 736 } 737 738 static int setup_reloc(void) 739 { 740 #ifdef CONFIG_SYS_TEXT_BASE 741 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 742 #endif 743 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 744 745 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 746 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 747 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 748 gd->start_addr_sp); 749 750 return 0; 751 } 752 753 /* ARM calls relocate_code from its crt0.S */ 754 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 755 756 static int jump_to_copy(void) 757 { 758 /* 759 * x86 is special, but in a nice way. It uses a trampoline which 760 * enables the dcache if possible. 761 * 762 * For now, other archs use relocate_code(), which is implemented 763 * similarly for all archs. When we do generic relocation, hopefully 764 * we can make all archs enable the dcache prior to relocation. 765 */ 766 #ifdef CONFIG_X86 767 /* 768 * SDRAM and console are now initialised. The final stack can now 769 * be setup in SDRAM. Code execution will continue in Flash, but 770 * with the stack in SDRAM and Global Data in temporary memory 771 * (CPU cache) 772 */ 773 board_init_f_r_trampoline(gd->start_addr_sp); 774 #else 775 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 776 #endif 777 778 return 0; 779 } 780 #endif 781 782 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 783 static int mark_bootstage(void) 784 { 785 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 786 787 return 0; 788 } 789 790 static int initf_malloc(void) 791 { 792 #ifdef CONFIG_SYS_MALLOC_F_LEN 793 assert(gd->malloc_base); /* Set up by crt0.S */ 794 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN; 795 gd->malloc_ptr = 0; 796 #endif 797 798 return 0; 799 } 800 801 static int initf_dm(void) 802 { 803 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 804 int ret; 805 806 ret = dm_init_and_scan(true); 807 if (ret) 808 return ret; 809 #endif 810 811 return 0; 812 } 813 814 static init_fnc_t init_sequence_f[] = { 815 #ifdef CONFIG_SANDBOX 816 setup_ram_buf, 817 #endif 818 setup_mon_len, 819 setup_fdt, 820 trace_early_init, 821 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 822 /* TODO: can this go into arch_cpu_init()? */ 823 probecpu, 824 #endif 825 arch_cpu_init, /* basic arch cpu dependent setup */ 826 #ifdef CONFIG_X86 827 cpu_init_f, /* TODO(sjg@chromium.org): remove */ 828 # ifdef CONFIG_OF_CONTROL 829 find_fdt, /* TODO(sjg@chromium.org): remove */ 830 # endif 831 #endif 832 mark_bootstage, 833 #ifdef CONFIG_OF_CONTROL 834 fdtdec_check_fdt, 835 #endif 836 initf_malloc, 837 initf_dm, 838 #if defined(CONFIG_BOARD_EARLY_INIT_F) 839 board_early_init_f, 840 #endif 841 /* TODO: can any of this go into arch_cpu_init()? */ 842 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 843 get_clocks, /* get CPU and bus clocks (etc.) */ 844 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 845 && !defined(CONFIG_TQM885D) 846 adjust_sdram_tbs_8xx, 847 #endif 848 /* TODO: can we rename this to timer_init()? */ 849 init_timebase, 850 #endif 851 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN) 852 timer_init, /* initialize timer */ 853 #endif 854 #ifdef CONFIG_SYS_ALLOC_DPRAM 855 #if !defined(CONFIG_CPM2) 856 dpram_init, 857 #endif 858 #endif 859 #if defined(CONFIG_BOARD_POSTCLK_INIT) 860 board_postclk_init, 861 #endif 862 #ifdef CONFIG_FSL_ESDHC 863 get_clocks, 864 #endif 865 env_init, /* initialize environment */ 866 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 867 /* get CPU and bus clocks according to the environment variable */ 868 get_clocks_866, 869 /* adjust sdram refresh rate according to the new clock */ 870 sdram_adjust_866, 871 init_timebase, 872 #endif 873 init_baud_rate, /* initialze baudrate settings */ 874 serial_init, /* serial communications setup */ 875 console_init_f, /* stage 1 init of console */ 876 #ifdef CONFIG_SANDBOX 877 sandbox_early_getopt_check, 878 #endif 879 #ifdef CONFIG_OF_CONTROL 880 fdtdec_prepare_fdt, 881 #endif 882 display_options, /* say that we are here */ 883 display_text_info, /* show debugging info if required */ 884 #if defined(CONFIG_MPC8260) 885 prt_8260_rsr, 886 prt_8260_clks, 887 #endif /* CONFIG_MPC8260 */ 888 #if defined(CONFIG_MPC83xx) 889 prt_83xx_rsr, 890 #endif 891 #ifdef CONFIG_PPC 892 checkcpu, 893 #endif 894 print_cpuinfo, /* display cpu info (and speed) */ 895 #if defined(CONFIG_MPC5xxx) 896 prt_mpc5xxx_clks, 897 #endif /* CONFIG_MPC5xxx */ 898 #if defined(CONFIG_DISPLAY_BOARDINFO) 899 checkboard, /* display board info */ 900 #endif 901 INIT_FUNC_WATCHDOG_INIT 902 #if defined(CONFIG_MISC_INIT_F) 903 misc_init_f, 904 #endif 905 INIT_FUNC_WATCHDOG_RESET 906 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 907 init_func_i2c, 908 #endif 909 #if defined(CONFIG_HARD_SPI) 910 init_func_spi, 911 #endif 912 #ifdef CONFIG_X86 913 dram_init_f, /* configure available RAM banks */ 914 calculate_relocation_address, 915 #endif 916 announce_dram_init, 917 /* TODO: unify all these dram functions? */ 918 #ifdef CONFIG_ARM 919 dram_init, /* configure available RAM banks */ 920 #endif 921 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 922 init_func_ram, 923 #endif 924 #ifdef CONFIG_POST 925 post_init_f, 926 #endif 927 INIT_FUNC_WATCHDOG_RESET 928 #if defined(CONFIG_SYS_DRAM_TEST) 929 testdram, 930 #endif /* CONFIG_SYS_DRAM_TEST */ 931 INIT_FUNC_WATCHDOG_RESET 932 933 #ifdef CONFIG_POST 934 init_post, 935 #endif 936 INIT_FUNC_WATCHDOG_RESET 937 /* 938 * Now that we have DRAM mapped and working, we can 939 * relocate the code and continue running from DRAM. 940 * 941 * Reserve memory at end of RAM for (top down in that order): 942 * - area that won't get touched by U-Boot and Linux (optional) 943 * - kernel log buffer 944 * - protected RAM 945 * - LCD framebuffer 946 * - monitor code 947 * - board info struct 948 */ 949 setup_dest_addr, 950 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 951 /* Blackfin u-boot monitor should be on top of the ram */ 952 reserve_uboot, 953 #endif 954 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 955 reserve_logbuffer, 956 #endif 957 #ifdef CONFIG_PRAM 958 reserve_pram, 959 #endif 960 reserve_round_4k, 961 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 962 defined(CONFIG_ARM) 963 reserve_mmu, 964 #endif 965 #ifdef CONFIG_LCD 966 reserve_lcd, 967 #endif 968 reserve_trace, 969 /* TODO: Why the dependency on CONFIG_8xx? */ 970 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 971 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 972 !defined(CONFIG_BLACKFIN) 973 reserve_video, 974 #endif 975 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2) 976 reserve_uboot, 977 #endif 978 #ifndef CONFIG_SPL_BUILD 979 reserve_malloc, 980 reserve_board, 981 #endif 982 setup_machine, 983 reserve_global_data, 984 reserve_fdt, 985 reserve_stacks, 986 setup_dram_config, 987 show_dram_config, 988 #ifdef CONFIG_PPC 989 setup_board_part1, 990 INIT_FUNC_WATCHDOG_RESET 991 setup_board_part2, 992 #endif 993 display_new_sp, 994 #ifdef CONFIG_SYS_EXTBDINFO 995 setup_board_extra, 996 #endif 997 INIT_FUNC_WATCHDOG_RESET 998 reloc_fdt, 999 setup_reloc, 1000 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1001 jump_to_copy, 1002 #endif 1003 NULL, 1004 }; 1005 1006 void board_init_f(ulong boot_flags) 1007 { 1008 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 1009 /* 1010 * For some archtectures, global data is initialized and used before 1011 * calling this function. The data should be preserved. For others, 1012 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 1013 * here to host global data until relocation. 1014 */ 1015 gd_t data; 1016 1017 gd = &data; 1018 1019 /* 1020 * Clear global data before it is accessed at debug print 1021 * in initcall_run_list. Otherwise the debug print probably 1022 * get the wrong vaule of gd->have_console. 1023 */ 1024 zero_global_data(); 1025 #endif 1026 1027 gd->flags = boot_flags; 1028 gd->have_console = 0; 1029 1030 if (initcall_run_list(init_sequence_f)) 1031 hang(); 1032 1033 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1034 /* NOTREACHED - jump_to_copy() does not return */ 1035 hang(); 1036 #endif 1037 } 1038 1039 #ifdef CONFIG_X86 1040 /* 1041 * For now this code is only used on x86. 1042 * 1043 * init_sequence_f_r is the list of init functions which are run when 1044 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1045 * The following limitations must be considered when implementing an 1046 * '_f_r' function: 1047 * - 'static' variables are read-only 1048 * - Global Data (gd->xxx) is read/write 1049 * 1050 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1051 * supported). It _should_, if possible, copy global data to RAM and 1052 * initialise the CPU caches (to speed up the relocation process) 1053 * 1054 * NOTE: At present only x86 uses this route, but it is intended that 1055 * all archs will move to this when generic relocation is implemented. 1056 */ 1057 static init_fnc_t init_sequence_f_r[] = { 1058 init_cache_f_r, 1059 copy_uboot_to_ram, 1060 clear_bss, 1061 do_elf_reloc_fixups, 1062 1063 NULL, 1064 }; 1065 1066 void board_init_f_r(void) 1067 { 1068 if (initcall_run_list(init_sequence_f_r)) 1069 hang(); 1070 1071 /* 1072 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1073 * Transfer execution from Flash to RAM by calculating the address 1074 * of the in-RAM copy of board_init_r() and calling it 1075 */ 1076 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1077 1078 /* NOTREACHED - board_init_r() does not return */ 1079 hang(); 1080 } 1081 #endif /* CONFIG_X86 */ 1082