1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #if defined(CONFIG_CMD_IDE) 21 #include <ide.h> 22 #endif 23 #include <i2c.h> 24 #include <initcall.h> 25 #include <logbuff.h> 26 27 /* TODO: Can we move these into arch/ headers? */ 28 #ifdef CONFIG_8xx 29 #include <mpc8xx.h> 30 #endif 31 #ifdef CONFIG_5xx 32 #include <mpc5xx.h> 33 #endif 34 #ifdef CONFIG_MPC5xxx 35 #include <mpc5xxx.h> 36 #endif 37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 38 #include <asm/mp.h> 39 #endif 40 41 #include <os.h> 42 #include <post.h> 43 #include <spi.h> 44 #include <status_led.h> 45 #include <trace.h> 46 #include <watchdog.h> 47 #include <asm/errno.h> 48 #include <asm/io.h> 49 #include <asm/sections.h> 50 #ifdef CONFIG_X86 51 #include <asm/init_helpers.h> 52 #include <asm/relocate.h> 53 #endif 54 #ifdef CONFIG_SANDBOX 55 #include <asm/state.h> 56 #endif 57 #include <dm/root.h> 58 #include <linux/compiler.h> 59 60 /* 61 * Pointer to initial global data area 62 * 63 * Here we initialize it if needed. 64 */ 65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 69 #else 70 DECLARE_GLOBAL_DATA_PTR; 71 #endif 72 73 /* 74 * sjg: IMO this code should be 75 * refactored to a single function, something like: 76 * 77 * void led_set_state(enum led_colour_t colour, int on); 78 */ 79 /************************************************************************ 80 * Coloured LED functionality 81 ************************************************************************ 82 * May be supplied by boards if desired 83 */ 84 __weak void coloured_LED_init(void) {} 85 __weak void red_led_on(void) {} 86 __weak void red_led_off(void) {} 87 __weak void green_led_on(void) {} 88 __weak void green_led_off(void) {} 89 __weak void yellow_led_on(void) {} 90 __weak void yellow_led_off(void) {} 91 __weak void blue_led_on(void) {} 92 __weak void blue_led_off(void) {} 93 94 /* 95 * Why is gd allocated a register? Prior to reloc it might be better to 96 * just pass it around to each function in this file? 97 * 98 * After reloc one could argue that it is hardly used and doesn't need 99 * to be in a register. Or if it is it should perhaps hold pointers to all 100 * global data for all modules, so that post-reloc we can avoid the massive 101 * literal pool we get on ARM. Or perhaps just encourage each module to use 102 * a structure... 103 */ 104 105 /* 106 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 107 */ 108 109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 110 static int init_func_watchdog_init(void) 111 { 112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 115 defined(CONFIG_IMX_WATCHDOG)) 116 hw_watchdog_init(); 117 # endif 118 puts(" Watchdog enabled\n"); 119 WATCHDOG_RESET(); 120 121 return 0; 122 } 123 124 int init_func_watchdog_reset(void) 125 { 126 WATCHDOG_RESET(); 127 128 return 0; 129 } 130 #endif /* CONFIG_WATCHDOG */ 131 132 __weak void board_add_ram_info(int use_default) 133 { 134 /* please define platform specific board_add_ram_info() */ 135 } 136 137 static int init_baud_rate(void) 138 { 139 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 140 return 0; 141 } 142 143 static int display_text_info(void) 144 { 145 #ifndef CONFIG_SANDBOX 146 ulong bss_start, bss_end, text_base; 147 148 bss_start = (ulong)&__bss_start; 149 bss_end = (ulong)&__bss_end; 150 151 #ifdef CONFIG_SYS_TEXT_BASE 152 text_base = CONFIG_SYS_TEXT_BASE; 153 #else 154 text_base = CONFIG_SYS_MONITOR_BASE; 155 #endif 156 157 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 158 text_base, bss_start, bss_end); 159 #endif 160 161 #ifdef CONFIG_MODEM_SUPPORT 162 debug("Modem Support enabled\n"); 163 #endif 164 #ifdef CONFIG_USE_IRQ 165 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 166 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 167 #endif 168 169 return 0; 170 } 171 172 static int announce_dram_init(void) 173 { 174 puts("DRAM: "); 175 return 0; 176 } 177 178 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 179 static int init_func_ram(void) 180 { 181 #ifdef CONFIG_BOARD_TYPES 182 int board_type = gd->board_type; 183 #else 184 int board_type = 0; /* use dummy arg */ 185 #endif 186 187 gd->ram_size = initdram(board_type); 188 189 if (gd->ram_size > 0) 190 return 0; 191 192 puts("*** failed ***\n"); 193 return 1; 194 } 195 #endif 196 197 static int show_dram_config(void) 198 { 199 unsigned long long size; 200 201 #ifdef CONFIG_NR_DRAM_BANKS 202 int i; 203 204 debug("\nRAM Configuration:\n"); 205 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 206 size += gd->bd->bi_dram[i].size; 207 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 208 #ifdef DEBUG 209 print_size(gd->bd->bi_dram[i].size, "\n"); 210 #endif 211 } 212 debug("\nDRAM: "); 213 #else 214 size = gd->ram_size; 215 #endif 216 217 print_size(size, ""); 218 board_add_ram_info(0); 219 putc('\n'); 220 221 return 0; 222 } 223 224 __weak void dram_init_banksize(void) 225 { 226 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 227 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 228 gd->bd->bi_dram[0].size = get_effective_memsize(); 229 #endif 230 } 231 232 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 233 static int init_func_i2c(void) 234 { 235 puts("I2C: "); 236 #ifdef CONFIG_SYS_I2C 237 i2c_init_all(); 238 #else 239 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 240 #endif 241 puts("ready\n"); 242 return 0; 243 } 244 #endif 245 246 #if defined(CONFIG_HARD_SPI) 247 static int init_func_spi(void) 248 { 249 puts("SPI: "); 250 spi_init(); 251 puts("ready\n"); 252 return 0; 253 } 254 #endif 255 256 __maybe_unused 257 static int zero_global_data(void) 258 { 259 memset((void *)gd, '\0', sizeof(gd_t)); 260 261 return 0; 262 } 263 264 static int setup_mon_len(void) 265 { 266 #if defined(__ARM__) || defined(__MICROBLAZE__) 267 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 268 #elif defined(CONFIG_SANDBOX) 269 gd->mon_len = (ulong)&_end - (ulong)_init; 270 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 271 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 272 #else 273 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 274 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 275 #endif 276 return 0; 277 } 278 279 __weak int arch_cpu_init(void) 280 { 281 return 0; 282 } 283 284 #ifdef CONFIG_OF_HOSTFILE 285 286 static int read_fdt_from_file(void) 287 { 288 struct sandbox_state *state = state_get_current(); 289 const char *fname = state->fdt_fname; 290 void *blob; 291 loff_t size; 292 int err; 293 int fd; 294 295 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 296 if (!state->fdt_fname) { 297 err = fdt_create_empty_tree(blob, 256); 298 if (!err) 299 goto done; 300 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 301 return -EINVAL; 302 } 303 304 err = os_get_filesize(fname, &size); 305 if (err < 0) { 306 printf("Failed to file FDT file '%s'\n", fname); 307 return err; 308 } 309 fd = os_open(fname, OS_O_RDONLY); 310 if (fd < 0) { 311 printf("Failed to open FDT file '%s'\n", fname); 312 return -EACCES; 313 } 314 if (os_read(fd, blob, size) != size) { 315 os_close(fd); 316 return -EIO; 317 } 318 os_close(fd); 319 320 done: 321 gd->fdt_blob = blob; 322 323 return 0; 324 } 325 #endif 326 327 #ifdef CONFIG_SANDBOX 328 static int setup_ram_buf(void) 329 { 330 struct sandbox_state *state = state_get_current(); 331 332 gd->arch.ram_buf = state->ram_buf; 333 gd->ram_size = state->ram_size; 334 335 return 0; 336 } 337 #endif 338 339 static int setup_fdt(void) 340 { 341 #ifdef CONFIG_OF_CONTROL 342 # ifdef CONFIG_OF_EMBED 343 /* Get a pointer to the FDT */ 344 gd->fdt_blob = __dtb_dt_begin; 345 # elif defined CONFIG_OF_SEPARATE 346 /* FDT is at end of image */ 347 gd->fdt_blob = (ulong *)&_end; 348 # elif defined(CONFIG_OF_HOSTFILE) 349 if (read_fdt_from_file()) { 350 puts("Failed to read control FDT\n"); 351 return -1; 352 } 353 # endif 354 /* Allow the early environment to override the fdt address */ 355 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 356 (uintptr_t)gd->fdt_blob); 357 #endif 358 return 0; 359 } 360 361 /* Get the top of usable RAM */ 362 __weak ulong board_get_usable_ram_top(ulong total_size) 363 { 364 return gd->ram_top; 365 } 366 367 static int setup_dest_addr(void) 368 { 369 debug("Monitor len: %08lX\n", gd->mon_len); 370 /* 371 * Ram is setup, size stored in gd !! 372 */ 373 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 374 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 375 /* 376 * Subtract specified amount of memory to hide so that it won't 377 * get "touched" at all by U-Boot. By fixing up gd->ram_size 378 * the Linux kernel should now get passed the now "corrected" 379 * memory size and won't touch it either. This should work 380 * for arch/ppc and arch/powerpc. Only Linux board ports in 381 * arch/powerpc with bootwrapper support, that recalculate the 382 * memory size from the SDRAM controller setup will have to 383 * get fixed. 384 */ 385 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 386 #endif 387 #ifdef CONFIG_SYS_SDRAM_BASE 388 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 389 #endif 390 gd->ram_top += get_effective_memsize(); 391 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 392 gd->relocaddr = gd->ram_top; 393 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 394 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 395 /* 396 * We need to make sure the location we intend to put secondary core 397 * boot code is reserved and not used by any part of u-boot 398 */ 399 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 400 gd->relocaddr = determine_mp_bootpg(NULL); 401 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 402 } 403 #endif 404 return 0; 405 } 406 407 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 408 static int reserve_logbuffer(void) 409 { 410 /* reserve kernel log buffer */ 411 gd->relocaddr -= LOGBUFF_RESERVE; 412 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 413 gd->relocaddr); 414 return 0; 415 } 416 #endif 417 418 #ifdef CONFIG_PRAM 419 /* reserve protected RAM */ 420 static int reserve_pram(void) 421 { 422 ulong reg; 423 424 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 425 gd->relocaddr -= (reg << 10); /* size is in kB */ 426 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 427 gd->relocaddr); 428 return 0; 429 } 430 #endif /* CONFIG_PRAM */ 431 432 /* Round memory pointer down to next 4 kB limit */ 433 static int reserve_round_4k(void) 434 { 435 gd->relocaddr &= ~(4096 - 1); 436 return 0; 437 } 438 439 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 440 defined(CONFIG_ARM) 441 static int reserve_mmu(void) 442 { 443 /* reserve TLB table */ 444 gd->arch.tlb_size = PGTABLE_SIZE; 445 gd->relocaddr -= gd->arch.tlb_size; 446 447 /* round down to next 64 kB limit */ 448 gd->relocaddr &= ~(0x10000 - 1); 449 450 gd->arch.tlb_addr = gd->relocaddr; 451 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 452 gd->arch.tlb_addr + gd->arch.tlb_size); 453 return 0; 454 } 455 #endif 456 457 #ifdef CONFIG_LCD 458 static int reserve_lcd(void) 459 { 460 #ifdef CONFIG_FB_ADDR 461 gd->fb_base = CONFIG_FB_ADDR; 462 #else 463 /* reserve memory for LCD display (always full pages) */ 464 gd->relocaddr = lcd_setmem(gd->relocaddr); 465 gd->fb_base = gd->relocaddr; 466 #endif /* CONFIG_FB_ADDR */ 467 return 0; 468 } 469 #endif /* CONFIG_LCD */ 470 471 static int reserve_trace(void) 472 { 473 #ifdef CONFIG_TRACE 474 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 475 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 476 debug("Reserving %dk for trace data at: %08lx\n", 477 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 478 #endif 479 480 return 0; 481 } 482 483 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 484 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 485 !defined(CONFIG_BLACKFIN) 486 static int reserve_video(void) 487 { 488 /* reserve memory for video display (always full pages) */ 489 gd->relocaddr = video_setmem(gd->relocaddr); 490 gd->fb_base = gd->relocaddr; 491 492 return 0; 493 } 494 #endif 495 496 static int reserve_uboot(void) 497 { 498 /* 499 * reserve memory for U-Boot code, data & bss 500 * round down to next 4 kB limit 501 */ 502 gd->relocaddr -= gd->mon_len; 503 gd->relocaddr &= ~(4096 - 1); 504 #ifdef CONFIG_E500 505 /* round down to next 64 kB limit so that IVPR stays aligned */ 506 gd->relocaddr &= ~(65536 - 1); 507 #endif 508 509 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 510 gd->relocaddr); 511 512 gd->start_addr_sp = gd->relocaddr; 513 514 return 0; 515 } 516 517 #ifndef CONFIG_SPL_BUILD 518 /* reserve memory for malloc() area */ 519 static int reserve_malloc(void) 520 { 521 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 522 debug("Reserving %dk for malloc() at: %08lx\n", 523 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 524 return 0; 525 } 526 527 /* (permanently) allocate a Board Info struct */ 528 static int reserve_board(void) 529 { 530 if (!gd->bd) { 531 gd->start_addr_sp -= sizeof(bd_t); 532 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 533 memset(gd->bd, '\0', sizeof(bd_t)); 534 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 535 sizeof(bd_t), gd->start_addr_sp); 536 } 537 return 0; 538 } 539 #endif 540 541 static int setup_machine(void) 542 { 543 #ifdef CONFIG_MACH_TYPE 544 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 545 #endif 546 return 0; 547 } 548 549 static int reserve_global_data(void) 550 { 551 gd->start_addr_sp -= sizeof(gd_t); 552 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 553 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 554 sizeof(gd_t), gd->start_addr_sp); 555 return 0; 556 } 557 558 static int reserve_fdt(void) 559 { 560 /* 561 * If the device tree is sitting immediate above our image then we 562 * must relocate it. If it is embedded in the data section, then it 563 * will be relocated with other data. 564 */ 565 if (gd->fdt_blob) { 566 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 567 568 gd->start_addr_sp -= gd->fdt_size; 569 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 570 debug("Reserving %lu Bytes for FDT at: %08lx\n", 571 gd->fdt_size, gd->start_addr_sp); 572 } 573 574 return 0; 575 } 576 577 int arch_reserve_stacks(void) 578 { 579 return 0; 580 } 581 582 static int reserve_stacks(void) 583 { 584 /* make stack pointer 16-byte aligned */ 585 gd->start_addr_sp -= 16; 586 gd->start_addr_sp &= ~0xf; 587 588 /* 589 * let the architecture specific code tailor gd->start_addr_sp and 590 * gd->irq_sp 591 */ 592 return arch_reserve_stacks(); 593 } 594 595 static int display_new_sp(void) 596 { 597 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 598 599 return 0; 600 } 601 602 #ifdef CONFIG_PPC 603 static int setup_board_part1(void) 604 { 605 bd_t *bd = gd->bd; 606 607 /* 608 * Save local variables to board info struct 609 */ 610 611 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 612 bd->bi_memsize = gd->ram_size; /* size in bytes */ 613 614 #ifdef CONFIG_SYS_SRAM_BASE 615 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 616 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 617 #endif 618 619 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 620 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 621 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 622 #endif 623 #if defined(CONFIG_MPC5xxx) 624 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 625 #endif 626 #if defined(CONFIG_MPC83xx) 627 bd->bi_immrbar = CONFIG_SYS_IMMR; 628 #endif 629 630 return 0; 631 } 632 633 static int setup_board_part2(void) 634 { 635 bd_t *bd = gd->bd; 636 637 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 638 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 639 #if defined(CONFIG_CPM2) 640 bd->bi_cpmfreq = gd->arch.cpm_clk; 641 bd->bi_brgfreq = gd->arch.brg_clk; 642 bd->bi_sccfreq = gd->arch.scc_clk; 643 bd->bi_vco = gd->arch.vco_out; 644 #endif /* CONFIG_CPM2 */ 645 #if defined(CONFIG_MPC512X) 646 bd->bi_ipsfreq = gd->arch.ips_clk; 647 #endif /* CONFIG_MPC512X */ 648 #if defined(CONFIG_MPC5xxx) 649 bd->bi_ipbfreq = gd->arch.ipb_clk; 650 bd->bi_pcifreq = gd->pci_clk; 651 #endif /* CONFIG_MPC5xxx */ 652 653 return 0; 654 } 655 #endif 656 657 #ifdef CONFIG_SYS_EXTBDINFO 658 static int setup_board_extra(void) 659 { 660 bd_t *bd = gd->bd; 661 662 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 663 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 664 sizeof(bd->bi_r_version)); 665 666 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 667 bd->bi_plb_busfreq = gd->bus_clk; 668 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 669 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 670 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 671 bd->bi_pci_busfreq = get_PCI_freq(); 672 bd->bi_opbfreq = get_OPB_freq(); 673 #elif defined(CONFIG_XILINX_405) 674 bd->bi_pci_busfreq = get_PCI_freq(); 675 #endif 676 677 return 0; 678 } 679 #endif 680 681 #ifdef CONFIG_POST 682 static int init_post(void) 683 { 684 post_bootmode_init(); 685 post_run(NULL, POST_ROM | post_bootmode_get(0)); 686 687 return 0; 688 } 689 #endif 690 691 static int setup_dram_config(void) 692 { 693 /* Ram is board specific, so move it to board code ... */ 694 dram_init_banksize(); 695 696 return 0; 697 } 698 699 static int reloc_fdt(void) 700 { 701 if (gd->new_fdt) { 702 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 703 gd->fdt_blob = gd->new_fdt; 704 } 705 706 return 0; 707 } 708 709 static int setup_reloc(void) 710 { 711 #ifdef CONFIG_SYS_TEXT_BASE 712 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 713 #endif 714 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 715 716 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 717 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 718 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 719 gd->start_addr_sp); 720 721 return 0; 722 } 723 724 /* ARM calls relocate_code from its crt0.S */ 725 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 726 727 static int jump_to_copy(void) 728 { 729 /* 730 * x86 is special, but in a nice way. It uses a trampoline which 731 * enables the dcache if possible. 732 * 733 * For now, other archs use relocate_code(), which is implemented 734 * similarly for all archs. When we do generic relocation, hopefully 735 * we can make all archs enable the dcache prior to relocation. 736 */ 737 #ifdef CONFIG_X86 738 /* 739 * SDRAM and console are now initialised. The final stack can now 740 * be setup in SDRAM. Code execution will continue in Flash, but 741 * with the stack in SDRAM and Global Data in temporary memory 742 * (CPU cache) 743 */ 744 board_init_f_r_trampoline(gd->start_addr_sp); 745 #else 746 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 747 #endif 748 749 return 0; 750 } 751 #endif 752 753 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 754 static int mark_bootstage(void) 755 { 756 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 757 758 return 0; 759 } 760 761 static int initf_malloc(void) 762 { 763 #ifdef CONFIG_SYS_MALLOC_F_LEN 764 assert(gd->malloc_base); /* Set up by crt0.S */ 765 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN; 766 gd->malloc_ptr = 0; 767 #endif 768 769 return 0; 770 } 771 772 static int initf_dm(void) 773 { 774 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 775 int ret; 776 777 ret = dm_init_and_scan(true); 778 if (ret) 779 return ret; 780 #endif 781 782 return 0; 783 } 784 785 /* Architecture-specific memory reservation */ 786 __weak int reserve_arch(void) 787 { 788 return 0; 789 } 790 791 static init_fnc_t init_sequence_f[] = { 792 #ifdef CONFIG_SANDBOX 793 setup_ram_buf, 794 #endif 795 setup_mon_len, 796 setup_fdt, 797 #ifdef CONFIG_TRACE 798 trace_early_init, 799 #endif 800 initf_malloc, 801 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 802 /* TODO: can this go into arch_cpu_init()? */ 803 probecpu, 804 #endif 805 arch_cpu_init, /* basic arch cpu dependent setup */ 806 mark_bootstage, 807 #ifdef CONFIG_OF_CONTROL 808 fdtdec_check_fdt, 809 #endif 810 initf_dm, 811 #if defined(CONFIG_BOARD_EARLY_INIT_F) 812 board_early_init_f, 813 #endif 814 /* TODO: can any of this go into arch_cpu_init()? */ 815 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 816 get_clocks, /* get CPU and bus clocks (etc.) */ 817 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 818 && !defined(CONFIG_TQM885D) 819 adjust_sdram_tbs_8xx, 820 #endif 821 /* TODO: can we rename this to timer_init()? */ 822 init_timebase, 823 #endif 824 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN) 825 timer_init, /* initialize timer */ 826 #endif 827 #ifdef CONFIG_SYS_ALLOC_DPRAM 828 #if !defined(CONFIG_CPM2) 829 dpram_init, 830 #endif 831 #endif 832 #if defined(CONFIG_BOARD_POSTCLK_INIT) 833 board_postclk_init, 834 #endif 835 #ifdef CONFIG_FSL_ESDHC 836 get_clocks, 837 #endif 838 env_init, /* initialize environment */ 839 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 840 /* get CPU and bus clocks according to the environment variable */ 841 get_clocks_866, 842 /* adjust sdram refresh rate according to the new clock */ 843 sdram_adjust_866, 844 init_timebase, 845 #endif 846 init_baud_rate, /* initialze baudrate settings */ 847 serial_init, /* serial communications setup */ 848 console_init_f, /* stage 1 init of console */ 849 #ifdef CONFIG_SANDBOX 850 sandbox_early_getopt_check, 851 #endif 852 #ifdef CONFIG_OF_CONTROL 853 fdtdec_prepare_fdt, 854 #endif 855 display_options, /* say that we are here */ 856 display_text_info, /* show debugging info if required */ 857 #if defined(CONFIG_MPC8260) 858 prt_8260_rsr, 859 prt_8260_clks, 860 #endif /* CONFIG_MPC8260 */ 861 #if defined(CONFIG_MPC83xx) 862 prt_83xx_rsr, 863 #endif 864 #ifdef CONFIG_PPC 865 checkcpu, 866 #endif 867 print_cpuinfo, /* display cpu info (and speed) */ 868 #if defined(CONFIG_MPC5xxx) 869 prt_mpc5xxx_clks, 870 #endif /* CONFIG_MPC5xxx */ 871 #if defined(CONFIG_DISPLAY_BOARDINFO) 872 show_board_info, 873 #endif 874 INIT_FUNC_WATCHDOG_INIT 875 #if defined(CONFIG_MISC_INIT_F) 876 misc_init_f, 877 #endif 878 INIT_FUNC_WATCHDOG_RESET 879 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 880 init_func_i2c, 881 #endif 882 #if defined(CONFIG_HARD_SPI) 883 init_func_spi, 884 #endif 885 announce_dram_init, 886 /* TODO: unify all these dram functions? */ 887 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) 888 dram_init, /* configure available RAM banks */ 889 #endif 890 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 891 init_func_ram, 892 #endif 893 #ifdef CONFIG_POST 894 post_init_f, 895 #endif 896 INIT_FUNC_WATCHDOG_RESET 897 #if defined(CONFIG_SYS_DRAM_TEST) 898 testdram, 899 #endif /* CONFIG_SYS_DRAM_TEST */ 900 INIT_FUNC_WATCHDOG_RESET 901 902 #ifdef CONFIG_POST 903 init_post, 904 #endif 905 INIT_FUNC_WATCHDOG_RESET 906 /* 907 * Now that we have DRAM mapped and working, we can 908 * relocate the code and continue running from DRAM. 909 * 910 * Reserve memory at end of RAM for (top down in that order): 911 * - area that won't get touched by U-Boot and Linux (optional) 912 * - kernel log buffer 913 * - protected RAM 914 * - LCD framebuffer 915 * - monitor code 916 * - board info struct 917 */ 918 setup_dest_addr, 919 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 920 /* Blackfin u-boot monitor should be on top of the ram */ 921 reserve_uboot, 922 #endif 923 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 924 reserve_logbuffer, 925 #endif 926 #ifdef CONFIG_PRAM 927 reserve_pram, 928 #endif 929 reserve_round_4k, 930 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 931 defined(CONFIG_ARM) 932 reserve_mmu, 933 #endif 934 #ifdef CONFIG_LCD 935 reserve_lcd, 936 #endif 937 reserve_trace, 938 /* TODO: Why the dependency on CONFIG_8xx? */ 939 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 940 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 941 !defined(CONFIG_BLACKFIN) 942 reserve_video, 943 #endif 944 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2) 945 reserve_uboot, 946 #endif 947 #ifndef CONFIG_SPL_BUILD 948 reserve_malloc, 949 reserve_board, 950 #endif 951 setup_machine, 952 reserve_global_data, 953 reserve_fdt, 954 reserve_arch, 955 reserve_stacks, 956 setup_dram_config, 957 show_dram_config, 958 #ifdef CONFIG_PPC 959 setup_board_part1, 960 INIT_FUNC_WATCHDOG_RESET 961 setup_board_part2, 962 #endif 963 display_new_sp, 964 #ifdef CONFIG_SYS_EXTBDINFO 965 setup_board_extra, 966 #endif 967 INIT_FUNC_WATCHDOG_RESET 968 reloc_fdt, 969 setup_reloc, 970 #ifdef CONFIG_X86 971 copy_uboot_to_ram, 972 clear_bss, 973 do_elf_reloc_fixups, 974 #endif 975 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 976 jump_to_copy, 977 #endif 978 NULL, 979 }; 980 981 void board_init_f(ulong boot_flags) 982 { 983 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 984 /* 985 * For some archtectures, global data is initialized and used before 986 * calling this function. The data should be preserved. For others, 987 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 988 * here to host global data until relocation. 989 */ 990 gd_t data; 991 992 gd = &data; 993 994 /* 995 * Clear global data before it is accessed at debug print 996 * in initcall_run_list. Otherwise the debug print probably 997 * get the wrong vaule of gd->have_console. 998 */ 999 zero_global_data(); 1000 #endif 1001 1002 gd->flags = boot_flags; 1003 gd->have_console = 0; 1004 1005 if (initcall_run_list(init_sequence_f)) 1006 hang(); 1007 1008 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1009 /* NOTREACHED - jump_to_copy() does not return */ 1010 hang(); 1011 #endif 1012 } 1013 1014 #ifdef CONFIG_X86 1015 /* 1016 * For now this code is only used on x86. 1017 * 1018 * init_sequence_f_r is the list of init functions which are run when 1019 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1020 * The following limitations must be considered when implementing an 1021 * '_f_r' function: 1022 * - 'static' variables are read-only 1023 * - Global Data (gd->xxx) is read/write 1024 * 1025 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1026 * supported). It _should_, if possible, copy global data to RAM and 1027 * initialise the CPU caches (to speed up the relocation process) 1028 * 1029 * NOTE: At present only x86 uses this route, but it is intended that 1030 * all archs will move to this when generic relocation is implemented. 1031 */ 1032 static init_fnc_t init_sequence_f_r[] = { 1033 init_cache_f_r, 1034 1035 NULL, 1036 }; 1037 1038 void board_init_f_r(void) 1039 { 1040 if (initcall_run_list(init_sequence_f_r)) 1041 hang(); 1042 1043 /* 1044 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1045 * Transfer execution from Flash to RAM by calculating the address 1046 * of the in-RAM copy of board_init_r() and calling it 1047 */ 1048 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1049 1050 /* NOTREACHED - board_init_r() does not return */ 1051 hang(); 1052 } 1053 #else 1054 ulong board_init_f_mem(ulong top) 1055 { 1056 /* Leave space for the stack we are running with now */ 1057 top -= 0x40; 1058 1059 top -= sizeof(struct global_data); 1060 top = ALIGN(top, 16); 1061 gd = (struct global_data *)top; 1062 memset((void *)gd, '\0', sizeof(*gd)); 1063 1064 #ifdef CONFIG_SYS_MALLOC_F_LEN 1065 top -= CONFIG_SYS_MALLOC_F_LEN; 1066 gd->malloc_base = top; 1067 #endif 1068 1069 return top; 1070 } 1071 #endif /* CONFIG_X86 */ 1072