1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 /* 110 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 111 */ 112 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 114 static int init_func_watchdog_init(void) 115 { 116 # if defined(CONFIG_HW_WATCHDOG) && \ 117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 120 defined(CONFIG_IMX_WATCHDOG)) 121 hw_watchdog_init(); 122 puts(" Watchdog enabled\n"); 123 # endif 124 WATCHDOG_RESET(); 125 126 return 0; 127 } 128 129 int init_func_watchdog_reset(void) 130 { 131 WATCHDOG_RESET(); 132 133 return 0; 134 } 135 #endif /* CONFIG_WATCHDOG */ 136 137 __weak void board_add_ram_info(int use_default) 138 { 139 /* please define platform specific board_add_ram_info() */ 140 } 141 142 static int init_baud_rate(void) 143 { 144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 145 return 0; 146 } 147 148 static int display_text_info(void) 149 { 150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 151 ulong bss_start, bss_end, text_base; 152 153 bss_start = (ulong)&__bss_start; 154 bss_end = (ulong)&__bss_end; 155 156 #ifdef CONFIG_SYS_TEXT_BASE 157 text_base = CONFIG_SYS_TEXT_BASE; 158 #else 159 text_base = CONFIG_SYS_MONITOR_BASE; 160 #endif 161 162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 163 text_base, bss_start, bss_end); 164 #endif 165 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 181 static int init_func_ram(void) 182 { 183 return initdram(); 184 } 185 #endif 186 187 static int show_dram_config(void) 188 { 189 unsigned long long size; 190 191 #ifdef CONFIG_NR_DRAM_BANKS 192 int i; 193 194 debug("\nRAM Configuration:\n"); 195 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 196 size += gd->bd->bi_dram[i].size; 197 debug("Bank #%d: %llx ", i, 198 (unsigned long long)(gd->bd->bi_dram[i].start)); 199 #ifdef DEBUG 200 print_size(gd->bd->bi_dram[i].size, "\n"); 201 #endif 202 } 203 debug("\nDRAM: "); 204 #else 205 size = gd->ram_size; 206 #endif 207 208 print_size(size, ""); 209 board_add_ram_info(0); 210 putc('\n'); 211 212 return 0; 213 } 214 215 __weak void dram_init_banksize(void) 216 { 217 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 218 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 219 gd->bd->bi_dram[0].size = get_effective_memsize(); 220 #endif 221 } 222 223 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 224 static int init_func_i2c(void) 225 { 226 puts("I2C: "); 227 #ifdef CONFIG_SYS_I2C 228 i2c_init_all(); 229 #else 230 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 231 #endif 232 puts("ready\n"); 233 return 0; 234 } 235 #endif 236 237 #if defined(CONFIG_HARD_SPI) 238 static int init_func_spi(void) 239 { 240 puts("SPI: "); 241 spi_init(); 242 puts("ready\n"); 243 return 0; 244 } 245 #endif 246 247 __maybe_unused 248 static int zero_global_data(void) 249 { 250 memset((void *)gd, '\0', sizeof(gd_t)); 251 252 return 0; 253 } 254 255 static int setup_mon_len(void) 256 { 257 #if defined(__ARM__) || defined(__MICROBLAZE__) 258 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 259 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 260 gd->mon_len = (ulong)&_end - (ulong)_init; 261 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 262 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 263 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 264 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 265 #elif defined(CONFIG_SYS_MONITOR_BASE) 266 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 267 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 268 #endif 269 return 0; 270 } 271 272 __weak int arch_cpu_init(void) 273 { 274 return 0; 275 } 276 277 __weak int mach_cpu_init(void) 278 { 279 return 0; 280 } 281 282 /* Get the top of usable RAM */ 283 __weak ulong board_get_usable_ram_top(ulong total_size) 284 { 285 #ifdef CONFIG_SYS_SDRAM_BASE 286 /* 287 * Detect whether we have so much RAM that it goes past the end of our 288 * 32-bit address space. If so, clip the usable RAM so it doesn't. 289 */ 290 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 291 /* 292 * Will wrap back to top of 32-bit space when reservations 293 * are made. 294 */ 295 return 0; 296 #endif 297 return gd->ram_top; 298 } 299 300 static int setup_dest_addr(void) 301 { 302 debug("Monitor len: %08lX\n", gd->mon_len); 303 /* 304 * Ram is setup, size stored in gd !! 305 */ 306 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 307 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 308 /* 309 * Subtract specified amount of memory to hide so that it won't 310 * get "touched" at all by U-Boot. By fixing up gd->ram_size 311 * the Linux kernel should now get passed the now "corrected" 312 * memory size and won't touch it either. This should work 313 * for arch/ppc and arch/powerpc. Only Linux board ports in 314 * arch/powerpc with bootwrapper support, that recalculate the 315 * memory size from the SDRAM controller setup will have to 316 * get fixed. 317 */ 318 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 319 #endif 320 #ifdef CONFIG_SYS_SDRAM_BASE 321 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 322 #endif 323 gd->ram_top += get_effective_memsize(); 324 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 325 gd->relocaddr = gd->ram_top; 326 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 327 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 328 /* 329 * We need to make sure the location we intend to put secondary core 330 * boot code is reserved and not used by any part of u-boot 331 */ 332 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 333 gd->relocaddr = determine_mp_bootpg(NULL); 334 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 335 } 336 #endif 337 return 0; 338 } 339 340 #if defined(CONFIG_LOGBUFFER) 341 static int reserve_logbuffer(void) 342 { 343 #ifndef CONFIG_ALT_LB_ADDR 344 /* reserve kernel log buffer */ 345 gd->relocaddr -= LOGBUFF_RESERVE; 346 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 347 gd->relocaddr); 348 #endif 349 350 return 0; 351 } 352 #endif 353 354 #ifdef CONFIG_PRAM 355 /* reserve protected RAM */ 356 static int reserve_pram(void) 357 { 358 ulong reg; 359 360 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 361 gd->relocaddr -= (reg << 10); /* size is in kB */ 362 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 363 gd->relocaddr); 364 return 0; 365 } 366 #endif /* CONFIG_PRAM */ 367 368 /* Round memory pointer down to next 4 kB limit */ 369 static int reserve_round_4k(void) 370 { 371 gd->relocaddr &= ~(4096 - 1); 372 return 0; 373 } 374 375 #ifdef CONFIG_ARM 376 static int reserve_mmu(void) 377 { 378 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 379 /* reserve TLB table */ 380 gd->arch.tlb_size = PGTABLE_SIZE; 381 gd->relocaddr -= gd->arch.tlb_size; 382 383 /* round down to next 64 kB limit */ 384 gd->relocaddr &= ~(0x10000 - 1); 385 386 gd->arch.tlb_addr = gd->relocaddr; 387 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 388 gd->arch.tlb_addr + gd->arch.tlb_size); 389 390 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 391 /* 392 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 393 * with location within secure ram. 394 */ 395 gd->arch.tlb_allocated = gd->arch.tlb_addr; 396 #endif 397 #endif 398 399 return 0; 400 } 401 #endif 402 403 static int reserve_video(void) 404 { 405 #ifdef CONFIG_DM_VIDEO 406 ulong addr; 407 int ret; 408 409 addr = gd->relocaddr; 410 ret = video_reserve(&addr); 411 if (ret) 412 return ret; 413 gd->relocaddr = addr; 414 #elif defined(CONFIG_LCD) 415 # ifdef CONFIG_FB_ADDR 416 gd->fb_base = CONFIG_FB_ADDR; 417 # else 418 /* reserve memory for LCD display (always full pages) */ 419 gd->relocaddr = lcd_setmem(gd->relocaddr); 420 gd->fb_base = gd->relocaddr; 421 # endif /* CONFIG_FB_ADDR */ 422 #elif defined(CONFIG_VIDEO) && \ 423 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 424 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 425 !defined(CONFIG_M68K) 426 /* reserve memory for video display (always full pages) */ 427 gd->relocaddr = video_setmem(gd->relocaddr); 428 gd->fb_base = gd->relocaddr; 429 #endif 430 431 return 0; 432 } 433 434 static int reserve_trace(void) 435 { 436 #ifdef CONFIG_TRACE 437 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 438 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 439 debug("Reserving %dk for trace data at: %08lx\n", 440 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 441 #endif 442 443 return 0; 444 } 445 446 static int reserve_uboot(void) 447 { 448 /* 449 * reserve memory for U-Boot code, data & bss 450 * round down to next 4 kB limit 451 */ 452 gd->relocaddr -= gd->mon_len; 453 gd->relocaddr &= ~(4096 - 1); 454 #ifdef CONFIG_E500 455 /* round down to next 64 kB limit so that IVPR stays aligned */ 456 gd->relocaddr &= ~(65536 - 1); 457 #endif 458 459 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 460 gd->relocaddr); 461 462 gd->start_addr_sp = gd->relocaddr; 463 464 return 0; 465 } 466 467 #ifndef CONFIG_SPL_BUILD 468 /* reserve memory for malloc() area */ 469 static int reserve_malloc(void) 470 { 471 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 472 debug("Reserving %dk for malloc() at: %08lx\n", 473 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 474 return 0; 475 } 476 477 /* (permanently) allocate a Board Info struct */ 478 static int reserve_board(void) 479 { 480 if (!gd->bd) { 481 gd->start_addr_sp -= sizeof(bd_t); 482 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 483 memset(gd->bd, '\0', sizeof(bd_t)); 484 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 485 sizeof(bd_t), gd->start_addr_sp); 486 } 487 return 0; 488 } 489 #endif 490 491 static int setup_machine(void) 492 { 493 #ifdef CONFIG_MACH_TYPE 494 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 495 #endif 496 return 0; 497 } 498 499 static int reserve_global_data(void) 500 { 501 gd->start_addr_sp -= sizeof(gd_t); 502 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 503 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 504 sizeof(gd_t), gd->start_addr_sp); 505 return 0; 506 } 507 508 static int reserve_fdt(void) 509 { 510 #ifndef CONFIG_OF_EMBED 511 /* 512 * If the device tree is sitting immediately above our image then we 513 * must relocate it. If it is embedded in the data section, then it 514 * will be relocated with other data. 515 */ 516 if (gd->fdt_blob) { 517 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 518 519 gd->start_addr_sp -= gd->fdt_size; 520 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 521 debug("Reserving %lu Bytes for FDT at: %08lx\n", 522 gd->fdt_size, gd->start_addr_sp); 523 } 524 #endif 525 526 return 0; 527 } 528 529 int arch_reserve_stacks(void) 530 { 531 return 0; 532 } 533 534 static int reserve_stacks(void) 535 { 536 /* make stack pointer 16-byte aligned */ 537 gd->start_addr_sp -= 16; 538 gd->start_addr_sp &= ~0xf; 539 540 /* 541 * let the architecture-specific code tailor gd->start_addr_sp and 542 * gd->irq_sp 543 */ 544 return arch_reserve_stacks(); 545 } 546 547 static int display_new_sp(void) 548 { 549 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 550 551 return 0; 552 } 553 554 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 555 defined(CONFIG_SH) 556 static int setup_board_part1(void) 557 { 558 bd_t *bd = gd->bd; 559 560 /* 561 * Save local variables to board info struct 562 */ 563 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 564 bd->bi_memsize = gd->ram_size; /* size in bytes */ 565 566 #ifdef CONFIG_SYS_SRAM_BASE 567 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 568 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 569 #endif 570 571 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 572 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 573 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 574 #endif 575 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 576 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 577 #endif 578 #if defined(CONFIG_MPC83xx) 579 bd->bi_immrbar = CONFIG_SYS_IMMR; 580 #endif 581 582 return 0; 583 } 584 #endif 585 586 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 587 static int setup_board_part2(void) 588 { 589 bd_t *bd = gd->bd; 590 591 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 592 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 593 #if defined(CONFIG_CPM2) 594 bd->bi_cpmfreq = gd->arch.cpm_clk; 595 bd->bi_brgfreq = gd->arch.brg_clk; 596 bd->bi_sccfreq = gd->arch.scc_clk; 597 bd->bi_vco = gd->arch.vco_out; 598 #endif /* CONFIG_CPM2 */ 599 #if defined(CONFIG_MPC512X) 600 bd->bi_ipsfreq = gd->arch.ips_clk; 601 #endif /* CONFIG_MPC512X */ 602 #if defined(CONFIG_MPC5xxx) 603 bd->bi_ipbfreq = gd->arch.ipb_clk; 604 bd->bi_pcifreq = gd->pci_clk; 605 #endif /* CONFIG_MPC5xxx */ 606 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 607 bd->bi_pcifreq = gd->pci_clk; 608 #endif 609 #if defined(CONFIG_EXTRA_CLOCK) 610 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 611 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 612 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 613 #endif 614 615 return 0; 616 } 617 #endif 618 619 #ifdef CONFIG_SYS_EXTBDINFO 620 static int setup_board_extra(void) 621 { 622 bd_t *bd = gd->bd; 623 624 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 625 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 626 sizeof(bd->bi_r_version)); 627 628 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 629 bd->bi_plb_busfreq = gd->bus_clk; 630 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 631 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 632 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 633 bd->bi_pci_busfreq = get_PCI_freq(); 634 bd->bi_opbfreq = get_OPB_freq(); 635 #elif defined(CONFIG_XILINX_405) 636 bd->bi_pci_busfreq = get_PCI_freq(); 637 #endif 638 639 return 0; 640 } 641 #endif 642 643 #ifdef CONFIG_POST 644 static int init_post(void) 645 { 646 post_bootmode_init(); 647 post_run(NULL, POST_ROM | post_bootmode_get(0)); 648 649 return 0; 650 } 651 #endif 652 653 static int setup_dram_config(void) 654 { 655 /* Ram is board specific, so move it to board code ... */ 656 dram_init_banksize(); 657 658 return 0; 659 } 660 661 static int reloc_fdt(void) 662 { 663 #ifndef CONFIG_OF_EMBED 664 if (gd->flags & GD_FLG_SKIP_RELOC) 665 return 0; 666 if (gd->new_fdt) { 667 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 668 gd->fdt_blob = gd->new_fdt; 669 } 670 #endif 671 672 return 0; 673 } 674 675 static int setup_reloc(void) 676 { 677 if (gd->flags & GD_FLG_SKIP_RELOC) { 678 debug("Skipping relocation due to flag\n"); 679 return 0; 680 } 681 682 #ifdef CONFIG_SYS_TEXT_BASE 683 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 684 #ifdef CONFIG_M68K 685 /* 686 * On all ColdFire arch cpu, monitor code starts always 687 * just after the default vector table location, so at 0x400 688 */ 689 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 690 #endif 691 #endif 692 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 693 694 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 695 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 696 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 697 gd->start_addr_sp); 698 699 return 0; 700 } 701 702 #ifdef CONFIG_OF_BOARD_FIXUP 703 static int fix_fdt(void) 704 { 705 return board_fix_fdt((void *)gd->fdt_blob); 706 } 707 #endif 708 709 /* ARM calls relocate_code from its crt0.S */ 710 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 711 !CONFIG_IS_ENABLED(X86_64) 712 713 static int jump_to_copy(void) 714 { 715 if (gd->flags & GD_FLG_SKIP_RELOC) 716 return 0; 717 /* 718 * x86 is special, but in a nice way. It uses a trampoline which 719 * enables the dcache if possible. 720 * 721 * For now, other archs use relocate_code(), which is implemented 722 * similarly for all archs. When we do generic relocation, hopefully 723 * we can make all archs enable the dcache prior to relocation. 724 */ 725 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 726 /* 727 * SDRAM and console are now initialised. The final stack can now 728 * be setup in SDRAM. Code execution will continue in Flash, but 729 * with the stack in SDRAM and Global Data in temporary memory 730 * (CPU cache) 731 */ 732 arch_setup_gd(gd->new_gd); 733 board_init_f_r_trampoline(gd->start_addr_sp); 734 #else 735 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 736 #endif 737 738 return 0; 739 } 740 #endif 741 742 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 743 static int mark_bootstage(void) 744 { 745 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 746 747 return 0; 748 } 749 750 static int initf_console_record(void) 751 { 752 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 753 return console_record_init(); 754 #else 755 return 0; 756 #endif 757 } 758 759 static int initf_dm(void) 760 { 761 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 762 int ret; 763 764 ret = dm_init_and_scan(true); 765 if (ret) 766 return ret; 767 #endif 768 #ifdef CONFIG_TIMER_EARLY 769 ret = dm_timer_init(); 770 if (ret) 771 return ret; 772 #endif 773 774 return 0; 775 } 776 777 /* Architecture-specific memory reservation */ 778 __weak int reserve_arch(void) 779 { 780 return 0; 781 } 782 783 __weak int arch_cpu_init_dm(void) 784 { 785 return 0; 786 } 787 788 static const init_fnc_t init_sequence_f[] = { 789 setup_mon_len, 790 #ifdef CONFIG_OF_CONTROL 791 fdtdec_setup, 792 #endif 793 #ifdef CONFIG_TRACE 794 trace_early_init, 795 #endif 796 initf_malloc, 797 initf_console_record, 798 #if defined(CONFIG_HAVE_FSP) 799 arch_fsp_init, 800 #endif 801 arch_cpu_init, /* basic arch cpu dependent setup */ 802 mach_cpu_init, /* SoC/machine dependent CPU setup */ 803 initf_dm, 804 arch_cpu_init_dm, 805 mark_bootstage, /* need timer, go after init dm */ 806 #if defined(CONFIG_BOARD_EARLY_INIT_F) 807 board_early_init_f, 808 #endif 809 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 810 /* get CPU and bus clocks according to the environment variable */ 811 get_clocks, /* get CPU and bus clocks (etc.) */ 812 #endif 813 timer_init, /* initialize timer */ 814 #if defined(CONFIG_BOARD_POSTCLK_INIT) 815 board_postclk_init, 816 #endif 817 env_init, /* initialize environment */ 818 init_baud_rate, /* initialze baudrate settings */ 819 serial_init, /* serial communications setup */ 820 console_init_f, /* stage 1 init of console */ 821 display_options, /* say that we are here */ 822 display_text_info, /* show debugging info if required */ 823 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 824 defined(CONFIG_X86) 825 checkcpu, 826 #endif 827 #if defined(CONFIG_DISPLAY_CPUINFO) 828 print_cpuinfo, /* display cpu info (and speed) */ 829 #endif 830 #if defined(CONFIG_DISPLAY_BOARDINFO) 831 show_board_info, 832 #endif 833 INIT_FUNC_WATCHDOG_INIT 834 #if defined(CONFIG_MISC_INIT_F) 835 misc_init_f, 836 #endif 837 INIT_FUNC_WATCHDOG_RESET 838 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 839 init_func_i2c, 840 #endif 841 #if defined(CONFIG_HARD_SPI) 842 init_func_spi, 843 #endif 844 announce_dram_init, 845 /* TODO: unify all these dram functions? */ 846 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 847 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 848 defined(CONFIG_SH) 849 dram_init, /* configure available RAM banks */ 850 #endif 851 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 852 init_func_ram, 853 #endif 854 #ifdef CONFIG_POST 855 post_init_f, 856 #endif 857 INIT_FUNC_WATCHDOG_RESET 858 #if defined(CONFIG_SYS_DRAM_TEST) 859 testdram, 860 #endif /* CONFIG_SYS_DRAM_TEST */ 861 INIT_FUNC_WATCHDOG_RESET 862 863 #ifdef CONFIG_POST 864 init_post, 865 #endif 866 INIT_FUNC_WATCHDOG_RESET 867 /* 868 * Now that we have DRAM mapped and working, we can 869 * relocate the code and continue running from DRAM. 870 * 871 * Reserve memory at end of RAM for (top down in that order): 872 * - area that won't get touched by U-Boot and Linux (optional) 873 * - kernel log buffer 874 * - protected RAM 875 * - LCD framebuffer 876 * - monitor code 877 * - board info struct 878 */ 879 setup_dest_addr, 880 #if defined(CONFIG_LOGBUFFER) 881 reserve_logbuffer, 882 #endif 883 #ifdef CONFIG_PRAM 884 reserve_pram, 885 #endif 886 reserve_round_4k, 887 #ifdef CONFIG_ARM 888 reserve_mmu, 889 #endif 890 reserve_video, 891 reserve_trace, 892 reserve_uboot, 893 #ifndef CONFIG_SPL_BUILD 894 reserve_malloc, 895 reserve_board, 896 #endif 897 setup_machine, 898 reserve_global_data, 899 reserve_fdt, 900 reserve_arch, 901 reserve_stacks, 902 setup_dram_config, 903 show_dram_config, 904 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 905 defined(CONFIG_SH) 906 setup_board_part1, 907 #endif 908 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 909 INIT_FUNC_WATCHDOG_RESET 910 setup_board_part2, 911 #endif 912 display_new_sp, 913 #ifdef CONFIG_SYS_EXTBDINFO 914 setup_board_extra, 915 #endif 916 #ifdef CONFIG_OF_BOARD_FIXUP 917 fix_fdt, 918 #endif 919 INIT_FUNC_WATCHDOG_RESET 920 reloc_fdt, 921 setup_reloc, 922 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 923 copy_uboot_to_ram, 924 do_elf_reloc_fixups, 925 clear_bss, 926 #endif 927 #if defined(CONFIG_XTENSA) 928 clear_bss, 929 #endif 930 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 931 !CONFIG_IS_ENABLED(X86_64) 932 jump_to_copy, 933 #endif 934 NULL, 935 }; 936 937 void board_init_f(ulong boot_flags) 938 { 939 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 940 /* 941 * For some architectures, global data is initialized and used before 942 * calling this function. The data should be preserved. For others, 943 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 944 * here to host global data until relocation. 945 */ 946 gd_t data; 947 948 gd = &data; 949 950 /* 951 * Clear global data before it is accessed at debug print 952 * in initcall_run_list. Otherwise the debug print probably 953 * get the wrong value of gd->have_console. 954 */ 955 zero_global_data(); 956 #endif 957 958 gd->flags = boot_flags; 959 gd->have_console = 0; 960 961 if (initcall_run_list(init_sequence_f)) 962 hang(); 963 964 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 965 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 966 /* NOTREACHED - jump_to_copy() does not return */ 967 hang(); 968 #endif 969 } 970 971 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 972 /* 973 * For now this code is only used on x86. 974 * 975 * init_sequence_f_r is the list of init functions which are run when 976 * U-Boot is executing from Flash with a semi-limited 'C' environment. 977 * The following limitations must be considered when implementing an 978 * '_f_r' function: 979 * - 'static' variables are read-only 980 * - Global Data (gd->xxx) is read/write 981 * 982 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 983 * supported). It _should_, if possible, copy global data to RAM and 984 * initialise the CPU caches (to speed up the relocation process) 985 * 986 * NOTE: At present only x86 uses this route, but it is intended that 987 * all archs will move to this when generic relocation is implemented. 988 */ 989 static const init_fnc_t init_sequence_f_r[] = { 990 #if !CONFIG_IS_ENABLED(X86_64) 991 init_cache_f_r, 992 #endif 993 994 NULL, 995 }; 996 997 void board_init_f_r(void) 998 { 999 if (initcall_run_list(init_sequence_f_r)) 1000 hang(); 1001 1002 /* 1003 * The pre-relocation drivers may be using memory that has now gone 1004 * away. Mark serial as unavailable - this will fall back to the debug 1005 * UART if available. 1006 */ 1007 gd->flags &= ~GD_FLG_SERIAL_READY; 1008 1009 /* 1010 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1011 * Transfer execution from Flash to RAM by calculating the address 1012 * of the in-RAM copy of board_init_r() and calling it 1013 */ 1014 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1015 1016 /* NOTREACHED - board_init_r() does not return */ 1017 hang(); 1018 } 1019 #endif /* CONFIG_X86 */ 1020