1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <version.h> 15 #include <console.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #include <i2c.h> 21 #include <initcall.h> 22 #include <logbuff.h> 23 #include <malloc.h> 24 #include <mapmem.h> 25 26 /* TODO: Can we move these into arch/ headers? */ 27 #ifdef CONFIG_8xx 28 #include <mpc8xx.h> 29 #endif 30 #ifdef CONFIG_5xx 31 #include <mpc5xx.h> 32 #endif 33 #ifdef CONFIG_MPC5xxx 34 #include <mpc5xxx.h> 35 #endif 36 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 37 #include <asm/mp.h> 38 #endif 39 40 #include <os.h> 41 #include <post.h> 42 #include <spi.h> 43 #include <status_led.h> 44 #include <timer.h> 45 #include <trace.h> 46 #include <video.h> 47 #include <watchdog.h> 48 #include <asm/io.h> 49 #include <asm/sections.h> 50 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 51 #include <asm/init_helpers.h> 52 #endif 53 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 54 #include <asm/relocate.h> 55 #endif 56 #include <dm/root.h> 57 #include <linux/errno.h> 58 59 /* 60 * Pointer to initial global data area 61 * 62 * Here we initialize it if needed. 63 */ 64 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 65 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 66 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 67 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 68 #else 69 DECLARE_GLOBAL_DATA_PTR; 70 #endif 71 72 /* 73 * TODO(sjg@chromium.org): IMO this code should be 74 * refactored to a single function, something like: 75 * 76 * void led_set_state(enum led_colour_t colour, int on); 77 */ 78 /************************************************************************ 79 * Coloured LED functionality 80 ************************************************************************ 81 * May be supplied by boards if desired 82 */ 83 __weak void coloured_LED_init(void) {} 84 __weak void red_led_on(void) {} 85 __weak void red_led_off(void) {} 86 __weak void green_led_on(void) {} 87 __weak void green_led_off(void) {} 88 __weak void yellow_led_on(void) {} 89 __weak void yellow_led_off(void) {} 90 __weak void blue_led_on(void) {} 91 __weak void blue_led_off(void) {} 92 93 /* 94 * Why is gd allocated a register? Prior to reloc it might be better to 95 * just pass it around to each function in this file? 96 * 97 * After reloc one could argue that it is hardly used and doesn't need 98 * to be in a register. Or if it is it should perhaps hold pointers to all 99 * global data for all modules, so that post-reloc we can avoid the massive 100 * literal pool we get on ARM. Or perhaps just encourage each module to use 101 * a structure... 102 */ 103 104 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 105 static int init_func_watchdog_init(void) 106 { 107 # if defined(CONFIG_HW_WATCHDOG) && \ 108 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 109 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 110 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 111 defined(CONFIG_IMX_WATCHDOG)) 112 hw_watchdog_init(); 113 puts(" Watchdog enabled\n"); 114 # endif 115 WATCHDOG_RESET(); 116 117 return 0; 118 } 119 120 int init_func_watchdog_reset(void) 121 { 122 WATCHDOG_RESET(); 123 124 return 0; 125 } 126 #endif /* CONFIG_WATCHDOG */ 127 128 __weak void board_add_ram_info(int use_default) 129 { 130 /* please define platform specific board_add_ram_info() */ 131 } 132 133 static int init_baud_rate(void) 134 { 135 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 136 return 0; 137 } 138 139 static int display_text_info(void) 140 { 141 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 142 ulong bss_start, bss_end, text_base; 143 144 bss_start = (ulong)&__bss_start; 145 bss_end = (ulong)&__bss_end; 146 147 #ifdef CONFIG_SYS_TEXT_BASE 148 text_base = CONFIG_SYS_TEXT_BASE; 149 #else 150 text_base = CONFIG_SYS_MONITOR_BASE; 151 #endif 152 153 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 154 text_base, bss_start, bss_end); 155 #endif 156 157 #ifdef CONFIG_USE_IRQ 158 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 159 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 160 #endif 161 162 return 0; 163 } 164 165 static int announce_dram_init(void) 166 { 167 puts("DRAM: "); 168 return 0; 169 } 170 171 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 172 static int init_func_ram(void) 173 { 174 return initdram(); 175 } 176 #endif 177 178 static int show_dram_config(void) 179 { 180 unsigned long long size; 181 182 #ifdef CONFIG_NR_DRAM_BANKS 183 int i; 184 185 debug("\nRAM Configuration:\n"); 186 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 187 size += gd->bd->bi_dram[i].size; 188 debug("Bank #%d: %llx ", i, 189 (unsigned long long)(gd->bd->bi_dram[i].start)); 190 #ifdef DEBUG 191 print_size(gd->bd->bi_dram[i].size, "\n"); 192 #endif 193 } 194 debug("\nDRAM: "); 195 #else 196 size = gd->ram_size; 197 #endif 198 199 print_size(size, ""); 200 board_add_ram_info(0); 201 putc('\n'); 202 203 return 0; 204 } 205 206 __weak int dram_init_banksize(void) 207 { 208 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 209 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 210 gd->bd->bi_dram[0].size = get_effective_memsize(); 211 #endif 212 213 return 0; 214 } 215 216 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 217 static int init_func_i2c(void) 218 { 219 puts("I2C: "); 220 #ifdef CONFIG_SYS_I2C 221 i2c_init_all(); 222 #else 223 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 224 #endif 225 puts("ready\n"); 226 return 0; 227 } 228 #endif 229 230 #if defined(CONFIG_HARD_SPI) 231 static int init_func_spi(void) 232 { 233 puts("SPI: "); 234 spi_init(); 235 puts("ready\n"); 236 return 0; 237 } 238 #endif 239 240 __maybe_unused 241 static int zero_global_data(void) 242 { 243 memset((void *)gd, '\0', sizeof(gd_t)); 244 245 return 0; 246 } 247 248 static int setup_mon_len(void) 249 { 250 #if defined(__ARM__) || defined(__MICROBLAZE__) 251 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 252 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 253 gd->mon_len = (ulong)&_end - (ulong)_init; 254 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 255 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 256 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 257 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 258 #elif defined(CONFIG_SYS_MONITOR_BASE) 259 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 260 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 261 #endif 262 return 0; 263 } 264 265 __weak int arch_cpu_init(void) 266 { 267 return 0; 268 } 269 270 __weak int mach_cpu_init(void) 271 { 272 return 0; 273 } 274 275 /* Get the top of usable RAM */ 276 __weak ulong board_get_usable_ram_top(ulong total_size) 277 { 278 #ifdef CONFIG_SYS_SDRAM_BASE 279 /* 280 * Detect whether we have so much RAM that it goes past the end of our 281 * 32-bit address space. If so, clip the usable RAM so it doesn't. 282 */ 283 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 284 /* 285 * Will wrap back to top of 32-bit space when reservations 286 * are made. 287 */ 288 return 0; 289 #endif 290 return gd->ram_top; 291 } 292 293 static int setup_dest_addr(void) 294 { 295 debug("Monitor len: %08lX\n", gd->mon_len); 296 /* 297 * Ram is setup, size stored in gd !! 298 */ 299 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 300 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 301 /* 302 * Subtract specified amount of memory to hide so that it won't 303 * get "touched" at all by U-Boot. By fixing up gd->ram_size 304 * the Linux kernel should now get passed the now "corrected" 305 * memory size and won't touch it either. This should work 306 * for arch/ppc and arch/powerpc. Only Linux board ports in 307 * arch/powerpc with bootwrapper support, that recalculate the 308 * memory size from the SDRAM controller setup will have to 309 * get fixed. 310 */ 311 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 312 #endif 313 #ifdef CONFIG_SYS_SDRAM_BASE 314 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 315 #endif 316 gd->ram_top += get_effective_memsize(); 317 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 318 gd->relocaddr = gd->ram_top; 319 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 320 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 321 /* 322 * We need to make sure the location we intend to put secondary core 323 * boot code is reserved and not used by any part of u-boot 324 */ 325 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 326 gd->relocaddr = determine_mp_bootpg(NULL); 327 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 328 } 329 #endif 330 return 0; 331 } 332 333 #if defined(CONFIG_LOGBUFFER) 334 static int reserve_logbuffer(void) 335 { 336 #ifndef CONFIG_ALT_LB_ADDR 337 /* reserve kernel log buffer */ 338 gd->relocaddr -= LOGBUFF_RESERVE; 339 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 340 gd->relocaddr); 341 #endif 342 343 return 0; 344 } 345 #endif 346 347 #ifdef CONFIG_PRAM 348 /* reserve protected RAM */ 349 static int reserve_pram(void) 350 { 351 ulong reg; 352 353 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 354 gd->relocaddr -= (reg << 10); /* size is in kB */ 355 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 356 gd->relocaddr); 357 return 0; 358 } 359 #endif /* CONFIG_PRAM */ 360 361 /* Round memory pointer down to next 4 kB limit */ 362 static int reserve_round_4k(void) 363 { 364 gd->relocaddr &= ~(4096 - 1); 365 return 0; 366 } 367 368 #ifdef CONFIG_ARM 369 static int reserve_mmu(void) 370 { 371 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 372 /* reserve TLB table */ 373 gd->arch.tlb_size = PGTABLE_SIZE; 374 gd->relocaddr -= gd->arch.tlb_size; 375 376 /* round down to next 64 kB limit */ 377 gd->relocaddr &= ~(0x10000 - 1); 378 379 gd->arch.tlb_addr = gd->relocaddr; 380 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 381 gd->arch.tlb_addr + gd->arch.tlb_size); 382 383 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 384 /* 385 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 386 * with location within secure ram. 387 */ 388 gd->arch.tlb_allocated = gd->arch.tlb_addr; 389 #endif 390 #endif 391 392 return 0; 393 } 394 #endif 395 396 static int reserve_video(void) 397 { 398 #ifdef CONFIG_DM_VIDEO 399 ulong addr; 400 int ret; 401 402 addr = gd->relocaddr; 403 ret = video_reserve(&addr); 404 if (ret) 405 return ret; 406 gd->relocaddr = addr; 407 #elif defined(CONFIG_LCD) 408 # ifdef CONFIG_FB_ADDR 409 gd->fb_base = CONFIG_FB_ADDR; 410 # else 411 /* reserve memory for LCD display (always full pages) */ 412 gd->relocaddr = lcd_setmem(gd->relocaddr); 413 gd->fb_base = gd->relocaddr; 414 # endif /* CONFIG_FB_ADDR */ 415 #elif defined(CONFIG_VIDEO) && \ 416 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 417 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 418 !defined(CONFIG_M68K) 419 /* reserve memory for video display (always full pages) */ 420 gd->relocaddr = video_setmem(gd->relocaddr); 421 gd->fb_base = gd->relocaddr; 422 #endif 423 424 return 0; 425 } 426 427 static int reserve_trace(void) 428 { 429 #ifdef CONFIG_TRACE 430 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 431 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 432 debug("Reserving %dk for trace data at: %08lx\n", 433 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 434 #endif 435 436 return 0; 437 } 438 439 static int reserve_uboot(void) 440 { 441 /* 442 * reserve memory for U-Boot code, data & bss 443 * round down to next 4 kB limit 444 */ 445 gd->relocaddr -= gd->mon_len; 446 gd->relocaddr &= ~(4096 - 1); 447 #ifdef CONFIG_E500 448 /* round down to next 64 kB limit so that IVPR stays aligned */ 449 gd->relocaddr &= ~(65536 - 1); 450 #endif 451 452 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 453 gd->relocaddr); 454 455 gd->start_addr_sp = gd->relocaddr; 456 457 return 0; 458 } 459 460 /* reserve memory for malloc() area */ 461 static int reserve_malloc(void) 462 { 463 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 464 debug("Reserving %dk for malloc() at: %08lx\n", 465 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 466 return 0; 467 } 468 469 /* (permanently) allocate a Board Info struct */ 470 static int reserve_board(void) 471 { 472 if (!gd->bd) { 473 gd->start_addr_sp -= sizeof(bd_t); 474 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 475 memset(gd->bd, '\0', sizeof(bd_t)); 476 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 477 sizeof(bd_t), gd->start_addr_sp); 478 } 479 return 0; 480 } 481 482 static int setup_machine(void) 483 { 484 #ifdef CONFIG_MACH_TYPE 485 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 486 #endif 487 return 0; 488 } 489 490 static int reserve_global_data(void) 491 { 492 gd->start_addr_sp -= sizeof(gd_t); 493 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 494 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 495 sizeof(gd_t), gd->start_addr_sp); 496 return 0; 497 } 498 499 static int reserve_fdt(void) 500 { 501 #ifndef CONFIG_OF_EMBED 502 /* 503 * If the device tree is sitting immediately above our image then we 504 * must relocate it. If it is embedded in the data section, then it 505 * will be relocated with other data. 506 */ 507 if (gd->fdt_blob) { 508 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 509 510 gd->start_addr_sp -= gd->fdt_size; 511 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 512 debug("Reserving %lu Bytes for FDT at: %08lx\n", 513 gd->fdt_size, gd->start_addr_sp); 514 } 515 #endif 516 517 return 0; 518 } 519 520 int arch_reserve_stacks(void) 521 { 522 return 0; 523 } 524 525 static int reserve_stacks(void) 526 { 527 /* make stack pointer 16-byte aligned */ 528 gd->start_addr_sp -= 16; 529 gd->start_addr_sp &= ~0xf; 530 531 /* 532 * let the architecture-specific code tailor gd->start_addr_sp and 533 * gd->irq_sp 534 */ 535 return arch_reserve_stacks(); 536 } 537 538 static int display_new_sp(void) 539 { 540 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 541 542 return 0; 543 } 544 545 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 546 defined(CONFIG_SH) 547 static int setup_board_part1(void) 548 { 549 bd_t *bd = gd->bd; 550 551 /* 552 * Save local variables to board info struct 553 */ 554 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 555 bd->bi_memsize = gd->ram_size; /* size in bytes */ 556 557 #ifdef CONFIG_SYS_SRAM_BASE 558 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 559 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 560 #endif 561 562 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 563 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 564 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 565 #endif 566 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 567 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 568 #endif 569 #if defined(CONFIG_MPC83xx) 570 bd->bi_immrbar = CONFIG_SYS_IMMR; 571 #endif 572 573 return 0; 574 } 575 #endif 576 577 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 578 static int setup_board_part2(void) 579 { 580 bd_t *bd = gd->bd; 581 582 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 583 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 584 #if defined(CONFIG_CPM2) 585 bd->bi_cpmfreq = gd->arch.cpm_clk; 586 bd->bi_brgfreq = gd->arch.brg_clk; 587 bd->bi_sccfreq = gd->arch.scc_clk; 588 bd->bi_vco = gd->arch.vco_out; 589 #endif /* CONFIG_CPM2 */ 590 #if defined(CONFIG_MPC512X) 591 bd->bi_ipsfreq = gd->arch.ips_clk; 592 #endif /* CONFIG_MPC512X */ 593 #if defined(CONFIG_MPC5xxx) 594 bd->bi_ipbfreq = gd->arch.ipb_clk; 595 bd->bi_pcifreq = gd->pci_clk; 596 #endif /* CONFIG_MPC5xxx */ 597 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 598 bd->bi_pcifreq = gd->pci_clk; 599 #endif 600 #if defined(CONFIG_EXTRA_CLOCK) 601 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 602 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 603 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 604 #endif 605 606 return 0; 607 } 608 #endif 609 610 #ifdef CONFIG_SYS_EXTBDINFO 611 static int setup_board_extra(void) 612 { 613 bd_t *bd = gd->bd; 614 615 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 616 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 617 sizeof(bd->bi_r_version)); 618 619 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 620 bd->bi_plb_busfreq = gd->bus_clk; 621 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 622 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 623 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 624 bd->bi_pci_busfreq = get_PCI_freq(); 625 bd->bi_opbfreq = get_OPB_freq(); 626 #elif defined(CONFIG_XILINX_405) 627 bd->bi_pci_busfreq = get_PCI_freq(); 628 #endif 629 630 return 0; 631 } 632 #endif 633 634 #ifdef CONFIG_POST 635 static int init_post(void) 636 { 637 post_bootmode_init(); 638 post_run(NULL, POST_ROM | post_bootmode_get(0)); 639 640 return 0; 641 } 642 #endif 643 644 static int reloc_fdt(void) 645 { 646 #ifndef CONFIG_OF_EMBED 647 if (gd->flags & GD_FLG_SKIP_RELOC) 648 return 0; 649 if (gd->new_fdt) { 650 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 651 gd->fdt_blob = gd->new_fdt; 652 } 653 #endif 654 655 return 0; 656 } 657 658 static int setup_reloc(void) 659 { 660 if (gd->flags & GD_FLG_SKIP_RELOC) { 661 debug("Skipping relocation due to flag\n"); 662 return 0; 663 } 664 665 #ifdef CONFIG_SYS_TEXT_BASE 666 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 667 #ifdef CONFIG_M68K 668 /* 669 * On all ColdFire arch cpu, monitor code starts always 670 * just after the default vector table location, so at 0x400 671 */ 672 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 673 #endif 674 #endif 675 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 676 677 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 678 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 679 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 680 gd->start_addr_sp); 681 682 return 0; 683 } 684 685 #ifdef CONFIG_OF_BOARD_FIXUP 686 static int fix_fdt(void) 687 { 688 return board_fix_fdt((void *)gd->fdt_blob); 689 } 690 #endif 691 692 /* ARM calls relocate_code from its crt0.S */ 693 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 694 !CONFIG_IS_ENABLED(X86_64) 695 696 static int jump_to_copy(void) 697 { 698 if (gd->flags & GD_FLG_SKIP_RELOC) 699 return 0; 700 /* 701 * x86 is special, but in a nice way. It uses a trampoline which 702 * enables the dcache if possible. 703 * 704 * For now, other archs use relocate_code(), which is implemented 705 * similarly for all archs. When we do generic relocation, hopefully 706 * we can make all archs enable the dcache prior to relocation. 707 */ 708 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 709 /* 710 * SDRAM and console are now initialised. The final stack can now 711 * be setup in SDRAM. Code execution will continue in Flash, but 712 * with the stack in SDRAM and Global Data in temporary memory 713 * (CPU cache) 714 */ 715 arch_setup_gd(gd->new_gd); 716 board_init_f_r_trampoline(gd->start_addr_sp); 717 #else 718 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 719 #endif 720 721 return 0; 722 } 723 #endif 724 725 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 726 static int mark_bootstage(void) 727 { 728 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 729 730 return 0; 731 } 732 733 static int initf_console_record(void) 734 { 735 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 736 return console_record_init(); 737 #else 738 return 0; 739 #endif 740 } 741 742 static int initf_dm(void) 743 { 744 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 745 int ret; 746 747 ret = dm_init_and_scan(true); 748 if (ret) 749 return ret; 750 #endif 751 #ifdef CONFIG_TIMER_EARLY 752 ret = dm_timer_init(); 753 if (ret) 754 return ret; 755 #endif 756 757 return 0; 758 } 759 760 /* Architecture-specific memory reservation */ 761 __weak int reserve_arch(void) 762 { 763 return 0; 764 } 765 766 __weak int arch_cpu_init_dm(void) 767 { 768 return 0; 769 } 770 771 static const init_fnc_t init_sequence_f[] = { 772 setup_mon_len, 773 #ifdef CONFIG_OF_CONTROL 774 fdtdec_setup, 775 #endif 776 #ifdef CONFIG_TRACE 777 trace_early_init, 778 #endif 779 initf_malloc, 780 initf_console_record, 781 #if defined(CONFIG_HAVE_FSP) 782 arch_fsp_init, 783 #endif 784 arch_cpu_init, /* basic arch cpu dependent setup */ 785 mach_cpu_init, /* SoC/machine dependent CPU setup */ 786 initf_dm, 787 arch_cpu_init_dm, 788 mark_bootstage, /* need timer, go after init dm */ 789 #if defined(CONFIG_BOARD_EARLY_INIT_F) 790 board_early_init_f, 791 #endif 792 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 793 /* get CPU and bus clocks according to the environment variable */ 794 get_clocks, /* get CPU and bus clocks (etc.) */ 795 #endif 796 timer_init, /* initialize timer */ 797 #if defined(CONFIG_BOARD_POSTCLK_INIT) 798 board_postclk_init, 799 #endif 800 env_init, /* initialize environment */ 801 init_baud_rate, /* initialze baudrate settings */ 802 serial_init, /* serial communications setup */ 803 console_init_f, /* stage 1 init of console */ 804 display_options, /* say that we are here */ 805 display_text_info, /* show debugging info if required */ 806 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 807 defined(CONFIG_X86) 808 checkcpu, 809 #endif 810 #if defined(CONFIG_DISPLAY_CPUINFO) 811 print_cpuinfo, /* display cpu info (and speed) */ 812 #endif 813 #if defined(CONFIG_DISPLAY_BOARDINFO) 814 show_board_info, 815 #endif 816 INIT_FUNC_WATCHDOG_INIT 817 #if defined(CONFIG_MISC_INIT_F) 818 misc_init_f, 819 #endif 820 INIT_FUNC_WATCHDOG_RESET 821 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 822 init_func_i2c, 823 #endif 824 #if defined(CONFIG_HARD_SPI) 825 init_func_spi, 826 #endif 827 announce_dram_init, 828 /* TODO: unify all these dram functions? */ 829 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 830 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 831 defined(CONFIG_SH) 832 dram_init, /* configure available RAM banks */ 833 #endif 834 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 835 init_func_ram, 836 #endif 837 #ifdef CONFIG_POST 838 post_init_f, 839 #endif 840 INIT_FUNC_WATCHDOG_RESET 841 #if defined(CONFIG_SYS_DRAM_TEST) 842 testdram, 843 #endif /* CONFIG_SYS_DRAM_TEST */ 844 INIT_FUNC_WATCHDOG_RESET 845 846 #ifdef CONFIG_POST 847 init_post, 848 #endif 849 INIT_FUNC_WATCHDOG_RESET 850 /* 851 * Now that we have DRAM mapped and working, we can 852 * relocate the code and continue running from DRAM. 853 * 854 * Reserve memory at end of RAM for (top down in that order): 855 * - area that won't get touched by U-Boot and Linux (optional) 856 * - kernel log buffer 857 * - protected RAM 858 * - LCD framebuffer 859 * - monitor code 860 * - board info struct 861 */ 862 setup_dest_addr, 863 #if defined(CONFIG_LOGBUFFER) 864 reserve_logbuffer, 865 #endif 866 #ifdef CONFIG_PRAM 867 reserve_pram, 868 #endif 869 reserve_round_4k, 870 #ifdef CONFIG_ARM 871 reserve_mmu, 872 #endif 873 reserve_video, 874 reserve_trace, 875 reserve_uboot, 876 reserve_malloc, 877 reserve_board, 878 setup_machine, 879 reserve_global_data, 880 reserve_fdt, 881 reserve_arch, 882 reserve_stacks, 883 dram_init_banksize, 884 show_dram_config, 885 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 886 defined(CONFIG_SH) 887 setup_board_part1, 888 #endif 889 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 890 INIT_FUNC_WATCHDOG_RESET 891 setup_board_part2, 892 #endif 893 display_new_sp, 894 #ifdef CONFIG_SYS_EXTBDINFO 895 setup_board_extra, 896 #endif 897 #ifdef CONFIG_OF_BOARD_FIXUP 898 fix_fdt, 899 #endif 900 INIT_FUNC_WATCHDOG_RESET 901 reloc_fdt, 902 setup_reloc, 903 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 904 copy_uboot_to_ram, 905 do_elf_reloc_fixups, 906 clear_bss, 907 #endif 908 #if defined(CONFIG_XTENSA) 909 clear_bss, 910 #endif 911 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 912 !CONFIG_IS_ENABLED(X86_64) 913 jump_to_copy, 914 #endif 915 NULL, 916 }; 917 918 void board_init_f(ulong boot_flags) 919 { 920 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 921 /* 922 * For some architectures, global data is initialized and used before 923 * calling this function. The data should be preserved. For others, 924 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 925 * here to host global data until relocation. 926 */ 927 gd_t data; 928 929 gd = &data; 930 931 /* 932 * Clear global data before it is accessed at debug print 933 * in initcall_run_list. Otherwise the debug print probably 934 * get the wrong value of gd->have_console. 935 */ 936 zero_global_data(); 937 #endif 938 939 gd->flags = boot_flags; 940 gd->have_console = 0; 941 942 if (initcall_run_list(init_sequence_f)) 943 hang(); 944 945 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 946 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 947 /* NOTREACHED - jump_to_copy() does not return */ 948 hang(); 949 #endif 950 } 951 952 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 953 /* 954 * For now this code is only used on x86. 955 * 956 * init_sequence_f_r is the list of init functions which are run when 957 * U-Boot is executing from Flash with a semi-limited 'C' environment. 958 * The following limitations must be considered when implementing an 959 * '_f_r' function: 960 * - 'static' variables are read-only 961 * - Global Data (gd->xxx) is read/write 962 * 963 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 964 * supported). It _should_, if possible, copy global data to RAM and 965 * initialise the CPU caches (to speed up the relocation process) 966 * 967 * NOTE: At present only x86 uses this route, but it is intended that 968 * all archs will move to this when generic relocation is implemented. 969 */ 970 static const init_fnc_t init_sequence_f_r[] = { 971 #if !CONFIG_IS_ENABLED(X86_64) 972 init_cache_f_r, 973 #endif 974 975 NULL, 976 }; 977 978 void board_init_f_r(void) 979 { 980 if (initcall_run_list(init_sequence_f_r)) 981 hang(); 982 983 /* 984 * The pre-relocation drivers may be using memory that has now gone 985 * away. Mark serial as unavailable - this will fall back to the debug 986 * UART if available. 987 */ 988 gd->flags &= ~GD_FLG_SERIAL_READY; 989 990 /* 991 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 992 * Transfer execution from Flash to RAM by calculating the address 993 * of the in-RAM copy of board_init_r() and calling it 994 */ 995 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 996 997 /* NOTREACHED - board_init_r() does not return */ 998 hang(); 999 } 1000 #endif /* CONFIG_X86 */ 1001