1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <console.h> 15 #include <environment.h> 16 #include <dm.h> 17 #include <fdtdec.h> 18 #include <fs.h> 19 #include <i2c.h> 20 #include <initcall.h> 21 #include <init_helpers.h> 22 #include <malloc.h> 23 #include <mapmem.h> 24 #include <os.h> 25 #include <post.h> 26 #include <relocate.h> 27 #include <spi.h> 28 #include <status_led.h> 29 #include <timer.h> 30 #include <trace.h> 31 #include <video.h> 32 #include <watchdog.h> 33 #ifdef CONFIG_MACH_TYPE 34 #include <asm/mach-types.h> 35 #endif 36 #if defined(CONFIG_MP) && defined(CONFIG_PPC) 37 #include <asm/mp.h> 38 #endif 39 #include <asm/io.h> 40 #include <asm/sections.h> 41 #include <dm/root.h> 42 #include <linux/errno.h> 43 #include <bidram.h> 44 #include <sysmem.h> 45 46 /* 47 * Pointer to initial global data area 48 * 49 * Here we initialize it if needed. 50 */ 51 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 52 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 53 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 54 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 55 #else 56 DECLARE_GLOBAL_DATA_PTR; 57 #endif 58 59 /* 60 * TODO(sjg@chromium.org): IMO this code should be 61 * refactored to a single function, something like: 62 * 63 * void led_set_state(enum led_colour_t colour, int on); 64 */ 65 /************************************************************************ 66 * Coloured LED functionality 67 ************************************************************************ 68 * May be supplied by boards if desired 69 */ 70 __weak void coloured_LED_init(void) {} 71 __weak void red_led_on(void) {} 72 __weak void red_led_off(void) {} 73 __weak void green_led_on(void) {} 74 __weak void green_led_off(void) {} 75 __weak void yellow_led_on(void) {} 76 __weak void yellow_led_off(void) {} 77 __weak void blue_led_on(void) {} 78 __weak void blue_led_off(void) {} 79 80 /* 81 * Why is gd allocated a register? Prior to reloc it might be better to 82 * just pass it around to each function in this file? 83 * 84 * After reloc one could argue that it is hardly used and doesn't need 85 * to be in a register. Or if it is it should perhaps hold pointers to all 86 * global data for all modules, so that post-reloc we can avoid the massive 87 * literal pool we get on ARM. Or perhaps just encourage each module to use 88 * a structure... 89 */ 90 91 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 92 static int init_func_watchdog_init(void) 93 { 94 # if defined(CONFIG_HW_WATCHDOG) && \ 95 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 96 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 97 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 98 defined(CONFIG_IMX_WATCHDOG)) 99 hw_watchdog_init(); 100 puts(" Watchdog enabled\n"); 101 # endif 102 WATCHDOG_RESET(); 103 104 return 0; 105 } 106 107 int init_func_watchdog_reset(void) 108 { 109 WATCHDOG_RESET(); 110 111 return 0; 112 } 113 #endif /* CONFIG_WATCHDOG */ 114 115 __weak void board_add_ram_info(int use_default) 116 { 117 /* please define platform specific board_add_ram_info() */ 118 } 119 120 static int init_baud_rate(void) 121 { 122 if (gd && gd->serial.using_pre_serial) 123 gd->baudrate = env_get_ulong("baudrate", 10, gd->serial.baudrate); 124 else 125 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE); 126 127 return 0; 128 } 129 130 static int display_text_info(void) 131 { 132 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 133 ulong bss_start, bss_end, text_base; 134 135 bss_start = (ulong)&__bss_start; 136 bss_end = (ulong)&__bss_end; 137 138 #ifdef CONFIG_SYS_TEXT_BASE 139 text_base = CONFIG_SYS_TEXT_BASE; 140 #else 141 text_base = CONFIG_SYS_MONITOR_BASE; 142 #endif 143 144 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 145 text_base, bss_start, bss_end); 146 #endif 147 148 return 0; 149 } 150 151 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) 152 static int announce_pre_serial(void) 153 { 154 if (gd && gd->serial.using_pre_serial) 155 printf("PreSerial: %d\n", gd->serial.id); 156 157 return 0; 158 } 159 #endif 160 161 static int announce_dram_init(void) 162 { 163 #ifndef CONFIG_SUPPORT_USBPLUG 164 puts("DRAM: "); 165 #endif 166 return 0; 167 } 168 169 static int show_dram_config(void) 170 { 171 unsigned long long size; 172 173 #ifdef CONFIG_NR_DRAM_BANKS 174 int i; 175 176 debug("\nRAM Configuration:\n"); 177 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 178 size += gd->bd->bi_dram[i].size; 179 debug("Bank #%d: %llx ", i, 180 (unsigned long long)(gd->bd->bi_dram[i].start)); 181 #ifdef DEBUG 182 print_size(gd->bd->bi_dram[i].size, "\n"); 183 #endif 184 } 185 debug("\nDRAM: "); 186 #else 187 size = gd->ram_size; 188 #endif 189 190 #ifdef CONFIG_BIDRAM 191 size += bidram_append_size(); 192 #endif 193 194 #ifndef CONFIG_SUPPORT_USBPLUG 195 print_size(size, ""); 196 board_add_ram_info(0); 197 putc('\n'); 198 #endif 199 return 0; 200 } 201 202 __weak int dram_init_banksize(void) 203 { 204 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 205 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 206 gd->bd->bi_dram[0].size = get_effective_memsize(); 207 #endif 208 209 return 0; 210 } 211 212 #if defined(CONFIG_SYS_I2C) 213 static int init_func_i2c(void) 214 { 215 puts("I2C: "); 216 #ifdef CONFIG_SYS_I2C 217 i2c_init_all(); 218 #else 219 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 220 #endif 221 puts("ready\n"); 222 return 0; 223 } 224 #endif 225 226 #if defined(CONFIG_HARD_SPI) 227 static int init_func_spi(void) 228 { 229 puts("SPI: "); 230 spi_init(); 231 puts("ready\n"); 232 return 0; 233 } 234 #endif 235 236 static int setup_mon_len(void) 237 { 238 #if defined(__ARM__) || defined(__MICROBLAZE__) 239 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 240 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 241 gd->mon_len = (ulong)&_end - (ulong)_init; 242 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 243 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 244 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV) 245 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 246 #elif defined(CONFIG_SYS_MONITOR_BASE) 247 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 248 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 249 #endif 250 return 0; 251 } 252 253 __weak int arch_cpu_init(void) 254 { 255 return 0; 256 } 257 258 __weak int mach_cpu_init(void) 259 { 260 return 0; 261 } 262 263 /* Get the top of usable RAM */ 264 __weak ulong board_get_usable_ram_top(ulong total_size) 265 { 266 #ifdef CONFIG_SYS_SDRAM_BASE 267 /* 268 * Detect whether we have so much RAM that it goes past the end of our 269 * 32-bit address space. If so, clip the usable RAM so it doesn't. 270 */ 271 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 272 /* 273 * Will wrap back to top of 32-bit space when reservations 274 * are made. 275 */ 276 return 0; 277 #endif 278 return gd->ram_top; 279 } 280 281 static int setup_dest_addr(void) 282 { 283 debug("Monitor len: %08lX\n", gd->mon_len); 284 /* 285 * Ram is setup, size stored in gd !! 286 */ 287 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 288 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 289 /* 290 * Subtract specified amount of memory to hide so that it won't 291 * get "touched" at all by U-Boot. By fixing up gd->ram_size 292 * the Linux kernel should now get passed the now "corrected" 293 * memory size and won't touch it either. This should work 294 * for arch/ppc and arch/powerpc. Only Linux board ports in 295 * arch/powerpc with bootwrapper support, that recalculate the 296 * memory size from the SDRAM controller setup will have to 297 * get fixed. 298 */ 299 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 300 #endif 301 #ifdef CONFIG_SYS_SDRAM_BASE 302 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 303 #endif 304 gd->ram_top += get_effective_memsize(); 305 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 306 gd->relocaddr = gd->ram_top; 307 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 308 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 309 /* 310 * We need to make sure the location we intend to put secondary core 311 * boot code is reserved and not used by any part of u-boot 312 */ 313 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 314 gd->relocaddr = determine_mp_bootpg(NULL); 315 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 316 } 317 #endif 318 return 0; 319 } 320 321 #ifdef CONFIG_PRAM 322 /* reserve protected RAM */ 323 static int reserve_pram(void) 324 { 325 ulong reg; 326 327 reg = env_get_ulong("pram", 10, CONFIG_PRAM); 328 gd->relocaddr -= (reg << 10); /* size is in kB */ 329 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 330 gd->relocaddr); 331 return 0; 332 } 333 #endif /* CONFIG_PRAM */ 334 335 /* Round memory pointer down to next 4 kB limit */ 336 static int reserve_round_4k(void) 337 { 338 gd->relocaddr &= ~(4096 - 1); 339 return 0; 340 } 341 342 #ifdef CONFIG_ARM 343 __weak int reserve_mmu(void) 344 { 345 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 346 /* reserve TLB table */ 347 gd->arch.tlb_size = PGTABLE_SIZE; 348 gd->relocaddr -= gd->arch.tlb_size; 349 350 /* round down to next 64 kB limit */ 351 gd->relocaddr &= ~(0x10000 - 1); 352 353 gd->arch.tlb_addr = gd->relocaddr; 354 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 355 gd->arch.tlb_addr + gd->arch.tlb_size); 356 357 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 358 /* 359 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 360 * with location within secure ram. 361 */ 362 gd->arch.tlb_allocated = gd->arch.tlb_addr; 363 #endif 364 #endif 365 366 return 0; 367 } 368 #endif 369 370 static int reserve_video(void) 371 { 372 #ifdef CONFIG_DM_VIDEO 373 ulong addr; 374 int ret; 375 376 addr = gd->relocaddr; 377 ret = video_reserve(&addr); 378 if (ret) 379 return ret; 380 gd->relocaddr = addr; 381 #elif defined(CONFIG_LCD) 382 # ifdef CONFIG_FB_ADDR 383 gd->fb_base = CONFIG_FB_ADDR; 384 # else 385 /* reserve memory for LCD display (always full pages) */ 386 gd->relocaddr = lcd_setmem(gd->relocaddr); 387 gd->fb_base = gd->relocaddr; 388 # endif /* CONFIG_FB_ADDR */ 389 #elif defined(CONFIG_VIDEO) && \ 390 (!defined(CONFIG_PPC)) && \ 391 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 392 !defined(CONFIG_M68K) 393 /* reserve memory for video display (always full pages) */ 394 gd->relocaddr = video_setmem(gd->relocaddr); 395 gd->fb_base = gd->relocaddr; 396 #endif 397 398 return 0; 399 } 400 401 static int reserve_trace(void) 402 { 403 #ifdef CONFIG_TRACE 404 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 405 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 406 debug("Reserving %dk for trace data at: %08lx\n", 407 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 408 #endif 409 410 return 0; 411 } 412 413 static int reserve_uboot(void) 414 { 415 /* 416 * reserve memory for U-Boot code, data & bss 417 * round down to next 4 kB limit 418 */ 419 gd->relocaddr -= gd->mon_len; 420 gd->relocaddr &= ~(4096 - 1); 421 #if defined(CONFIG_E500) || defined(CONFIG_MIPS) 422 /* round down to next 64 kB limit so that IVPR stays aligned */ 423 gd->relocaddr &= ~(65536 - 1); 424 #endif 425 426 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 427 gd->relocaddr); 428 429 gd->start_addr_sp = gd->relocaddr; 430 431 return 0; 432 } 433 434 /* reserve memory for malloc() area */ 435 static int reserve_malloc(void) 436 { 437 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 438 debug("Reserving %dk for malloc() at: %08lx\n", 439 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 440 return 0; 441 } 442 443 #ifdef CONFIG_SYS_NONCACHED_MEMORY 444 static int reserve_noncached(void) 445 { 446 phys_addr_t start, end; 447 size_t size; 448 449 end = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) - MMU_SECTION_SIZE; 450 size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE); 451 start = end - size; 452 gd->start_addr_sp = start; 453 debug("Reserving %zu for noncached_alloc() at: %08lx\n", 454 size, gd->start_addr_sp); 455 456 return 0; 457 } 458 #endif 459 460 /* (permanently) allocate a Board Info struct */ 461 static int reserve_board(void) 462 { 463 if (!gd->bd) { 464 gd->start_addr_sp -= sizeof(bd_t); 465 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 466 memset(gd->bd, '\0', sizeof(bd_t)); 467 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 468 sizeof(bd_t), gd->start_addr_sp); 469 } 470 return 0; 471 } 472 473 static int setup_machine(void) 474 { 475 #ifdef CONFIG_MACH_TYPE 476 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 477 #endif 478 return 0; 479 } 480 481 static int reserve_global_data(void) 482 { 483 gd->start_addr_sp -= sizeof(gd_t); 484 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 485 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 486 sizeof(gd_t), gd->start_addr_sp); 487 return 0; 488 } 489 490 static int reserve_fdt(void) 491 { 492 #ifndef CONFIG_OF_EMBED 493 /* 494 * If the device tree is sitting immediately above our image then we 495 * must relocate it. If it is embedded in the data section, then it 496 * will be relocated with other data. 497 */ 498 if (gd->fdt_blob) { 499 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 500 501 gd->start_addr_sp -= gd->fdt_size; 502 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 503 debug("Reserving %lu Bytes for FDT at: %08lx\n", 504 gd->fdt_size, gd->start_addr_sp); 505 } 506 #endif 507 508 return 0; 509 } 510 511 static int reserve_bootstage(void) 512 { 513 #ifdef CONFIG_BOOTSTAGE 514 int size = bootstage_get_size(); 515 516 gd->start_addr_sp -= size; 517 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); 518 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size, 519 gd->start_addr_sp); 520 #endif 521 522 return 0; 523 } 524 525 int arch_reserve_stacks(void) 526 { 527 return 0; 528 } 529 530 static int reserve_stacks(void) 531 { 532 /* make stack pointer 16-byte aligned */ 533 gd->start_addr_sp -= 16; 534 gd->start_addr_sp &= ~0xf; 535 536 /* 537 * let the architecture-specific code tailor gd->start_addr_sp and 538 * gd->irq_sp 539 */ 540 return arch_reserve_stacks(); 541 } 542 543 static int display_new_sp(void) 544 { 545 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 546 547 return 0; 548 } 549 550 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 551 defined(CONFIG_SH) 552 static int setup_board_part1(void) 553 { 554 bd_t *bd = gd->bd; 555 556 /* 557 * Save local variables to board info struct 558 */ 559 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 560 bd->bi_memsize = gd->ram_size; /* size in bytes */ 561 562 #ifdef CONFIG_SYS_SRAM_BASE 563 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 564 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 565 #endif 566 567 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 568 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 569 #endif 570 #if defined(CONFIG_M68K) 571 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 572 #endif 573 #if defined(CONFIG_MPC83xx) 574 bd->bi_immrbar = CONFIG_SYS_IMMR; 575 #endif 576 577 return 0; 578 } 579 #endif 580 581 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 582 static int setup_board_part2(void) 583 { 584 bd_t *bd = gd->bd; 585 586 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 587 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 588 #if defined(CONFIG_CPM2) 589 bd->bi_cpmfreq = gd->arch.cpm_clk; 590 bd->bi_brgfreq = gd->arch.brg_clk; 591 bd->bi_sccfreq = gd->arch.scc_clk; 592 bd->bi_vco = gd->arch.vco_out; 593 #endif /* CONFIG_CPM2 */ 594 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 595 bd->bi_pcifreq = gd->pci_clk; 596 #endif 597 #if defined(CONFIG_EXTRA_CLOCK) 598 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 599 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 600 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 601 #endif 602 603 return 0; 604 } 605 #endif 606 607 #ifdef CONFIG_POST 608 static int init_post(void) 609 { 610 post_bootmode_init(); 611 post_run(NULL, POST_ROM | post_bootmode_get(0)); 612 613 return 0; 614 } 615 #endif 616 617 static int reloc_fdt(void) 618 { 619 #ifndef CONFIG_OF_EMBED 620 if (gd->flags & GD_FLG_SKIP_RELOC) 621 return 0; 622 if (gd->new_fdt) { 623 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 624 gd->fdt_blob = gd->new_fdt; 625 #ifdef CONFIG_USING_KERNEL_DTB 626 gd->ufdt_blob = gd->new_fdt; 627 #endif 628 } 629 #endif 630 631 return 0; 632 } 633 634 static int reloc_bootstage(void) 635 { 636 #ifdef CONFIG_BOOTSTAGE 637 if (gd->flags & GD_FLG_SKIP_RELOC) 638 return 0; 639 if (gd->new_bootstage) { 640 int size = bootstage_get_size(); 641 642 debug("Copying bootstage from %p to %p, size %x\n", 643 gd->bootstage, gd->new_bootstage, size); 644 memcpy(gd->new_bootstage, gd->bootstage, size); 645 gd->bootstage = gd->new_bootstage; 646 } 647 #endif 648 649 return 0; 650 } 651 652 static int setup_reloc(void) 653 { 654 if (gd->flags & GD_FLG_SKIP_RELOC) { 655 debug("Skipping relocation due to flag\n"); 656 return 0; 657 } 658 659 #ifndef CONFIG_SKIP_RELOCATE_UBOOT 660 #ifdef CONFIG_SYS_TEXT_BASE 661 #ifdef ARM 662 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; 663 #elif defined(CONFIG_M68K) 664 /* 665 * On all ColdFire arch cpu, monitor code starts always 666 * just after the default vector table location, so at 0x400 667 */ 668 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 669 #else 670 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 671 #endif 672 #endif 673 674 #else 675 gd->reloc_off = 0; 676 #endif 677 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 678 679 #ifndef CONFIG_SUPPORT_USBPLUG 680 printf("Relocation Offset: %08lx, fdt: %08lx\n", 681 gd->reloc_off, (ulong)gd->new_fdt); 682 #endif 683 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 684 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 685 gd->start_addr_sp); 686 687 return 0; 688 } 689 690 #ifdef CONFIG_OF_BOARD_FIXUP 691 static int fix_fdt(void) 692 { 693 return board_fix_fdt((void *)gd->fdt_blob); 694 } 695 #endif 696 697 /* ARM calls relocate_code from its crt0.S */ 698 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 699 !CONFIG_IS_ENABLED(X86_64) 700 701 static int jump_to_copy(void) 702 { 703 if (gd->flags & GD_FLG_SKIP_RELOC) 704 return 0; 705 /* 706 * x86 is special, but in a nice way. It uses a trampoline which 707 * enables the dcache if possible. 708 * 709 * For now, other archs use relocate_code(), which is implemented 710 * similarly for all archs. When we do generic relocation, hopefully 711 * we can make all archs enable the dcache prior to relocation. 712 */ 713 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 714 /* 715 * SDRAM and console are now initialised. The final stack can now 716 * be setup in SDRAM. Code execution will continue in Flash, but 717 * with the stack in SDRAM and Global Data in temporary memory 718 * (CPU cache) 719 */ 720 arch_setup_gd(gd->new_gd); 721 board_init_f_r_trampoline(gd->start_addr_sp); 722 #else 723 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 724 #endif 725 726 return 0; 727 } 728 #endif 729 730 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 731 static int initf_bootstage(void) 732 { 733 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) && 734 IS_ENABLED(CONFIG_BOOTSTAGE_STASH); 735 int ret; 736 737 ret = bootstage_init(!from_spl); 738 if (ret) 739 return ret; 740 if (from_spl) { 741 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR, 742 CONFIG_BOOTSTAGE_STASH_SIZE); 743 744 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); 745 if (ret && ret != -ENOENT) { 746 debug("Failed to unstash bootstage: err=%d\n", ret); 747 return ret; 748 } 749 } 750 751 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 752 753 return 0; 754 } 755 756 static int initf_console_record(void) 757 { 758 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN) 759 return console_record_init(); 760 #else 761 return 0; 762 #endif 763 } 764 765 static int initf_dm(void) 766 { 767 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN) 768 int ret; 769 770 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f"); 771 ret = dm_init_and_scan(true); 772 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F); 773 if (ret) 774 return ret; 775 #endif 776 #ifdef CONFIG_TIMER_EARLY 777 ret = dm_timer_init(); 778 if (ret) 779 return ret; 780 #endif 781 782 return 0; 783 } 784 785 /* Architecture-specific memory reservation */ 786 __weak int reserve_arch(void) 787 { 788 return 0; 789 } 790 791 __weak int arch_cpu_init_dm(void) 792 { 793 return 0; 794 } 795 796 static const init_fnc_t init_sequence_f[] = { 797 setup_mon_len, 798 #ifdef CONFIG_OF_CONTROL 799 fdtdec_setup, 800 #endif 801 #ifdef CONFIG_TRACE 802 trace_early_init, 803 #endif 804 initf_malloc, 805 log_init, 806 initf_bootstage, /* uses its own timer, so does not need DM */ 807 initf_console_record, 808 #if defined(CONFIG_HAVE_FSP) 809 arch_fsp_init, 810 #endif 811 arch_cpu_init, /* basic arch cpu dependent setup */ 812 mach_cpu_init, /* SoC/machine dependent CPU setup */ 813 initf_dm, 814 arch_cpu_init_dm, 815 #if defined(CONFIG_BOARD_EARLY_INIT_F) 816 board_early_init_f, 817 #endif 818 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 819 /* get CPU and bus clocks according to the environment variable */ 820 get_clocks, /* get CPU and bus clocks (etc.) */ 821 #endif 822 #if !defined(CONFIG_M68K) 823 timer_init, /* initialize timer */ 824 #endif 825 #if defined(CONFIG_BOARD_POSTCLK_INIT) 826 board_postclk_init, 827 #endif 828 env_init, /* initialize environment */ 829 init_baud_rate, /* initialze baudrate settings */ 830 serial_init, /* serial communications setup */ 831 console_init_f, /* stage 1 init of console */ 832 display_options, /* say that we are here */ 833 display_text_info, /* show debugging info if required */ 834 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 835 defined(CONFIG_X86) 836 checkcpu, 837 #endif 838 #if defined(CONFIG_DISPLAY_CPUINFO) 839 print_cpuinfo, /* display cpu info (and speed) */ 840 #endif 841 #if defined(CONFIG_DTB_RESELECT) 842 embedded_dtb_select, 843 #endif 844 #if defined(CONFIG_DISPLAY_BOARDINFO) 845 show_board_info, 846 #endif 847 INIT_FUNC_WATCHDOG_INIT 848 #if defined(CONFIG_MISC_INIT_F) 849 misc_init_f, 850 #endif 851 INIT_FUNC_WATCHDOG_RESET 852 #if defined(CONFIG_SYS_I2C) 853 init_func_i2c, 854 #endif 855 #if defined(CONFIG_HARD_SPI) 856 init_func_spi, 857 #endif 858 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) 859 announce_pre_serial, 860 #endif 861 announce_dram_init, 862 dram_init, /* configure available RAM banks */ 863 #ifdef CONFIG_POST 864 post_init_f, 865 #endif 866 INIT_FUNC_WATCHDOG_RESET 867 #if defined(CONFIG_SYS_DRAM_TEST) 868 testdram, 869 #endif /* CONFIG_SYS_DRAM_TEST */ 870 INIT_FUNC_WATCHDOG_RESET 871 872 #ifdef CONFIG_POST 873 init_post, 874 #endif 875 INIT_FUNC_WATCHDOG_RESET 876 /* 877 * Now that we have DRAM mapped and working, we can 878 * relocate the code and continue running from DRAM. 879 * 880 * Reserve memory at end of RAM for (top down in that order): 881 * - area that won't get touched by U-Boot and Linux (optional) 882 * - kernel log buffer 883 * - protected RAM 884 * - LCD framebuffer 885 * - monitor code 886 * - board info struct 887 */ 888 setup_dest_addr, 889 #ifdef CONFIG_PRAM 890 reserve_pram, 891 #endif 892 reserve_round_4k, 893 #ifdef CONFIG_ARM 894 reserve_mmu, 895 #endif 896 reserve_video, 897 reserve_trace, 898 reserve_uboot, 899 reserve_malloc, 900 #ifdef CONFIG_SYS_NONCACHED_MEMORY 901 reserve_noncached, 902 #endif 903 reserve_board, 904 setup_machine, 905 reserve_global_data, 906 reserve_fdt, 907 reserve_bootstage, 908 reserve_arch, 909 reserve_stacks, 910 dram_init_banksize, 911 show_dram_config, 912 #ifdef CONFIG_SYSMEM 913 sysmem_init, /* Validate above reserve memory */ 914 #endif 915 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 916 defined(CONFIG_SH) 917 setup_board_part1, 918 #endif 919 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 920 INIT_FUNC_WATCHDOG_RESET 921 setup_board_part2, 922 #endif 923 display_new_sp, 924 #ifdef CONFIG_OF_BOARD_FIXUP 925 fix_fdt, 926 #endif 927 INIT_FUNC_WATCHDOG_RESET 928 reloc_fdt, 929 reloc_bootstage, 930 setup_reloc, 931 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 932 copy_uboot_to_ram, 933 do_elf_reloc_fixups, 934 clear_bss, 935 #endif 936 #if defined(CONFIG_XTENSA) 937 clear_bss, 938 #endif 939 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 940 !CONFIG_IS_ENABLED(X86_64) 941 jump_to_copy, 942 #endif 943 NULL, 944 }; 945 946 void board_init_f(ulong boot_flags) 947 { 948 gd->flags = boot_flags; 949 gd->have_console = 0; 950 951 #if defined(CONFIG_DISABLE_CONSOLE) 952 gd->flags |= GD_FLG_DISABLE_CONSOLE; 953 #endif 954 955 if (initcall_run_list(init_sequence_f)) 956 hang(); 957 958 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 959 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 960 /* NOTREACHED - jump_to_copy() does not return */ 961 hang(); 962 #endif 963 } 964 965 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 966 /* 967 * For now this code is only used on x86. 968 * 969 * init_sequence_f_r is the list of init functions which are run when 970 * U-Boot is executing from Flash with a semi-limited 'C' environment. 971 * The following limitations must be considered when implementing an 972 * '_f_r' function: 973 * - 'static' variables are read-only 974 * - Global Data (gd->xxx) is read/write 975 * 976 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 977 * supported). It _should_, if possible, copy global data to RAM and 978 * initialise the CPU caches (to speed up the relocation process) 979 * 980 * NOTE: At present only x86 uses this route, but it is intended that 981 * all archs will move to this when generic relocation is implemented. 982 */ 983 static const init_fnc_t init_sequence_f_r[] = { 984 #if !CONFIG_IS_ENABLED(X86_64) 985 init_cache_f_r, 986 #endif 987 988 NULL, 989 }; 990 991 void board_init_f_r(void) 992 { 993 if (initcall_run_list(init_sequence_f_r)) 994 hang(); 995 996 /* 997 * The pre-relocation drivers may be using memory that has now gone 998 * away. Mark serial as unavailable - this will fall back to the debug 999 * UART if available. 1000 * 1001 * Do the same with log drivers since the memory may not be available. 1002 */ 1003 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY); 1004 #ifdef CONFIG_TIMER 1005 gd->timer = NULL; 1006 #endif 1007 1008 /* 1009 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1010 * Transfer execution from Flash to RAM by calculating the address 1011 * of the in-RAM copy of board_init_r() and calling it 1012 */ 1013 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1014 1015 /* NOTREACHED - board_init_r() does not return */ 1016 hang(); 1017 } 1018 #endif /* CONFIG_X86 */ 1019