xref: /rk3399_rockchip-uboot/cmd/mp.c (revision 2e192b245ed36a63bab0ef576999a95e23f60ecd)
1*2e192b24SSimon Glass /*
2*2e192b24SSimon Glass  * Copyright 2008-2009 Freescale Semiconductor, Inc.
3*2e192b24SSimon Glass  *
4*2e192b24SSimon Glass  * SPDX-License-Identifier:	GPL-2.0+
5*2e192b24SSimon Glass  */
6*2e192b24SSimon Glass 
7*2e192b24SSimon Glass #include <common.h>
8*2e192b24SSimon Glass #include <command.h>
9*2e192b24SSimon Glass 
cpu_status_all(void)10*2e192b24SSimon Glass static int cpu_status_all(void)
11*2e192b24SSimon Glass {
12*2e192b24SSimon Glass 	unsigned long cpuid;
13*2e192b24SSimon Glass 
14*2e192b24SSimon Glass 	for (cpuid = 0; ; cpuid++) {
15*2e192b24SSimon Glass 		if (!is_core_valid(cpuid)) {
16*2e192b24SSimon Glass 			if (cpuid == 0) {
17*2e192b24SSimon Glass 				printf("Core num: %lu is not valid\n", cpuid);
18*2e192b24SSimon Glass 				return 1;
19*2e192b24SSimon Glass 			}
20*2e192b24SSimon Glass 			break;
21*2e192b24SSimon Glass 		}
22*2e192b24SSimon Glass 		cpu_status(cpuid);
23*2e192b24SSimon Glass 	}
24*2e192b24SSimon Glass 
25*2e192b24SSimon Glass 	return 0;
26*2e192b24SSimon Glass }
27*2e192b24SSimon Glass 
28*2e192b24SSimon Glass static int
cpu_cmd(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])29*2e192b24SSimon Glass cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
30*2e192b24SSimon Glass {
31*2e192b24SSimon Glass 	unsigned long cpuid;
32*2e192b24SSimon Glass 
33*2e192b24SSimon Glass 	if (argc == 2 && strncmp(argv[1], "status", 6) == 0)
34*2e192b24SSimon Glass 		  return cpu_status_all();
35*2e192b24SSimon Glass 
36*2e192b24SSimon Glass 	if (argc < 3)
37*2e192b24SSimon Glass 		return CMD_RET_USAGE;
38*2e192b24SSimon Glass 
39*2e192b24SSimon Glass 	cpuid = simple_strtoul(argv[1], NULL, 10);
40*2e192b24SSimon Glass 	if (!is_core_valid(cpuid)) {
41*2e192b24SSimon Glass 		printf ("Core num: %lu is not valid\n",	cpuid);
42*2e192b24SSimon Glass 		return 1;
43*2e192b24SSimon Glass 	}
44*2e192b24SSimon Glass 
45*2e192b24SSimon Glass 
46*2e192b24SSimon Glass 	if (argc == 3) {
47*2e192b24SSimon Glass 		if (strncmp(argv[2], "reset", 5) == 0)
48*2e192b24SSimon Glass 			cpu_reset(cpuid);
49*2e192b24SSimon Glass 		else if (strncmp(argv[2], "status", 6) == 0)
50*2e192b24SSimon Glass 			cpu_status(cpuid);
51*2e192b24SSimon Glass 		else if (strncmp(argv[2], "disable", 7) == 0)
52*2e192b24SSimon Glass 			return cpu_disable(cpuid);
53*2e192b24SSimon Glass 		else
54*2e192b24SSimon Glass 			return CMD_RET_USAGE;
55*2e192b24SSimon Glass 
56*2e192b24SSimon Glass 		return 0;
57*2e192b24SSimon Glass 	}
58*2e192b24SSimon Glass 
59*2e192b24SSimon Glass 	/* 4 or greater, make sure its release */
60*2e192b24SSimon Glass 	if (strncmp(argv[2], "release", 7) != 0)
61*2e192b24SSimon Glass 		return CMD_RET_USAGE;
62*2e192b24SSimon Glass 
63*2e192b24SSimon Glass 	if (cpu_release(cpuid, argc - 3, argv + 3))
64*2e192b24SSimon Glass 		return CMD_RET_USAGE;
65*2e192b24SSimon Glass 
66*2e192b24SSimon Glass 	return 0;
67*2e192b24SSimon Glass }
68*2e192b24SSimon Glass 
69*2e192b24SSimon Glass #ifdef CONFIG_SYS_LONGHELP
70*2e192b24SSimon Glass static char cpu_help_text[] =
71*2e192b24SSimon Glass 	    "<num> reset                 - Reset cpu <num>\n"
72*2e192b24SSimon Glass 	"cpu status                      - Status of all cpus\n"
73*2e192b24SSimon Glass 	"cpu <num> status                - Status of cpu <num>\n"
74*2e192b24SSimon Glass 	"cpu <num> disable               - Disable cpu <num>\n"
75*2e192b24SSimon Glass 	"cpu <num> release <addr> [args] - Release cpu <num> at <addr> with [args]"
76*2e192b24SSimon Glass #ifdef CONFIG_PPC
77*2e192b24SSimon Glass 	"\n"
78*2e192b24SSimon Glass 	"                         [args] : <pir> <r3> <r6>\n" \
79*2e192b24SSimon Glass 	"                                   pir - processor id (if writeable)\n" \
80*2e192b24SSimon Glass 	"                                    r3 - value for gpr 3\n" \
81*2e192b24SSimon Glass 	"                                    r6 - value for gpr 6\n" \
82*2e192b24SSimon Glass 	"\n" \
83*2e192b24SSimon Glass 	"     Use '-' for any arg if you want the default value.\n" \
84*2e192b24SSimon Glass 	"     Default for r3 is <num> and r6 is 0\n" \
85*2e192b24SSimon Glass 	"\n" \
86*2e192b24SSimon Glass 	"     When cpu <num> is released r4 and r5 = 0.\n" \
87*2e192b24SSimon Glass 	"     r7 will contain the size of the initial mapped area"
88*2e192b24SSimon Glass #endif
89*2e192b24SSimon Glass 	"";
90*2e192b24SSimon Glass #endif
91*2e192b24SSimon Glass 
92*2e192b24SSimon Glass U_BOOT_CMD(
93*2e192b24SSimon Glass 	cpu, CONFIG_SYS_MAXARGS, 1, cpu_cmd,
94*2e192b24SSimon Glass 	"Multiprocessor CPU boot manipulation and release", cpu_help_text
95*2e192b24SSimon Glass );
96