152a822edSMichal Simek /* 252a822edSMichal Simek * (C) Copyright 2007 Michal Simek 352a822edSMichal Simek * 452a822edSMichal Simek * Michal SIMEK <monstr@monstr.eu> 552a822edSMichal Simek * 6*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 752a822edSMichal Simek * 820637888SStephan Linz * CAUTION: This file is a faked configuration !!! 920637888SStephan Linz * There is no real target for the microblaze-generic 1020637888SStephan Linz * configuration. You have to replace this file with 1120637888SStephan Linz * the generated file from your Xilinx design flow. 1252a822edSMichal Simek */ 1352a822edSMichal Simek 14330e5545SMichal Simek #define XILINX_BOARD_NAME microblaze-generic 15330e5545SMichal Simek 1652a822edSMichal Simek /* Microblaze is microblaze_0 */ 1752a822edSMichal Simek #define XILINX_FSL_NUMBER 3 1852a822edSMichal Simek 1952a822edSMichal Simek /* GPIO is LEDs_4Bit*/ 2052a822edSMichal Simek #define XILINX_GPIO_BASEADDR 0x40000000 2152a822edSMichal Simek 2252a822edSMichal Simek /* Flash Memory is FLASH_2Mx32 */ 2352a822edSMichal Simek #define XILINX_FLASH_START 0x2c000000 2452a822edSMichal Simek #define XILINX_FLASH_SIZE 0x00800000 2552a822edSMichal Simek 260f21f98dSMichal Simek /* Watchdog IP is wxi_timebase_wdt_0 */ 270f21f98dSMichal Simek #define XILINX_WATCHDOG_BASEADDR 0x50000000 280f21f98dSMichal Simek #define XILINX_WATCHDOG_IRQ 1 29