152a822edSMichal Simek /* 252a822edSMichal Simek * (C) Copyright 2007 Michal Simek 352a822edSMichal Simek * 452a822edSMichal Simek * Michal SIMEK <monstr@monstr.eu> 552a822edSMichal Simek * 6*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 752a822edSMichal Simek */ 852a822edSMichal Simek 952a822edSMichal Simek /* This is a board specific file. It's OK to include board specific 1052a822edSMichal Simek * header files */ 1152a822edSMichal Simek 1252a822edSMichal Simek #include <common.h> 1352a822edSMichal Simek #include <config.h> 14d69f8f41SMichal Simek #include <netdev.h> 152380b8f5SMichal Simek #include <asm/processor.h> 1652a822edSMichal Simek #include <asm/microblaze_intc.h> 1752a822edSMichal Simek #include <asm/asm.h> 184e779ad2SMichal Simek #include <asm/gpio.h> 194e779ad2SMichal Simek 204e779ad2SMichal Simek #ifdef CONFIG_XILINX_GPIO 214e779ad2SMichal Simek static int reset_pin = -1; 224e779ad2SMichal Simek #endif 2352a822edSMichal Simek 24882b7d72SMike Frysinger int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 2552a822edSMichal Simek { 264e779ad2SMichal Simek #ifdef CONFIG_XILINX_GPIO 274e779ad2SMichal Simek if (reset_pin != -1) 284e779ad2SMichal Simek gpio_direction_output(reset_pin, 1); 2952a822edSMichal Simek #endif 30b364727aSMichal Simek 310f21f98dSMichal Simek #ifdef CONFIG_XILINX_TB_WATCHDOG 320f21f98dSMichal Simek hw_watchdog_disable(); 330f21f98dSMichal Simek #endif 340f21f98dSMichal Simek 3552a822edSMichal Simek puts ("Reseting board\n"); 368848668eSMichal Simek __asm__ __volatile__ (" mts rmsr, r0;" \ 378848668eSMichal Simek "bra r0"); 38b364727aSMichal Simek 39882b7d72SMike Frysinger return 0; 4052a822edSMichal Simek } 4152a822edSMichal Simek 4252a822edSMichal Simek int gpio_init (void) 4352a822edSMichal Simek { 444e779ad2SMichal Simek #ifdef CONFIG_XILINX_GPIO 454e779ad2SMichal Simek reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1); 464e779ad2SMichal Simek if (reset_pin != -1) 474e779ad2SMichal Simek gpio_request(reset_pin, "reset_pin"); 4852a822edSMichal Simek #endif 4952a822edSMichal Simek return 0; 5052a822edSMichal Simek } 5152a822edSMichal Simek 522380b8f5SMichal Simek void board_init(void) 532380b8f5SMichal Simek { 542380b8f5SMichal Simek gpio_init(); 552380b8f5SMichal Simek } 562380b8f5SMichal Simek 57d69f8f41SMichal Simek int board_eth_init(bd_t *bis) 58d69f8f41SMichal Simek { 59c1044a1eSMichal Simek int ret = 0; 60e634138eSMichal Simek 61e634138eSMichal Simek #ifdef CONFIG_XILINX_AXIEMAC 62e634138eSMichal Simek ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR, 63e634138eSMichal Simek XILINX_AXIDMA_BASEADDR); 64e634138eSMichal Simek #endif 65e634138eSMichal Simek 66d69f8f41SMichal Simek #ifdef CONFIG_XILINX_EMACLITE 67c1044a1eSMichal Simek u32 txpp = 0; 68c1044a1eSMichal Simek u32 rxpp = 0; 69c1044a1eSMichal Simek # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG 70c1044a1eSMichal Simek txpp = 1; 71d69f8f41SMichal Simek # endif 72c1044a1eSMichal Simek # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG 73c1044a1eSMichal Simek rxpp = 1; 74c1044a1eSMichal Simek # endif 75c1044a1eSMichal Simek ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, 76c1044a1eSMichal Simek txpp, rxpp); 77c1044a1eSMichal Simek #endif 783ceecef1SStephan Linz 793ceecef1SStephan Linz #ifdef CONFIG_XILINX_LL_TEMAC 803ceecef1SStephan Linz # ifdef XILINX_LLTEMAC_BASEADDR 813ceecef1SStephan Linz # ifdef XILINX_LLTEMAC_FIFO_BASEADDR 823ceecef1SStephan Linz ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 833ceecef1SStephan Linz XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR); 843ceecef1SStephan Linz # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR 853ceecef1SStephan Linz # if XILINX_LLTEMAC_SDMA_USE_DCR == 1 863ceecef1SStephan Linz ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 873ceecef1SStephan Linz XILINX_LL_TEMAC_M_SDMA_DCR, 883ceecef1SStephan Linz XILINX_LLTEMAC_SDMA_CTRL_BASEADDR); 893ceecef1SStephan Linz # else 903ceecef1SStephan Linz ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 913ceecef1SStephan Linz XILINX_LL_TEMAC_M_SDMA_PLB, 923ceecef1SStephan Linz XILINX_LLTEMAC_SDMA_CTRL_BASEADDR); 933ceecef1SStephan Linz # endif 943ceecef1SStephan Linz # endif 953ceecef1SStephan Linz # endif 963ceecef1SStephan Linz # ifdef XILINX_LLTEMAC_BASEADDR1 973ceecef1SStephan Linz # ifdef XILINX_LLTEMAC_FIFO_BASEADDR1 983ceecef1SStephan Linz ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 993ceecef1SStephan Linz XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1); 1003ceecef1SStephan Linz # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1 1013ceecef1SStephan Linz # if XILINX_LLTEMAC_SDMA_USE_DCR == 1 1023ceecef1SStephan Linz ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 1033ceecef1SStephan Linz XILINX_LL_TEMAC_M_SDMA_DCR, 1043ceecef1SStephan Linz XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1); 1053ceecef1SStephan Linz # else 1063ceecef1SStephan Linz ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 1073ceecef1SStephan Linz XILINX_LL_TEMAC_M_SDMA_PLB, 1083ceecef1SStephan Linz XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1); 1093ceecef1SStephan Linz # endif 1103ceecef1SStephan Linz # endif 1113ceecef1SStephan Linz # endif 1123ceecef1SStephan Linz #endif 1133ceecef1SStephan Linz 114c1044a1eSMichal Simek return ret; 115d69f8f41SMichal Simek } 116