xref: /rk3399_rockchip-uboot/board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h (revision 3b19c1dbe0464d1cdf3b3006042cc75bc439321f)
1*f38f5f4bSMarcel Ziswiler /*
2*f38f5f4bSMarcel Ziswiler  * Copyright (c) 2016, Toradex, Inc.
3*f38f5f4bSMarcel Ziswiler  *
4*f38f5f4bSMarcel Ziswiler  * SPDX-License-Identifier: GPL-2.0+
5*f38f5f4bSMarcel Ziswiler  */
6*f38f5f4bSMarcel Ziswiler 
7*f38f5f4bSMarcel Ziswiler #ifndef _PINMUX_CONFIG_APALIS_TK1_H_
8*f38f5f4bSMarcel Ziswiler #define _PINMUX_CONFIG_APALIS_TK1_H_
9*f38f5f4bSMarcel Ziswiler 
10*f38f5f4bSMarcel Ziswiler #define GPIO_INIT(_port, _gpio, _init)			\
11*f38f5f4bSMarcel Ziswiler 	{						\
12*f38f5f4bSMarcel Ziswiler 		.gpio	= TEGRA_GPIO(_port, _gpio),	\
13*f38f5f4bSMarcel Ziswiler 		.init	= TEGRA_GPIO_INIT_##_init,	\
14*f38f5f4bSMarcel Ziswiler 	}
15*f38f5f4bSMarcel Ziswiler 
16*f38f5f4bSMarcel Ziswiler static const struct tegra_gpio_config apalis_tk1_gpio_inits[] = {
17*f38f5f4bSMarcel Ziswiler 	/*        port, pin, init_val */
18*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(A,    1,   IN),
19*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(B,    1,   IN),
20*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(C,    0,   OUT0),
21*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(I,    5,   IN),
22*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(I,    6,   IN),
23*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(J,    0,   IN),
24*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(J,    2,   IN),
25*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(K,    2,   IN),
26*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(K,    7,   IN),
27*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(N,    2,   OUT1),
28*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(N,    4,   OUT1),
29*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(N,    5,   OUT1),
30*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(N,    7,   IN),
31*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(O,    5,   IN),
32*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(Q,    0,   OUT0), /* Shift_CTRL_OE[0] */
33*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(Q,    1,   OUT0), /* Shift_CTRL_OE[1] */
34*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(Q,    2,   OUT0), /* Shift_CTRL_OE[2] */
35*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(Q,    4,   OUT0), /* Shift_CTRL_OE[4] */
36*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(Q,    5,   OUT1), /* Shift_CTRL_Dir_Out[0] */
37*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(Q,    6,   OUT1), /* Shift_CTRL_Dir_Out[1] */
38*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(Q,    7,   OUT1), /* Shift_CTRL_Dir_Out[2] */
39*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(R,    0,   OUT0), /* Shift_CTRL_Dir_In[0] */
40*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(R,    1,   OUT0), /* Shift_CTRL_Dir_In[1] */
41*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(R,    2,   OUT0), /* Shift_CTRL_OE[3] */
42*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(S,    3,   OUT0), /* Shift_CTRL_Dir_In[2] */
43*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(U,    4,   OUT1),
44*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(W,    3,   IN),
45*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(W,    5,   IN),
46*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(BB,   0,  IN),
47*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(BB,   3,  OUT0),
48*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(BB,   4,  IN),
49*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(BB,   5,  OUT1),
50*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(BB,   6,  OUT0),
51*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(CC,   5,  IN),
52*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(DD,   3,  IN),
53*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(EE,   3,  IN),
54*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(EE,   5,  IN),
55*f38f5f4bSMarcel Ziswiler 	GPIO_INIT(FF,   1,  IN),
56*f38f5f4bSMarcel Ziswiler };
57*f38f5f4bSMarcel Ziswiler 
58*f38f5f4bSMarcel Ziswiler #define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel)	\
59*f38f5f4bSMarcel Ziswiler 	{							\
60*f38f5f4bSMarcel Ziswiler 		.pingrp		= PMUX_PINGRP_##_pingrp,	\
61*f38f5f4bSMarcel Ziswiler 		.func		= PMUX_FUNC_##_mux,		\
62*f38f5f4bSMarcel Ziswiler 		.pull		= PMUX_PULL_##_pull,		\
63*f38f5f4bSMarcel Ziswiler 		.tristate	= PMUX_TRI_##_tri,		\
64*f38f5f4bSMarcel Ziswiler 		.io		= PMUX_PIN_##_io,		\
65*f38f5f4bSMarcel Ziswiler 		.od		= PMUX_PIN_OD_##_od,		\
66*f38f5f4bSMarcel Ziswiler 		.rcv_sel	= PMUX_PIN_RCV_SEL_##_rcv_sel,	\
67*f38f5f4bSMarcel Ziswiler 		.lock		= PMUX_PIN_LOCK_DEFAULT,	\
68*f38f5f4bSMarcel Ziswiler 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
69*f38f5f4bSMarcel Ziswiler 	}
70*f38f5f4bSMarcel Ziswiler 
71*f38f5f4bSMarcel Ziswiler static const struct pmux_pingrp_config apalis_tk1_pingrps[] = {
72*f38f5f4bSMarcel Ziswiler 	/*     pingrp,                 mux,          pull,   tri,      e_input, od,      rcv_sel */
73*f38f5f4bSMarcel Ziswiler 	PINCFG(CLK_32K_OUT_PA0,        SOC,          NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
74*f38f5f4bSMarcel Ziswiler 	PINCFG(UART3_CTS_N_PA1,        GMI,          NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
75*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP2_FS_PA2,            HDA,          NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
76*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP2_SCLK_PA3,          HDA,          NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
77*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP2_DIN_PA4,           HDA,          NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
78*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP2_DOUT_PA5,          HDA,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
79*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_CLK_PA6,         SDMMC3,       NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
80*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_CMD_PA7,         SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
81*f38f5f4bSMarcel Ziswiler 	PINCFG(PB0,                    UARTD,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
82*f38f5f4bSMarcel Ziswiler 	PINCFG(PB1,                    RSVD2,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
83*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_DAT3_PB4,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
84*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_DAT2_PB5,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
85*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_DAT1_PB6,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
86*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_DAT0_PB7,        SDMMC3,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
87*f38f5f4bSMarcel Ziswiler 	PINCFG(UART3_RTS_N_PC0,        GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
88*f38f5f4bSMarcel Ziswiler 	PINCFG(UART2_TXD_PC2,          IRDA,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
89*f38f5f4bSMarcel Ziswiler 	PINCFG(UART2_RXD_PC3,          IRDA,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
90*f38f5f4bSMarcel Ziswiler 	PINCFG(GEN1_I2C_SCL_PC4,       I2C1,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
91*f38f5f4bSMarcel Ziswiler 	PINCFG(GEN1_I2C_SDA_PC5,       I2C1,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
92*f38f5f4bSMarcel Ziswiler 	PINCFG(PC7,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
93*f38f5f4bSMarcel Ziswiler 	PINCFG(PG0,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
94*f38f5f4bSMarcel Ziswiler 	PINCFG(PG1,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
95*f38f5f4bSMarcel Ziswiler 	PINCFG(PG2,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
96*f38f5f4bSMarcel Ziswiler 	PINCFG(PG3,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
97*f38f5f4bSMarcel Ziswiler 	PINCFG(PG4,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
98*f38f5f4bSMarcel Ziswiler 	PINCFG(PG5,                    SPI4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
99*f38f5f4bSMarcel Ziswiler 	PINCFG(PG6,                    SPI4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
100*f38f5f4bSMarcel Ziswiler 	PINCFG(PG7,                    SPI4,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
101*f38f5f4bSMarcel Ziswiler 	PINCFG(PH0,                    PWM0,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
102*f38f5f4bSMarcel Ziswiler 	PINCFG(PH1,                    PWM1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
103*f38f5f4bSMarcel Ziswiler 	PINCFG(PH2,                    PWM2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
104*f38f5f4bSMarcel Ziswiler 	PINCFG(PH3,                    PWM3,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
105*f38f5f4bSMarcel Ziswiler 	PINCFG(PH4,                    RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
106*f38f5f4bSMarcel Ziswiler 	PINCFG(PH5,                    RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
107*f38f5f4bSMarcel Ziswiler 	PINCFG(PH6,                    GMI,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
108*f38f5f4bSMarcel Ziswiler 	PINCFG(PH7,                    GMI,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
109*f38f5f4bSMarcel Ziswiler 	PINCFG(PI0,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
110*f38f5f4bSMarcel Ziswiler 	PINCFG(PI1,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
111*f38f5f4bSMarcel Ziswiler 	PINCFG(PI2,                    RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
112*f38f5f4bSMarcel Ziswiler 	PINCFG(PI3,                    SPI4,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
113*f38f5f4bSMarcel Ziswiler 	PINCFG(PI4,                    GMI,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
114*f38f5f4bSMarcel Ziswiler 	PINCFG(PI5,                    RSVD2,        UP,     TRISTATE, INPUT,   ENABLE,  DEFAULT),
115*f38f5f4bSMarcel Ziswiler 	PINCFG(PI6,                    RSVD1,        UP,     TRISTATE, INPUT,   DEFAULT, DEFAULT),
116*f38f5f4bSMarcel Ziswiler 	PINCFG(PI7,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
117*f38f5f4bSMarcel Ziswiler 	PINCFG(PJ0,                    RSVD1,        UP,     TRISTATE, INPUT,   ENABLE,  DEFAULT),
118*f38f5f4bSMarcel Ziswiler 	PINCFG(PJ2,                    RSVD1,        UP,     TRISTATE, INPUT,   ENABLE,  DEFAULT),
119*f38f5f4bSMarcel Ziswiler 	PINCFG(UART2_CTS_N_PJ5,        UARTB,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
120*f38f5f4bSMarcel Ziswiler 	PINCFG(UART2_RTS_N_PJ6,        UARTB,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
121*f38f5f4bSMarcel Ziswiler 	PINCFG(PJ7,                    UARTD,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
122*f38f5f4bSMarcel Ziswiler 	PINCFG(PK0,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
123*f38f5f4bSMarcel Ziswiler 	PINCFG(PK1,                    RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
124*f38f5f4bSMarcel Ziswiler 	PINCFG(PK2,                    RSVD1,        UP,     TRISTATE, INPUT,   ENABLE,  DEFAULT),
125*f38f5f4bSMarcel Ziswiler 	PINCFG(PK3,                    GMI,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
126*f38f5f4bSMarcel Ziswiler 	PINCFG(PK4,                    RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
127*f38f5f4bSMarcel Ziswiler 	PINCFG(SPDIF_OUT_PK5,          SPDIF,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
128*f38f5f4bSMarcel Ziswiler 	PINCFG(SPDIF_IN_PK6,           SPDIF,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
129*f38f5f4bSMarcel Ziswiler 	PINCFG(PK7,                    RSVD2,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
130*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP1_FS_PN0,            RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
131*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP1_DIN_PN1,           RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
132*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP1_DOUT_PN2,          SATA,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
133*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP1_SCLK_PN3,          RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
134*f38f5f4bSMarcel Ziswiler 	PINCFG(USB_VBUS_EN0_PN4,       RSVD2,        NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
135*f38f5f4bSMarcel Ziswiler 	PINCFG(USB_VBUS_EN1_PN5,       RSVD2,        NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
136*f38f5f4bSMarcel Ziswiler 	PINCFG(HDMI_INT_PN7,           RSVD1,        DOWN,   TRISTATE, INPUT,   DEFAULT, NORMAL),
137*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA7_PO0,         ULPI,         DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
138*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA0_PO1,         ULPI,         DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
139*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA1_PO2,         ULPI,         DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
140*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA2_PO3,         ULPI,         DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
141*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA3_PO4,         ULPI,         DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
142*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA4_PO5,         ULPI,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
143*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA5_PO6,         ULPI,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
144*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DATA6_PO7,         ULPI,         DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
145*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP3_FS_PP0,            I2S2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
146*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP3_DIN_PP1,           I2S2,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
147*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP3_DOUT_PP2,          I2S2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
148*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP3_SCLK_PP3,          I2S2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
149*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP4_FS_PP4,            RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
150*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP4_DIN_PP5,           RSVD3,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
151*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP4_DOUT_PP6,          RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
152*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP4_SCLK_PP7,          RSVD3,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
153*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL0_PQ0,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
154*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL1_PQ1,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
155*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL2_PQ2,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
156*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL3_PQ3,            KBC,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
157*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL4_PQ4,            KBC,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
158*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL5_PQ5,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
159*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL6_PQ6,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
160*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_COL7_PQ7,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
161*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW0_PR0,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
162*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW1_PR1,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
163*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW2_PR2,            RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
164*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW3_PR3,            KBC,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
165*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW4_PR4,            RSVD3,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
166*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW5_PR5,            RSVD3,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
167*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW6_PR6,            KBC,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
168*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW7_PR7,            RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
169*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW8_PS0,            RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
170*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW9_PS1,            RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
171*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW10_PS2,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
172*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW11_PS3,           RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
173*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW12_PS4,           RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
174*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW13_PS5,           RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
175*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW14_PS6,           RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
176*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW15_PS7,           RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
177*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW16_PT0,           RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
178*f38f5f4bSMarcel Ziswiler 	PINCFG(KB_ROW17_PT1,           RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
179*f38f5f4bSMarcel Ziswiler 	PINCFG(GEN2_I2C_SCL_PT5,       I2C2,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
180*f38f5f4bSMarcel Ziswiler 	PINCFG(GEN2_I2C_SDA_PT6,       I2C2,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
181*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_CMD_PT7,         SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
182*f38f5f4bSMarcel Ziswiler 	PINCFG(PU0,                    UARTA,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
183*f38f5f4bSMarcel Ziswiler 	PINCFG(PU1,                    UARTA,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
184*f38f5f4bSMarcel Ziswiler 	PINCFG(PU2,                    UARTA,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
185*f38f5f4bSMarcel Ziswiler 	PINCFG(PU3,                    UARTA,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
186*f38f5f4bSMarcel Ziswiler 	PINCFG(PU4,                    GMI,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
187*f38f5f4bSMarcel Ziswiler 	PINCFG(PU5,                    GMI,          DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
188*f38f5f4bSMarcel Ziswiler 	PINCFG(PU6,                    PWM3,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
189*f38f5f4bSMarcel Ziswiler 	PINCFG(PV0,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
190*f38f5f4bSMarcel Ziswiler 	PINCFG(PV1,                    RSVD1,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
191*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_CD_N_PV2,        RSVD3,        UP,     TRISTATE, INPUT,   DEFAULT, DEFAULT),
192*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC1_WP_N_PV3,        SDMMC1,       UP,     TRISTATE, INPUT,   DEFAULT, DEFAULT),
193*f38f5f4bSMarcel Ziswiler 	PINCFG(DDC_SCL_PV4,            RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
194*f38f5f4bSMarcel Ziswiler 	PINCFG(DDC_SDA_PV5,            RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
195*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_W2_AUD_PW2,        SPI2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
196*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_W3_AUD_PW3,        SPI6,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
197*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP_MCLK1_PW4,          EXTPERIPH1,   NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
198*f38f5f4bSMarcel Ziswiler 	PINCFG(CLK2_OUT_PW5,           RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
199*f38f5f4bSMarcel Ziswiler 	PINCFG(UART3_TXD_PW6,          UARTC,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
200*f38f5f4bSMarcel Ziswiler 	PINCFG(UART3_RXD_PW7,          UARTC,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
201*f38f5f4bSMarcel Ziswiler 	PINCFG(DVFS_PWM_PX0,           CLDVFS,       NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
202*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_X1_AUD_PX1,        RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
203*f38f5f4bSMarcel Ziswiler 	PINCFG(DVFS_CLK_PX2,           CLDVFS,       NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
204*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_X3_AUD_PX3,        RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
205*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_X4_AUD_PX4,        SPI2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
206*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_X5_AUD_PX5,        SPI2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
207*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_X6_AUD_PX6,        SPI2,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
208*f38f5f4bSMarcel Ziswiler 	PINCFG(GPIO_X7_AUD_PX7,        SPI2,         NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
209*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_CLK_PY0,           SPI1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
210*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_DIR_PY1,           SPI1,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
211*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_NXT_PY2,           SPI1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
212*f38f5f4bSMarcel Ziswiler 	PINCFG(ULPI_STP_PY3,           SPI1,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
213*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC1_DAT3_PY4,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
214*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC1_DAT2_PY5,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
215*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC1_DAT1_PY6,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
216*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC1_DAT0_PY7,        SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
217*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC1_CLK_PZ0,         SDMMC1,       NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
218*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC1_CMD_PZ1,         SDMMC1,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
219*f38f5f4bSMarcel Ziswiler 	PINCFG(PWR_I2C_SCL_PZ6,        I2CPWR,       NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
220*f38f5f4bSMarcel Ziswiler 	PINCFG(PWR_I2C_SDA_PZ7,        I2CPWR,       NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
221*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT0_PAA0,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
222*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT1_PAA1,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
223*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT2_PAA2,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
224*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT3_PAA3,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
225*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT4_PAA4,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
226*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT5_PAA5,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
227*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT6_PAA6,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
228*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_DAT7_PAA7,       SDMMC4,       UP,     NORMAL,   INPUT,   DEFAULT, DEFAULT),
229*f38f5f4bSMarcel Ziswiler 	PINCFG(PBB0,                   VGP6,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
230*f38f5f4bSMarcel Ziswiler 	PINCFG(CAM_I2C_SCL_PBB1,       I2C3,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
231*f38f5f4bSMarcel Ziswiler 	PINCFG(CAM_I2C_SDA_PBB2,       I2C3,         NORMAL, NORMAL,   INPUT,   ENABLE,  DEFAULT),
232*f38f5f4bSMarcel Ziswiler 	PINCFG(PBB3,                   VGP3,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
233*f38f5f4bSMarcel Ziswiler 	PINCFG(PBB4,                   VGP4,         NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
234*f38f5f4bSMarcel Ziswiler 	PINCFG(PBB5,                   VGP5,         NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
235*f38f5f4bSMarcel Ziswiler 	PINCFG(PBB6,                   RSVD2,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
236*f38f5f4bSMarcel Ziswiler 	PINCFG(PBB7,                   RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
237*f38f5f4bSMarcel Ziswiler 	PINCFG(CAM_MCLK_PCC0,          VI_ALT3,      NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
238*f38f5f4bSMarcel Ziswiler 	PINCFG(PCC1,                   RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
239*f38f5f4bSMarcel Ziswiler 	PINCFG(PCC2,                   RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
240*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC4_CLK_PCC4,        SDMMC4,       NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
241*f38f5f4bSMarcel Ziswiler 	PINCFG(CLK2_REQ_PCC5,          RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
242*f38f5f4bSMarcel Ziswiler 	PINCFG(PEX_L0_RST_N_PDD1,      RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
243*f38f5f4bSMarcel Ziswiler 	PINCFG(PEX_L0_CLKREQ_N_PDD2,   RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
244*f38f5f4bSMarcel Ziswiler 	PINCFG(PEX_WAKE_N_PDD3,        RSVD2,        NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
245*f38f5f4bSMarcel Ziswiler 	PINCFG(PEX_L1_RST_N_PDD5,      RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
246*f38f5f4bSMarcel Ziswiler 	PINCFG(PEX_L1_CLKREQ_N_PDD6,   RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
247*f38f5f4bSMarcel Ziswiler 	PINCFG(CLK3_OUT_PEE0,          EXTPERIPH3,   NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
248*f38f5f4bSMarcel Ziswiler 	PINCFG(CLK3_REQ_PEE1,          RSVD2,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
249*f38f5f4bSMarcel Ziswiler 	PINCFG(DAP_MCLK1_REQ_PEE2,     RSVD4,        DOWN,   TRISTATE, OUTPUT,  DEFAULT, DEFAULT),
250*f38f5f4bSMarcel Ziswiler 	PINCFG(HDMI_CEC_PEE3,          CEC,          NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
251*f38f5f4bSMarcel Ziswiler 	/*
252*f38f5f4bSMarcel Ziswiler 	 * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not
253*f38f5f4bSMarcel Ziswiler 	 * tristated and input driver enabled as well as it features some magic
254*f38f5f4bSMarcel Ziswiler 	 * properties even though the external loopback is disabled and the internal
255*f38f5f4bSMarcel Ziswiler 	 * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
256*f38f5f4bSMarcel Ziswiler 	 * being set to 0xfffd according to the TRM!
257*f38f5f4bSMarcel Ziswiler 	 */
258*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3,       NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
259*f38f5f4bSMarcel Ziswiler 	PINCFG(SDMMC3_CLK_LB_IN_PEE5,  RSVD2,        NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
260*f38f5f4bSMarcel Ziswiler 	PINCFG(DP_HPD_PFF0,            DP,           NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
261*f38f5f4bSMarcel Ziswiler 	PINCFG(USB_VBUS_EN2_PFF1,      RSVD2,        NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
262*f38f5f4bSMarcel Ziswiler 	PINCFG(PFF2,                   RSVD2,        NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
263*f38f5f4bSMarcel Ziswiler 	PINCFG(CORE_PWR_REQ,           PWRON,        NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
264*f38f5f4bSMarcel Ziswiler 	PINCFG(CPU_PWR_REQ,            CPU,          NORMAL, NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
265*f38f5f4bSMarcel Ziswiler 	PINCFG(PWR_INT_N,              PMI,          UP,     TRISTATE, INPUT,   DEFAULT, DEFAULT),
266*f38f5f4bSMarcel Ziswiler 	PINCFG(RESET_OUT_N,            RESET_OUT_N,  NORMAL, NORMAL,   INPUT,   DEFAULT, DEFAULT),
267*f38f5f4bSMarcel Ziswiler 	PINCFG(OWR,                    RSVD2,        NORMAL, TRISTATE, OUTPUT,  DEFAULT, NORMAL),
268*f38f5f4bSMarcel Ziswiler 	PINCFG(CLK_32K_IN,             CLK,          NORMAL, TRISTATE, INPUT,   DEFAULT, DEFAULT),
269*f38f5f4bSMarcel Ziswiler 	PINCFG(JTAG_RTCK,              RTCK,         UP,     NORMAL,   OUTPUT,  DEFAULT, DEFAULT),
270*f38f5f4bSMarcel Ziswiler };
271*f38f5f4bSMarcel Ziswiler 
272*f38f5f4bSMarcel Ziswiler #define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
273*f38f5f4bSMarcel Ziswiler 	{						\
274*f38f5f4bSMarcel Ziswiler 		.drvgrp = PMUX_DRVGRP_##_drvgrp,	\
275*f38f5f4bSMarcel Ziswiler 		.slwf   = _slwf,			\
276*f38f5f4bSMarcel Ziswiler 		.slwr   = _slwr,			\
277*f38f5f4bSMarcel Ziswiler 		.drvup  = _drvup,			\
278*f38f5f4bSMarcel Ziswiler 		.drvdn  = _drvdn,			\
279*f38f5f4bSMarcel Ziswiler 		.lpmd   = PMUX_LPMD_##_lpmd,		\
280*f38f5f4bSMarcel Ziswiler 		.schmt  = PMUX_SCHMT_##_schmt,		\
281*f38f5f4bSMarcel Ziswiler 		.hsm    = PMUX_HSM_##_hsm,		\
282*f38f5f4bSMarcel Ziswiler 	}
283*f38f5f4bSMarcel Ziswiler 
284*f38f5f4bSMarcel Ziswiler static const struct pmux_drvgrp_config apalis_tk1_drvgrps[] = {
285*f38f5f4bSMarcel Ziswiler };
286*f38f5f4bSMarcel Ziswiler 
287*f38f5f4bSMarcel Ziswiler #endif /* PINMUX_CONFIG_APALIS_TK1_H */
288