1*2d48caa4SMike Looijmans /* 2*2d48caa4SMike Looijmans * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved. 3*2d48caa4SMike Looijmans * (c) Copyright 2016 Topic Embedded Products. 4*2d48caa4SMike Looijmans * 5*2d48caa4SMike Looijmans * SPDX-License-Identifier: GPL-2.0+ 6*2d48caa4SMike Looijmans */ 7*2d48caa4SMike Looijmans 8*2d48caa4SMike Looijmans #define OPCODE_EXIT 0U 9*2d48caa4SMike Looijmans #define OPCODE_MASKWRITE 0U 10*2d48caa4SMike Looijmans #define OPCODE_MASKPOLL 1U 11*2d48caa4SMike Looijmans #define OPCODE_MASKDELAY 2U 12*2d48caa4SMike Looijmans #define OPCODE_ADDRESS_MASK (~3U) 13*2d48caa4SMike Looijmans 14*2d48caa4SMike Looijmans /* Sentinel */ 15*2d48caa4SMike Looijmans #define EMIT_EXIT() OPCODE_EXIT 16*2d48caa4SMike Looijmans /* Opcode is in lower 2 bits of address, address is always 4-byte aligned */ 17*2d48caa4SMike Looijmans #define EMIT_MASKWRITE(addr, mask, val) OPCODE_MASKWRITE | addr, mask, val 18*2d48caa4SMike Looijmans #define EMIT_MASKPOLL(addr, mask) OPCODE_MASKPOLL | addr, mask 19*2d48caa4SMike Looijmans #define EMIT_MASKDELAY(addr, mask) OPCODE_MASKDELAY | addr, mask 20*2d48caa4SMike Looijmans 21*2d48caa4SMike Looijmans /* Returns codes of ps7_init* */ 22*2d48caa4SMike Looijmans #define PS7_INIT_SUCCESS (0) 23*2d48caa4SMike Looijmans #define PS7_INIT_CORRUPT (1) 24*2d48caa4SMike Looijmans #define PS7_INIT_TIMEOUT (2) 25*2d48caa4SMike Looijmans #define PS7_POLL_FAILED_DDR_INIT (3) 26*2d48caa4SMike Looijmans #define PS7_POLL_FAILED_DMA (4) 27*2d48caa4SMike Looijmans #define PS7_POLL_FAILED_PLL (5) 28*2d48caa4SMike Looijmans 29*2d48caa4SMike Looijmans /* Called by spl.c */ 30*2d48caa4SMike Looijmans int ps7_init(void); 31*2d48caa4SMike Looijmans int ps7_post_config(void); 32*2d48caa4SMike Looijmans 33*2d48caa4SMike Looijmans /* Defined in ps7_init_common.c */ 34*2d48caa4SMike Looijmans int ps7_config(unsigned long *ps7_config_init); 35