12c2a9f3aSSRICHARAN R /* 22c2a9f3aSSRICHARAN R * (C) Copyright 2010 32c2a9f3aSSRICHARAN R * Texas Instruments Incorporated, <www.ti.com> 42c2a9f3aSSRICHARAN R * 52c2a9f3aSSRICHARAN R * Sricharan R <r.sricharan@ti.com> 62c2a9f3aSSRICHARAN R * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 82c2a9f3aSSRICHARAN R */ 92c2a9f3aSSRICHARAN R #ifndef _EVM5430_MUX_DATA_H 102c2a9f3aSSRICHARAN R #define _EVM5430_MUX_DATA_H 112c2a9f3aSSRICHARAN R 122c2a9f3aSSRICHARAN R #include <asm/arch/mux_omap5.h> 132c2a9f3aSSRICHARAN R 142c2a9f3aSSRICHARAN R const struct pad_conf_entry core_padconf_array_essential[] = { 152c2a9f3aSSRICHARAN R 162c2a9f3aSSRICHARAN R {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */ 172c2a9f3aSSRICHARAN R {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */ 182c2a9f3aSSRICHARAN R {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */ 192c2a9f3aSSRICHARAN R {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */ 202c2a9f3aSSRICHARAN R {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */ 212c2a9f3aSSRICHARAN R {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */ 222c2a9f3aSSRICHARAN R {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */ 232c2a9f3aSSRICHARAN R {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */ 242c2a9f3aSSRICHARAN R {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */ 252c2a9f3aSSRICHARAN R {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */ 262c2a9f3aSSRICHARAN R {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */ 272c2a9f3aSSRICHARAN R {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */ 282c2a9f3aSSRICHARAN R {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0*/ 292c2a9f3aSSRICHARAN R {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1*/ 302c2a9f3aSSRICHARAN R {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2*/ 312c2a9f3aSSRICHARAN R {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3*/ 322c2a9f3aSSRICHARAN R {UART3_RX_IRRX, (PTU | IEN | M0)}, /* UART3_RX_IRRX */ 332c2a9f3aSSRICHARAN R {UART3_TX_IRTX, (M0)}, /* UART3_TX_IRTX */ 342c2a9f3aSSRICHARAN R {USBB1_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB1_HSIC_STROBE */ 352c2a9f3aSSRICHARAN R {USBB1_HSIC_DATA, (PTU | IEN | M0)}, /* USBB1_HSIC_DATA */ 362c2a9f3aSSRICHARAN R {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */ 372c2a9f3aSSRICHARAN R {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */ 382c2a9f3aSSRICHARAN R {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE*/ 392c2a9f3aSSRICHARAN R {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */ 402c2a9f3aSSRICHARAN R {USBD0_HS_DP, (IEN | M0)}, /* USBD0_HS_DP */ 412c2a9f3aSSRICHARAN R {USBD0_HS_DM, (IEN | M0)}, /* USBD0_HS_DM */ 422c2a9f3aSSRICHARAN R {USBD0_SS_RX, (IEN | M0)}, /* USBD0_SS_RX */ 43fdce7b63SDan Murphy {I2C5_SCL, (IEN | M0)}, /* I2C5_SCL */ 44fdce7b63SDan Murphy {I2C5_SDA, (IEN | M0)}, /* I2C5_SDA */ 45*5e5cfaf9SDan Murphy {HSI2_ACWAKE, (PTU | M6)}, /* HSI2_ACWAKE */ 46*5e5cfaf9SDan Murphy {HSI2_CAFLAG, (PTU | M6)}, /* HSI2_CAFLAG */ 472c2a9f3aSSRICHARAN R }; 482c2a9f3aSSRICHARAN R 492c2a9f3aSSRICHARAN R const struct pad_conf_entry wkup_padconf_array_essential[] = { 502c2a9f3aSSRICHARAN R 512c2a9f3aSSRICHARAN R {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */ 522c2a9f3aSSRICHARAN R {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */ 532c2a9f3aSSRICHARAN R {SYS_32K, (IEN | M0)}, /* SYS_32K */ 54*5e5cfaf9SDan Murphy {FREF_CLK1_OUT, (PTD | IEN | M0)}, /* FREF_CLK1_OUT */ 552c2a9f3aSSRICHARAN R 562c2a9f3aSSRICHARAN R }; 572c2a9f3aSSRICHARAN R 582c2a9f3aSSRICHARAN R #endif /* _EVM4430_MUX_DATA_H */ 59