1687054a7SLokesh Vutla /* 2687054a7SLokesh Vutla * (C) Copyright 2013 3687054a7SLokesh Vutla * Texas Instruments Incorporated, <www.ti.com> 4687054a7SLokesh Vutla * 5687054a7SLokesh Vutla * Sricharan R <r.sricharan@ti.com> 6687054a7SLokesh Vutla * Nishant Kamat <nskamat@ti.com> 7687054a7SLokesh Vutla * 81a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 9687054a7SLokesh Vutla */ 10687054a7SLokesh Vutla #ifndef _MUX_DATA_DRA7XX_H_ 11687054a7SLokesh Vutla #define _MUX_DATA_DRA7XX_H_ 12687054a7SLokesh Vutla 13687054a7SLokesh Vutla #include <asm/arch/mux_dra7xx.h> 14687054a7SLokesh Vutla 158cac1471SNishanth Menon const struct pad_conf_entry dra72x_core_padconf_array_common[] = { 1626eccf31SLokesh Vutla {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ 1726eccf31SLokesh Vutla {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ 1826eccf31SLokesh Vutla {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ 1926eccf31SLokesh Vutla {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ 2026eccf31SLokesh Vutla {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ 2126eccf31SLokesh Vutla {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ 2226eccf31SLokesh Vutla {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ 2326eccf31SLokesh Vutla {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ 2426eccf31SLokesh Vutla {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ 2526eccf31SLokesh Vutla {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ 2626eccf31SLokesh Vutla {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ 2726eccf31SLokesh Vutla {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ 2826eccf31SLokesh Vutla {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ 2926eccf31SLokesh Vutla {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ 3026eccf31SLokesh Vutla {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ 3126eccf31SLokesh Vutla {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ 3226eccf31SLokesh Vutla {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ 3326eccf31SLokesh Vutla {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ 3426eccf31SLokesh Vutla {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ 3526eccf31SLokesh Vutla {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ 3626eccf31SLokesh Vutla {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ 3726eccf31SLokesh Vutla {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ 3826eccf31SLokesh Vutla {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ 3926eccf31SLokesh Vutla {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ 4026eccf31SLokesh Vutla {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ 4126eccf31SLokesh Vutla {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ 4226eccf31SLokesh Vutla {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ 4326eccf31SLokesh Vutla {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */ 4426eccf31SLokesh Vutla {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 4526eccf31SLokesh Vutla {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 4626eccf31SLokesh Vutla {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 4726eccf31SLokesh Vutla {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 4826eccf31SLokesh Vutla {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 4926eccf31SLokesh Vutla {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 5026eccf31SLokesh Vutla {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 5126eccf31SLokesh Vutla {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 5226eccf31SLokesh Vutla {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 5326eccf31SLokesh Vutla {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 5426eccf31SLokesh Vutla {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 5526eccf31SLokesh Vutla {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 5626eccf31SLokesh Vutla {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 5726eccf31SLokesh Vutla {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 5826eccf31SLokesh Vutla {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 5926eccf31SLokesh Vutla {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 6026eccf31SLokesh Vutla {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 6126eccf31SLokesh Vutla {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ 6226eccf31SLokesh Vutla {VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_clk0.vin2a_clk0 */ 6326eccf31SLokesh Vutla {VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_hsync0.vin2a_hsync0 */ 6426eccf31SLokesh Vutla {VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_vsync0.vin2a_vsync0 */ 6526eccf31SLokesh Vutla {VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d0.vin2a_d0 */ 6626eccf31SLokesh Vutla {VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d1.vin2a_d1 */ 6726eccf31SLokesh Vutla {VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d2.vin2a_d2 */ 6826eccf31SLokesh Vutla {VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d3.vin2a_d3 */ 6926eccf31SLokesh Vutla {VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d4.vin2a_d4 */ 7026eccf31SLokesh Vutla {VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d5.vin2a_d5 */ 7126eccf31SLokesh Vutla {VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d6.vin2a_d6 */ 7226eccf31SLokesh Vutla {VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d7.vin2a_d7 */ 7326eccf31SLokesh Vutla {VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d8.vin2a_d8 */ 7426eccf31SLokesh Vutla {VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d9.vin2a_d9 */ 7526eccf31SLokesh Vutla {VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d10.vin2a_d10 */ 7626eccf31SLokesh Vutla {VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d11.vin2a_d11 */ 7726eccf31SLokesh Vutla {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ 7826eccf31SLokesh Vutla {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ 7926eccf31SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 8026eccf31SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ 8126eccf31SLokesh Vutla {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ 8226eccf31SLokesh Vutla {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ 8326eccf31SLokesh Vutla {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ 8426eccf31SLokesh Vutla {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ 8526eccf31SLokesh Vutla {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ 8626eccf31SLokesh Vutla {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ 8726eccf31SLokesh Vutla {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ 8826eccf31SLokesh Vutla {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ 8926eccf31SLokesh Vutla {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ 9026eccf31SLokesh Vutla {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ 9126eccf31SLokesh Vutla {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ 9226eccf31SLokesh Vutla {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ 9326eccf31SLokesh Vutla {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ 9426eccf31SLokesh Vutla {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ 9526eccf31SLokesh Vutla {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ 9626eccf31SLokesh Vutla {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ 9726eccf31SLokesh Vutla {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ 9826eccf31SLokesh Vutla {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ 9926eccf31SLokesh Vutla {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ 10026eccf31SLokesh Vutla {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ 10126eccf31SLokesh Vutla {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ 10226eccf31SLokesh Vutla {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ 10326eccf31SLokesh Vutla {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ 10426eccf31SLokesh Vutla {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ 10526eccf31SLokesh Vutla {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 10626eccf31SLokesh Vutla {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ 10726eccf31SLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ 10826eccf31SLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ 10926eccf31SLokesh Vutla {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ 11026eccf31SLokesh Vutla {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ 11126eccf31SLokesh Vutla {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 11226eccf31SLokesh Vutla {MCASP1_AXR0, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr0.i2c5_sda */ 11326eccf31SLokesh Vutla {MCASP1_AXR1, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.i2c5_scl */ 11426eccf31SLokesh Vutla {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 11526eccf31SLokesh Vutla {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 11626eccf31SLokesh Vutla {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 11726eccf31SLokesh Vutla {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 11826eccf31SLokesh Vutla {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 11926eccf31SLokesh Vutla {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 12026eccf31SLokesh Vutla {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 12126eccf31SLokesh Vutla {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ 12226eccf31SLokesh Vutla {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 12326eccf31SLokesh Vutla {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 12426eccf31SLokesh Vutla {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */ 12526eccf31SLokesh Vutla {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 12626eccf31SLokesh Vutla {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 12726eccf31SLokesh Vutla {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 12826eccf31SLokesh Vutla {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ 12926eccf31SLokesh Vutla {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 13026eccf31SLokesh Vutla {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 13126eccf31SLokesh Vutla {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 13226eccf31SLokesh Vutla {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 13326eccf31SLokesh Vutla {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 13426eccf31SLokesh Vutla {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 13526eccf31SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ 13626eccf31SLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ 13726eccf31SLokesh Vutla {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ 13826eccf31SLokesh Vutla {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ 13926eccf31SLokesh Vutla {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ 14026eccf31SLokesh Vutla {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ 14126eccf31SLokesh Vutla {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 14226eccf31SLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ 14326eccf31SLokesh Vutla {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 14426eccf31SLokesh Vutla {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ 14526eccf31SLokesh Vutla {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ 14626eccf31SLokesh Vutla {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ 14726eccf31SLokesh Vutla {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ 14826eccf31SLokesh Vutla {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 14926eccf31SLokesh Vutla {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ 15026eccf31SLokesh Vutla {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 15126eccf31SLokesh Vutla {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 15226eccf31SLokesh Vutla {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ 15326eccf31SLokesh Vutla {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ 15426eccf31SLokesh Vutla {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rxd.mmc4_dat0 */ 15526eccf31SLokesh Vutla {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ 15626eccf31SLokesh Vutla {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ 15726eccf31SLokesh Vutla {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ 15826eccf31SLokesh Vutla {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ 15926eccf31SLokesh Vutla {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ 16026eccf31SLokesh Vutla {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */ 16126eccf31SLokesh Vutla {WAKEUP3, (M1 | PULL_ENA | PULL_UP)}, /* Wakeup3.sys_nirq1 */ 162687054a7SLokesh Vutla }; 16327d170afSNishanth Menon 1648cac1471SNishanth Menon const struct pad_conf_entry dra72x_rgmii_padconf_array_revb[] = { 1658cac1471SNishanth Menon {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ 1668cac1471SNishanth Menon {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 1678cac1471SNishanth Menon {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 1688cac1471SNishanth Menon {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 1698cac1471SNishanth Menon {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 1708cac1471SNishanth Menon {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 1718cac1471SNishanth Menon {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 1728cac1471SNishanth Menon {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 1738cac1471SNishanth Menon {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 1748cac1471SNishanth Menon {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 1758cac1471SNishanth Menon {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 1768cac1471SNishanth Menon {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 1778cac1471SNishanth Menon {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 1788cac1471SNishanth Menon {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d0.rgmii1_txc */ 1798cac1471SNishanth Menon {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d1.rgmii1_txctl */ 1808cac1471SNishanth Menon {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d2.rgmii1_txd3 */ 1818cac1471SNishanth Menon {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d3.rgmii1_txd2 */ 1828cac1471SNishanth Menon {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d4.rgmii1_txd1 */ 1838cac1471SNishanth Menon {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d5.rgmii1_txd0 */ 1848cac1471SNishanth Menon {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d6.rgmii1_rxc */ 1858cac1471SNishanth Menon {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d7.rgmii1_rxctl */ 1868cac1471SNishanth Menon {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d8.rgmii1_rxd3 */ 1878cac1471SNishanth Menon {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d9.rgmii1_rxd2 */ 1888cac1471SNishanth Menon {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d10.rgmii1_rxd1 */ 1898cac1471SNishanth Menon {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d11.rgmii1_rxd0 */ 1908cac1471SNishanth Menon {XREF_CLK1, (M5 | PIN_OUTPUT)}, /* xref_clk1.atl_clk1 */ 1918cac1471SNishanth Menon {XREF_CLK2, (M5 | PIN_OUTPUT)}, /* xref_clk2.atl_clk2 */ 1928cac1471SNishanth Menon }; 1938cac1471SNishanth Menon 1948cac1471SNishanth Menon const struct pad_conf_entry dra72x_rgmii_padconf_array_revc[] = { 1958cac1471SNishanth Menon {VIN2A_FLD0, (M14 | PIN_INPUT)}, /* vin2a_fld0.gpio3_30 */ 196*4596cf98SNishanth Menon {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 197*4596cf98SNishanth Menon {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 198*4596cf98SNishanth Menon {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 199*4596cf98SNishanth Menon {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 200*4596cf98SNishanth Menon {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 201*4596cf98SNishanth Menon {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 202*4596cf98SNishanth Menon {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 203*4596cf98SNishanth Menon {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 204*4596cf98SNishanth Menon {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 205*4596cf98SNishanth Menon {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 206*4596cf98SNishanth Menon {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 207*4596cf98SNishanth Menon {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 208*4596cf98SNishanth Menon {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 209*4596cf98SNishanth Menon {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 210*4596cf98SNishanth Menon {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 211*4596cf98SNishanth Menon {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 212*4596cf98SNishanth Menon {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 213*4596cf98SNishanth Menon {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 214*4596cf98SNishanth Menon {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 215*4596cf98SNishanth Menon {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 216*4596cf98SNishanth Menon {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 217*4596cf98SNishanth Menon {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 218*4596cf98SNishanth Menon {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 219*4596cf98SNishanth Menon {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 2208cac1471SNishanth Menon {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */ 2218cac1471SNishanth Menon }; 2228cac1471SNishanth Menon 2234d748048SLokesh Vutla const struct pad_conf_entry dra71x_core_padconf_array[] = { 2244d748048SLokesh Vutla {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ 2254d748048SLokesh Vutla {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ 2264d748048SLokesh Vutla {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ 2274d748048SLokesh Vutla {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ 2284d748048SLokesh Vutla {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ 2294d748048SLokesh Vutla {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ 2304d748048SLokesh Vutla {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ 2314d748048SLokesh Vutla {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ 2324d748048SLokesh Vutla {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ 2334d748048SLokesh Vutla {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ 2344d748048SLokesh Vutla {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ 2354d748048SLokesh Vutla {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ 2364d748048SLokesh Vutla {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ 2374d748048SLokesh Vutla {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ 2384d748048SLokesh Vutla {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ 2394d748048SLokesh Vutla {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ 2404d748048SLokesh Vutla {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ 2414d748048SLokesh Vutla {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ 2424d748048SLokesh Vutla {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ 2434d748048SLokesh Vutla {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ 2444d748048SLokesh Vutla {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ 2454d748048SLokesh Vutla {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ 2464d748048SLokesh Vutla {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ 2474d748048SLokesh Vutla {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ 2484d748048SLokesh Vutla {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ 2494d748048SLokesh Vutla {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ 2504d748048SLokesh Vutla {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ 2514d748048SLokesh Vutla {GPMC_A11, (M14 | PIN_INPUT)}, /* gpmc_a11.gpio2_1 */ 2524d748048SLokesh Vutla {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 2534d748048SLokesh Vutla {GPMC_A14, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 2544d748048SLokesh Vutla {GPMC_A15, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 2554d748048SLokesh Vutla {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 2564d748048SLokesh Vutla {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 2574d748048SLokesh Vutla {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 2584d748048SLokesh Vutla {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 2594d748048SLokesh Vutla {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 2604d748048SLokesh Vutla {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 2614d748048SLokesh Vutla {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 2624d748048SLokesh Vutla {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 2634d748048SLokesh Vutla {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 2644d748048SLokesh Vutla {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 2654d748048SLokesh Vutla {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 2664d748048SLokesh Vutla {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 2674d748048SLokesh Vutla {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 2684d748048SLokesh Vutla {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 2694d748048SLokesh Vutla {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ 2704d748048SLokesh Vutla {VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_clk0.vin2a_clk0 */ 2714d748048SLokesh Vutla {VIN2A_FLD0, (M14 | PIN_INPUT)}, /* vin2a_fld0.gpio3_30 */ 2724d748048SLokesh Vutla {VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_hsync0.vin2a_hsync0 */ 2734d748048SLokesh Vutla {VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_vsync0.vin2a_vsync0 */ 2744d748048SLokesh Vutla {VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d0.vin2a_d0 */ 2754d748048SLokesh Vutla {VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d1.vin2a_d1 */ 2764d748048SLokesh Vutla {VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d2.vin2a_d2 */ 2774d748048SLokesh Vutla {VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d3.vin2a_d3 */ 2784d748048SLokesh Vutla {VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d4.vin2a_d4 */ 2794d748048SLokesh Vutla {VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d5.vin2a_d5 */ 2804d748048SLokesh Vutla {VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d6.vin2a_d6 */ 2814d748048SLokesh Vutla {VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d7.vin2a_d7 */ 2824d748048SLokesh Vutla {VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d8.vin2a_d8 */ 2834d748048SLokesh Vutla {VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d9.vin2a_d9 */ 2844d748048SLokesh Vutla {VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d10.vin2a_d10 */ 2854d748048SLokesh Vutla {VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d11.vin2a_d11 */ 2864d748048SLokesh Vutla {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 2874d748048SLokesh Vutla {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 2884d748048SLokesh Vutla {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 2894d748048SLokesh Vutla {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 2904d748048SLokesh Vutla {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 2914d748048SLokesh Vutla {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 2924d748048SLokesh Vutla {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 2934d748048SLokesh Vutla {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 2944d748048SLokesh Vutla {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 2954d748048SLokesh Vutla {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 2964d748048SLokesh Vutla {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 2974d748048SLokesh Vutla {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 2984d748048SLokesh Vutla {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* N/A.N/A */ 2994d748048SLokesh Vutla {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* N/A.N/A */ 3004d748048SLokesh Vutla {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* N/A.N/A */ 3014d748048SLokesh Vutla {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 3024d748048SLokesh Vutla {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ 3034d748048SLokesh Vutla {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 3044d748048SLokesh Vutla {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 3054d748048SLokesh Vutla {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 3064d748048SLokesh Vutla {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 3074d748048SLokesh Vutla {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 3084d748048SLokesh Vutla {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 3094d748048SLokesh Vutla {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 3104d748048SLokesh Vutla {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 3114d748048SLokesh Vutla {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 3124d748048SLokesh Vutla {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 3134d748048SLokesh Vutla {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 3144d748048SLokesh Vutla {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 3154d748048SLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ 3164d748048SLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ 3174d748048SLokesh Vutla {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ 3184d748048SLokesh Vutla {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ 3194d748048SLokesh Vutla {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 3204d748048SLokesh Vutla {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */ 3214d748048SLokesh Vutla {MCASP1_ACLKX, (M14 | PIN_INPUT)}, /* mcasp1_aclkx.gpio7_31 */ 3224d748048SLokesh Vutla {MCASP1_FSX, (M14 | 0x000d0000)}, /* mcasp1_fsx.gpio7_30 */ 3234d748048SLokesh Vutla {MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.i2c5_sda */ 3244d748048SLokesh Vutla {MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.i2c5_scl */ 3254d748048SLokesh Vutla {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 3264d748048SLokesh Vutla {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 3274d748048SLokesh Vutla {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 3284d748048SLokesh Vutla {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 3294d748048SLokesh Vutla {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 3304d748048SLokesh Vutla {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 3314d748048SLokesh Vutla {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 3324d748048SLokesh Vutla {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ 3334d748048SLokesh Vutla {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 3344d748048SLokesh Vutla {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 3354d748048SLokesh Vutla {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 3364d748048SLokesh Vutla {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 3374d748048SLokesh Vutla {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 3384d748048SLokesh Vutla {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ 3394d748048SLokesh Vutla {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 3404d748048SLokesh Vutla {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 3414d748048SLokesh Vutla {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 3424d748048SLokesh Vutla {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 3434d748048SLokesh Vutla {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 3444d748048SLokesh Vutla {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 3454d748048SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 3464d748048SLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ 3474d748048SLokesh Vutla {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ 3484d748048SLokesh Vutla {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ 3494d748048SLokesh Vutla {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ 3504d748048SLokesh Vutla {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ 3514d748048SLokesh Vutla {SPI1_CS1, (M14 | PIN_INPUT_PULLUP)}, /* spi1_cs1.gpio7_11 */ 3524d748048SLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ 3534d748048SLokesh Vutla {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 3544d748048SLokesh Vutla {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ 3554d748048SLokesh Vutla {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ 3564d748048SLokesh Vutla {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ 3574d748048SLokesh Vutla {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ 3584d748048SLokesh Vutla {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 3594d748048SLokesh Vutla {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ 3604d748048SLokesh Vutla {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 3614d748048SLokesh Vutla {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 3624d748048SLokesh Vutla {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ 3634d748048SLokesh Vutla {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ 3644d748048SLokesh Vutla {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rxd.mmc4_dat0 */ 3654d748048SLokesh Vutla {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ 3664d748048SLokesh Vutla {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ 3674d748048SLokesh Vutla {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ 3684d748048SLokesh Vutla {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ 3694d748048SLokesh Vutla {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ 3704d748048SLokesh Vutla {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */ 3714d748048SLokesh Vutla {WAKEUP3, (M1 | PULL_ENA | PULL_UP)}, /* Wakeup3.sys_nirq1 */ 3724d748048SLokesh Vutla }; 3734d748048SLokesh Vutla 37427d170afSNishanth Menon const struct pad_conf_entry early_padconf[] = { 37527d170afSNishanth Menon #if (CONFIG_CONS_INDEX == 1) 37627d170afSNishanth Menon {UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */ 37727d170afSNishanth Menon {UART1_TXD, (PIN_INPUT_SLEW | M0)}, /* UART1_TXD */ 37827d170afSNishanth Menon #elif (CONFIG_CONS_INDEX == 3) 37927d170afSNishanth Menon {UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */ 38027d170afSNishanth Menon {UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */ 38127d170afSNishanth Menon #endif 38227d170afSNishanth Menon {I2C1_SDA, (PIN_INPUT | M0)}, /* I2C1_SDA */ 38327d170afSNishanth Menon {I2C1_SCL, (PIN_INPUT | M0)}, /* I2C1_SCL */ 38427d170afSNishanth Menon }; 38527d170afSNishanth Menon 38627d170afSNishanth Menon #ifdef CONFIG_IODELAY_RECALIBRATION 3878cac1471SNishanth Menon const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revb[] = { 3880a888f58SMugunthan V N {0x6F0, 359, 0}, /* RGMMI0_RXC_IN */ 3890a888f58SMugunthan V N {0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */ 3900a888f58SMugunthan V N {0x708, 80, 1391}, /* RGMMI0_RXD0_IN */ 3910a888f58SMugunthan V N {0x714, 196, 1522}, /* RGMMI0_RXD1_IN */ 3920a888f58SMugunthan V N {0x720, 40, 1860}, /* RGMMI0_RXD2_IN */ 3930a888f58SMugunthan V N {0x72C, 0, 1956}, /* RGMMI0_RXD3_IN */ 3940a888f58SMugunthan V N {0x740, 0, 220}, /* RGMMI0_TXC_OUT */ 3950a888f58SMugunthan V N {0x74C, 1820, 180}, /* RGMMI0_TXCTL_OUT */ 3960a888f58SMugunthan V N {0x758, 1740, 440}, /* RGMMI0_TXD0_OUT */ 3970a888f58SMugunthan V N {0x764, 1740, 240}, /* RGMMI0_TXD1_OUT */ 3980a888f58SMugunthan V N {0x770, 1680, 380}, /* RGMMI0_TXD2_OUT */ 3990a888f58SMugunthan V N {0x77C, 1740, 440}, /* RGMMI0_TXD3_OUT */ 4000a888f58SMugunthan V N /* These values are for using RGMII1 configuration on VIN2a_x pins. */ 4010a888f58SMugunthan V N {0xAB0, 596, 0}, /* CFG_VIN2A_D18_IN */ 4020a888f58SMugunthan V N {0xABC, 314, 980}, /* CFG_VIN2A_D19_IN */ 4030a888f58SMugunthan V N {0xAD4, 241, 1536}, /* CFG_VIN2A_D20_IN */ 4040a888f58SMugunthan V N {0xAE0, 103, 1689}, /* CFG_VIN2A_D21_IN */ 4050a888f58SMugunthan V N {0xAEC, 161, 1563}, /* CFG_VIN2A_D22_IN */ 4060a888f58SMugunthan V N {0xAF8, 0, 1613}, /* CFG_VIN2A_D23_IN */ 4070a888f58SMugunthan V N {0xA70, 0, 200}, /* CFG_VIN2A_D12_OUT */ 4080a888f58SMugunthan V N {0xA7C, 1560, 140}, /* CFG_VIN2A_D13_OUT */ 4090a888f58SMugunthan V N {0xA88, 1700, 0}, /* CFG_VIN2A_D14_OUT */ 4100a888f58SMugunthan V N {0xA94, 1260, 0}, /* CFG_VIN2A_D15_OUT */ 4110a888f58SMugunthan V N {0xAA0, 1400, 0}, /* CFG_VIN2A_D16_OUT */ 4120a888f58SMugunthan V N {0xAAC, 1290, 0}, /* CFG_VIN2A_D17_OUT */ 41326eccf31SLokesh Vutla {0x144, 0, 0}, /* CFG_GPMC_A13_IN */ 41426eccf31SLokesh Vutla {0x150, 2062, 2277}, /* CFG_GPMC_A14_IN */ 41526eccf31SLokesh Vutla {0x15C, 1960, 2289}, /* CFG_GPMC_A15_IN */ 41626eccf31SLokesh Vutla {0x168, 2058, 2386}, /* CFG_GPMC_A16_IN */ 41726eccf31SLokesh Vutla {0x170, 0, 0 }, /* CFG_GPMC_A16_OUT */ 41826eccf31SLokesh Vutla {0x174, 2062, 2350}, /* CFG_GPMC_A17_IN */ 41926eccf31SLokesh Vutla {0x188, 0, 0}, /* CFG_GPMC_A18_OUT */ 42026eccf31SLokesh Vutla {0x374, 121, 0}, /* CFG_GPMC_CS2_OUT */ 42127d170afSNishanth Menon }; 4228cac1471SNishanth Menon 4238cac1471SNishanth Menon const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revc[] = { 4248cac1471SNishanth Menon {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 4258cac1471SNishanth Menon {0x0150, 2247, 1186}, /* CFG_GPMC_A14_IN */ 4268cac1471SNishanth Menon {0x015C, 2176, 1197}, /* CFG_GPMC_A15_IN */ 4278cac1471SNishanth Menon {0x0168, 2229, 1268}, /* CFG_GPMC_A16_IN */ 4288cac1471SNishanth Menon {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 4298cac1471SNishanth Menon {0x0174, 2251, 1217}, /* CFG_GPMC_A17_IN */ 4308cac1471SNishanth Menon {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */ 431*4596cf98SNishanth Menon {0x0374, 121, 0}, /* CFG_GPMC_CS2_OUT */ 432*4596cf98SNishanth Menon {0x06F0, 413, 0}, /* CFG_RGMII0_RXC_IN */ 433*4596cf98SNishanth Menon {0x06FC, 27, 2296}, /* CFG_RGMII0_RXCTL_IN */ 434*4596cf98SNishanth Menon {0x0708, 3, 1721}, /* CFG_RGMII0_RXD0_IN */ 435*4596cf98SNishanth Menon {0x0714, 134, 1786}, /* CFG_RGMII0_RXD1_IN */ 436*4596cf98SNishanth Menon {0x0720, 40, 1966}, /* CFG_RGMII0_RXD2_IN */ 437*4596cf98SNishanth Menon {0x072C, 0, 2057}, /* CFG_RGMII0_RXD3_IN */ 438*4596cf98SNishanth Menon {0x0740, 0, 60}, /* CFG_RGMII0_TXC_OUT */ 439*4596cf98SNishanth Menon {0x074C, 0, 60}, /* CFG_RGMII0_TXCTL_OUT */ 440*4596cf98SNishanth Menon {0x0758, 0, 60}, /* CFG_RGMII0_TXD0_OUT */ 441*4596cf98SNishanth Menon {0x0764, 0, 0}, /* CFG_RGMII0_TXD1_OUT */ 442*4596cf98SNishanth Menon {0x0770, 0, 60}, /* CFG_RGMII0_TXD2_OUT */ 443*4596cf98SNishanth Menon {0x077C, 0, 120}, /* CFG_RGMII0_TXD3_OUT */ 444*4596cf98SNishanth Menon {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 445*4596cf98SNishanth Menon {0x0A7C, 170, 0}, /* CFG_VIN2A_D13_OUT */ 446*4596cf98SNishanth Menon {0x0A88, 150, 0}, /* CFG_VIN2A_D14_OUT */ 447*4596cf98SNishanth Menon {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 448*4596cf98SNishanth Menon {0x0AA0, 60, 0}, /* CFG_VIN2A_D16_OUT */ 449*4596cf98SNishanth Menon {0x0AAC, 60, 0}, /* CFG_VIN2A_D17_OUT */ 450*4596cf98SNishanth Menon {0x0AB0, 530, 0}, /* CFG_VIN2A_D18_IN */ 451*4596cf98SNishanth Menon {0x0ABC, 71, 1099}, /* CFG_VIN2A_D19_IN */ 452*4596cf98SNishanth Menon {0x0AC8, 2229, 10}, /* CFG_VIN2A_D1_IN */ 453*4596cf98SNishanth Menon {0x0AD4, 142, 1337}, /* CFG_VIN2A_D20_IN */ 454*4596cf98SNishanth Menon {0x0AE0, 114, 1517}, /* CFG_VIN2A_D21_IN */ 455*4596cf98SNishanth Menon {0x0AEC, 171, 1331}, /* CFG_VIN2A_D22_IN */ 456*4596cf98SNishanth Menon {0x0AF8, 0, 1328}, /* CFG_VIN2A_D23_IN */ 4578cac1471SNishanth Menon }; 4588cac1471SNishanth Menon 4594d748048SLokesh Vutla const struct iodelay_cfg_entry dra71_iodelay_cfg_array[] = { 4604d748048SLokesh Vutla {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 4614d748048SLokesh Vutla {0x0150, 2247, 1186}, /* CFG_GPMC_A14_IN */ 4624d748048SLokesh Vutla {0x015C, 2176, 1197}, /* CFG_GPMC_A15_IN */ 4634d748048SLokesh Vutla {0x0168, 2229, 1268}, /* CFG_GPMC_A16_IN */ 4644d748048SLokesh Vutla {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 4654d748048SLokesh Vutla {0x0174, 2251, 1217}, /* CFG_GPMC_A17_IN */ 4664d748048SLokesh Vutla {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */ 4674d748048SLokesh Vutla {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 4684d748048SLokesh Vutla {0x06F0, 413, 0}, /* CFG_RGMII0_RXC_IN */ 4694d748048SLokesh Vutla {0x06FC, 27, 2296}, /* CFG_RGMII0_RXCTL_IN */ 4704d748048SLokesh Vutla {0x0708, 3, 1721}, /* CFG_RGMII0_RXD0_IN */ 4714d748048SLokesh Vutla {0x0714, 134, 1786}, /* CFG_RGMII0_RXD1_IN */ 4724d748048SLokesh Vutla {0x0720, 40, 1966}, /* CFG_RGMII0_RXD2_IN */ 4734d748048SLokesh Vutla {0x072C, 0, 2057}, /* CFG_RGMII0_RXD3_IN */ 4744d748048SLokesh Vutla {0x0740, 0, 60}, /* CFG_RGMII0_TXC_OUT */ 4754d748048SLokesh Vutla {0x074C, 0, 60}, /* CFG_RGMII0_TXCTL_OUT */ 4764d748048SLokesh Vutla {0x0758, 0, 60}, /* CFG_RGMII0_TXD0_OUT */ 4774d748048SLokesh Vutla {0x0764, 0, 0}, /* CFG_RGMII0_TXD1_OUT */ 4784d748048SLokesh Vutla {0x0770, 0, 60}, /* CFG_RGMII0_TXD2_OUT */ 4794d748048SLokesh Vutla {0x077C, 0, 120}, /* CFG_RGMII0_TXD3_OUT */ 4804d748048SLokesh Vutla {0x0A38, 0, 0}, /* CFG_VIN2A_CLK0_IN */ 4814d748048SLokesh Vutla {0x0A44, 1936, 0}, /* CFG_VIN2A_D0_IN */ 4824d748048SLokesh Vutla {0x0A50, 2031, 0}, /* CFG_VIN2A_D10_IN */ 4834d748048SLokesh Vutla {0x0A5C, 1702, 0}, /* CFG_VIN2A_D11_IN */ 4844d748048SLokesh Vutla {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 4854d748048SLokesh Vutla {0x0A7C, 170, 0}, /* CFG_VIN2A_D13_OUT */ 4864d748048SLokesh Vutla {0x0A88, 150, 0}, /* CFG_VIN2A_D14_OUT */ 4874d748048SLokesh Vutla {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 4884d748048SLokesh Vutla {0x0AA0, 60, 0}, /* CFG_VIN2A_D16_OUT */ 4894d748048SLokesh Vutla {0x0AAC, 60, 0}, /* CFG_VIN2A_D17_OUT */ 4904d748048SLokesh Vutla {0x0AB0, 530, 0}, /* CFG_VIN2A_D18_IN */ 4914d748048SLokesh Vutla {0x0ABC, 71, 1099}, /* CFG_VIN2A_D19_IN */ 4924d748048SLokesh Vutla {0x0AC8, 2229, 10}, /* CFG_VIN2A_D1_IN */ 4934d748048SLokesh Vutla {0x0AD4, 142, 1337}, /* CFG_VIN2A_D20_IN */ 4944d748048SLokesh Vutla {0x0AE0, 114, 1517}, /* CFG_VIN2A_D21_IN */ 4954d748048SLokesh Vutla {0x0AEC, 171, 1331}, /* CFG_VIN2A_D22_IN */ 4964d748048SLokesh Vutla {0x0AF8, 0, 1328}, /* CFG_VIN2A_D23_IN */ 4974d748048SLokesh Vutla {0x0B04, 1736, 0}, /* CFG_VIN2A_D2_IN */ 4984d748048SLokesh Vutla {0x0B10, 1943, 0}, /* CFG_VIN2A_D3_IN */ 4994d748048SLokesh Vutla {0x0B1C, 1601, 0}, /* CFG_VIN2A_D4_IN */ 5004d748048SLokesh Vutla {0x0B28, 2052, 0}, /* CFG_VIN2A_D5_IN */ 5014d748048SLokesh Vutla {0x0B34, 1571, 0}, /* CFG_VIN2A_D6_IN */ 5024d748048SLokesh Vutla {0x0B40, 1855, 0}, /* CFG_VIN2A_D7_IN */ 5034d748048SLokesh Vutla {0x0B4C, 1224, 618}, /* CFG_VIN2A_D8_IN */ 5044d748048SLokesh Vutla {0x0B58, 1373, 509}, /* CFG_VIN2A_D9_IN */ 5054d748048SLokesh Vutla {0x0B7C, 1943, 0}, /* CFG_VIN2A_HSYNC0_IN */ 5064d748048SLokesh Vutla {0x0B88, 1612, 0}, /* CFG_VIN2A_VSYNC0_IN */ 5074d748048SLokesh Vutla }; 50827d170afSNishanth Menon #endif 50927d170afSNishanth Menon 51027d170afSNishanth Menon const struct pad_conf_entry dra74x_core_padconf_array[] = { 51127d170afSNishanth Menon {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ 51227d170afSNishanth Menon {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ 51327d170afSNishanth Menon {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ 51427d170afSNishanth Menon {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ 51527d170afSNishanth Menon {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ 51627d170afSNishanth Menon {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ 51727d170afSNishanth Menon {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ 51827d170afSNishanth Menon {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ 51927d170afSNishanth Menon {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ 52027d170afSNishanth Menon {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ 52127d170afSNishanth Menon {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ 52227d170afSNishanth Menon {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ 52327d170afSNishanth Menon {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ 52427d170afSNishanth Menon {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ 52527d170afSNishanth Menon {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ 52627d170afSNishanth Menon {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ 52727d170afSNishanth Menon {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ 52827d170afSNishanth Menon {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ 52927d170afSNishanth Menon {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ 53027d170afSNishanth Menon {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ 53127d170afSNishanth Menon {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ 53227d170afSNishanth Menon {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ 53327d170afSNishanth Menon {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ 53427d170afSNishanth Menon {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ 53527d170afSNishanth Menon {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ 53627d170afSNishanth Menon {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ 53727d170afSNishanth Menon {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ 53827d170afSNishanth Menon {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */ 539900e2104SVignesh R {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 540900e2104SVignesh R {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 541900e2104SVignesh R {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 542900e2104SVignesh R {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 543900e2104SVignesh R {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 544900e2104SVignesh R {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 54527d170afSNishanth Menon {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 54627d170afSNishanth Menon {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 54727d170afSNishanth Menon {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 54827d170afSNishanth Menon {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 54927d170afSNishanth Menon {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 55027d170afSNishanth Menon {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 55127d170afSNishanth Menon {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 55227d170afSNishanth Menon {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 55327d170afSNishanth Menon {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 55427d170afSNishanth Menon {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 555900e2104SVignesh R {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 55627d170afSNishanth Menon {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ 55727d170afSNishanth Menon {VIN1A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_clk0.vin1a_clk0 */ 55827d170afSNishanth Menon {VIN1A_DE0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_de0.vin1a_de0 */ 55927d170afSNishanth Menon {VIN1A_FLD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_fld0.vin1a_fld0 */ 56027d170afSNishanth Menon {VIN1A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_hsync0.vin1a_hsync0 */ 56127d170afSNishanth Menon {VIN1A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_vsync0.vin1a_vsync0 */ 56227d170afSNishanth Menon {VIN1A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d0.vin1a_d0 */ 56327d170afSNishanth Menon {VIN1A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d1.vin1a_d1 */ 56427d170afSNishanth Menon {VIN1A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d2.vin1a_d2 */ 56527d170afSNishanth Menon {VIN1A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d3.vin1a_d3 */ 56627d170afSNishanth Menon {VIN1A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d4.vin1a_d4 */ 56727d170afSNishanth Menon {VIN1A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d5.vin1a_d5 */ 56827d170afSNishanth Menon {VIN1A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d6.vin1a_d6 */ 56927d170afSNishanth Menon {VIN1A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d7.vin1a_d7 */ 57027d170afSNishanth Menon {VIN1A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d8.vin1a_d8 */ 57127d170afSNishanth Menon {VIN1A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d9.vin1a_d9 */ 57227d170afSNishanth Menon {VIN1A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d10.vin1a_d10 */ 57327d170afSNishanth Menon {VIN1A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d11.vin1a_d11 */ 57427d170afSNishanth Menon {VIN1A_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d12.vin1a_d12 */ 57527d170afSNishanth Menon {VIN1A_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d13.vin1a_d13 */ 57627d170afSNishanth Menon {VIN1A_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d14.vin1a_d14 */ 57727d170afSNishanth Menon {VIN1A_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d15.vin1a_d15 */ 57827d170afSNishanth Menon {VIN1A_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d16.vin1a_d16 */ 57927d170afSNishanth Menon {VIN1A_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d17.vin1a_d17 */ 58027d170afSNishanth Menon {VIN1A_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d18.vin1a_d18 */ 58127d170afSNishanth Menon {VIN1A_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d19.vin1a_d19 */ 58227d170afSNishanth Menon {VIN1A_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d20.vin1a_d20 */ 58327d170afSNishanth Menon {VIN1A_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d21.vin1a_d21 */ 58427d170afSNishanth Menon {VIN1A_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d22.vin1a_d22 */ 58527d170afSNishanth Menon {VIN1A_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d23.vin1a_d23 */ 58627d170afSNishanth Menon {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 58727d170afSNishanth Menon {VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 58827d170afSNishanth Menon {VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 58927d170afSNishanth Menon {VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 59027d170afSNishanth Menon {VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 59127d170afSNishanth Menon {VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 59227d170afSNishanth Menon {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 59327d170afSNishanth Menon {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 59427d170afSNishanth Menon {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 59527d170afSNishanth Menon {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 59627d170afSNishanth Menon {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 59727d170afSNishanth Menon {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 59827d170afSNishanth Menon {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ 59927d170afSNishanth Menon {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ 60027d170afSNishanth Menon {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ 60127d170afSNishanth Menon {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ 60227d170afSNishanth Menon {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ 60327d170afSNishanth Menon {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ 60427d170afSNishanth Menon {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ 60527d170afSNishanth Menon {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ 60627d170afSNishanth Menon {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ 60727d170afSNishanth Menon {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ 60827d170afSNishanth Menon {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ 60927d170afSNishanth Menon {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ 61027d170afSNishanth Menon {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ 61127d170afSNishanth Menon {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ 61227d170afSNishanth Menon {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ 61327d170afSNishanth Menon {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ 61427d170afSNishanth Menon {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ 61527d170afSNishanth Menon {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ 61627d170afSNishanth Menon {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ 61727d170afSNishanth Menon {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ 61827d170afSNishanth Menon {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ 61927d170afSNishanth Menon {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ 62027d170afSNishanth Menon {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ 62127d170afSNishanth Menon {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ 62227d170afSNishanth Menon {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ 62327d170afSNishanth Menon {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ 62427d170afSNishanth Menon {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ 62527d170afSNishanth Menon {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ 62627d170afSNishanth Menon {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 62727d170afSNishanth Menon {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ 62827d170afSNishanth Menon {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 62927d170afSNishanth Menon {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 63027d170afSNishanth Menon {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 63127d170afSNishanth Menon {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 63227d170afSNishanth Menon {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 63327d170afSNishanth Menon {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 63427d170afSNishanth Menon {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 63527d170afSNishanth Menon {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 63627d170afSNishanth Menon {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 63727d170afSNishanth Menon {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 63827d170afSNishanth Menon {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 63927d170afSNishanth Menon {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 64027d170afSNishanth Menon {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ 64127d170afSNishanth Menon {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ 64227d170afSNishanth Menon {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ 64327d170afSNishanth Menon {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ 64427d170afSNishanth Menon {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 64527d170afSNishanth Menon {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */ 64627d170afSNishanth Menon {MCASP1_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.mcasp1_aclkx */ 64727d170afSNishanth Menon {MCASP1_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.mcasp1_fsx */ 64827d170afSNishanth Menon {MCASP1_AXR0, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE15)}, /* mcasp1_axr0.mcasp1_axr0 */ 64927d170afSNishanth Menon {MCASP1_AXR1, (M0 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.mcasp1_axr1 */ 65027d170afSNishanth Menon {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 65127d170afSNishanth Menon {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 65227d170afSNishanth Menon {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 65327d170afSNishanth Menon {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 65427d170afSNishanth Menon {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 65527d170afSNishanth Menon {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 65627d170afSNishanth Menon {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 65727d170afSNishanth Menon {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ 65827d170afSNishanth Menon {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 65927d170afSNishanth Menon {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 66027d170afSNishanth Menon {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */ 66127d170afSNishanth Menon {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 66227d170afSNishanth Menon {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 66327d170afSNishanth Menon {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 66427d170afSNishanth Menon {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ 66527d170afSNishanth Menon {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 66627d170afSNishanth Menon {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 66727d170afSNishanth Menon {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 66827d170afSNishanth Menon {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 66927d170afSNishanth Menon {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 67027d170afSNishanth Menon {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 67126eccf31SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ 67227d170afSNishanth Menon {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ 67327d170afSNishanth Menon {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ 67427d170afSNishanth Menon {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ 67527d170afSNishanth Menon {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ 67627d170afSNishanth Menon {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ 67727d170afSNishanth Menon {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ 67827d170afSNishanth Menon {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 67927d170afSNishanth Menon {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ 68027d170afSNishanth Menon {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 68127d170afSNishanth Menon {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ 68227d170afSNishanth Menon {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ 68327d170afSNishanth Menon {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ 68427d170afSNishanth Menon {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ 685a5878f19SRoger Quadros {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 68627d170afSNishanth Menon {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ 68727d170afSNishanth Menon {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 68827d170afSNishanth Menon {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 68927d170afSNishanth Menon {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ 69027d170afSNishanth Menon {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ 69127d170afSNishanth Menon {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* N/A.mmc4_dat0 */ 69227d170afSNishanth Menon {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ 69327d170afSNishanth Menon {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ 69427d170afSNishanth Menon {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ 69527d170afSNishanth Menon {I2C2_SDA, (M0 | PIN_INPUT_PULLUP)}, /* i2c2_sda.i2c2_sda */ 69627d170afSNishanth Menon {I2C2_SCL, (M0 | PIN_INPUT_PULLUP)}, /* i2c2_scl.i2c2_scl */ 697a5878f19SRoger Quadros {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */ 698bc622966SCooper Jr., Franklin {WAKEUP2, (M14)}, /* Wakeup2.gpio1_2 */ 69927d170afSNishanth Menon }; 70027d170afSNishanth Menon 70127d170afSNishanth Menon #ifdef CONFIG_IODELAY_RECALIBRATION 70203589234SNishanth Menon const struct iodelay_cfg_entry dra742_es1_1_iodelay_cfg_array[] = { 70327d170afSNishanth Menon {0x06F0, 480, 0}, /* CFG_RGMII0_RXC_IN */ 70427d170afSNishanth Menon {0x06FC, 111, 1641}, /* CFG_RGMII0_RXCTL_IN */ 70527d170afSNishanth Menon {0x0708, 272, 1116}, /* CFG_RGMII0_RXD0_IN */ 70627d170afSNishanth Menon {0x0714, 243, 1260}, /* CFG_RGMII0_RXD1_IN */ 70727d170afSNishanth Menon {0x0720, 0, 1614}, /* CFG_RGMII0_RXD2_IN */ 70827d170afSNishanth Menon {0x072C, 105, 1673}, /* CFG_RGMII0_RXD3_IN */ 70927d170afSNishanth Menon {0x0740, 0, 0}, /* CFG_RGMII0_TXC_OUT */ 71027d170afSNishanth Menon {0x074C, 1560, 120}, /* CFG_RGMII0_TXCTL_OUT */ 71127d170afSNishanth Menon {0x0758, 1570, 120}, /* CFG_RGMII0_TXD0_OUT */ 71227d170afSNishanth Menon {0x0764, 1500, 120}, /* CFG_RGMII0_TXD1_OUT */ 71327d170afSNishanth Menon {0x0770, 1775, 120}, /* CFG_RGMII0_TXD2_OUT */ 71427d170afSNishanth Menon {0x077C, 1875, 120}, /* CFG_RGMII0_TXD3_OUT */ 71527d170afSNishanth Menon {0x08D0, 0, 0}, /* CFG_VIN1A_CLK0_IN */ 71627d170afSNishanth Menon {0x08DC, 2600, 0}, /* CFG_VIN1A_D0_IN */ 71727d170afSNishanth Menon {0x08E8, 2652, 46}, /* CFG_VIN1A_D10_IN */ 71827d170afSNishanth Menon {0x08F4, 2541, 0}, /* CFG_VIN1A_D11_IN */ 71927d170afSNishanth Menon {0x0900, 2603, 574}, /* CFG_VIN1A_D12_IN */ 72027d170afSNishanth Menon {0x090C, 2548, 443}, /* CFG_VIN1A_D13_IN */ 72127d170afSNishanth Menon {0x0918, 2624, 598}, /* CFG_VIN1A_D14_IN */ 72227d170afSNishanth Menon {0x0924, 2535, 1027}, /* CFG_VIN1A_D15_IN */ 72327d170afSNishanth Menon {0x0930, 2526, 818}, /* CFG_VIN1A_D16_IN */ 72427d170afSNishanth Menon {0x093C, 2623, 797}, /* CFG_VIN1A_D17_IN */ 72527d170afSNishanth Menon {0x0948, 2578, 888}, /* CFG_VIN1A_D18_IN */ 72627d170afSNishanth Menon {0x0954, 2574, 1008}, /* CFG_VIN1A_D19_IN */ 72727d170afSNishanth Menon {0x0960, 2527, 123}, /* CFG_VIN1A_D1_IN */ 72827d170afSNishanth Menon {0x096C, 2577, 737}, /* CFG_VIN1A_D20_IN */ 72927d170afSNishanth Menon {0x0978, 2627, 616}, /* CFG_VIN1A_D21_IN */ 73027d170afSNishanth Menon {0x0984, 2573, 777}, /* CFG_VIN1A_D22_IN */ 73127d170afSNishanth Menon {0x0990, 2730, 67}, /* CFG_VIN1A_D23_IN */ 73227d170afSNishanth Menon {0x099C, 2509, 303}, /* CFG_VIN1A_D2_IN */ 73327d170afSNishanth Menon {0x09A8, 2494, 267}, /* CFG_VIN1A_D3_IN */ 73427d170afSNishanth Menon {0x09B4, 2474, 0}, /* CFG_VIN1A_D4_IN */ 73527d170afSNishanth Menon {0x09C0, 2556, 181}, /* CFG_VIN1A_D5_IN */ 73627d170afSNishanth Menon {0x09CC, 2516, 195}, /* CFG_VIN1A_D6_IN */ 73727d170afSNishanth Menon {0x09D8, 2589, 210}, /* CFG_VIN1A_D7_IN */ 73827d170afSNishanth Menon {0x09E4, 2624, 75}, /* CFG_VIN1A_D8_IN */ 73927d170afSNishanth Menon {0x09F0, 2704, 14}, /* CFG_VIN1A_D9_IN */ 74027d170afSNishanth Menon {0x09FC, 2469, 55}, /* CFG_VIN1A_DE0_IN */ 74127d170afSNishanth Menon {0x0A08, 2557, 264}, /* CFG_VIN1A_FLD0_IN */ 74227d170afSNishanth Menon {0x0A14, 2465, 269}, /* CFG_VIN1A_HSYNC0_IN */ 74327d170afSNishanth Menon {0x0A20, 2411, 348}, /* CFG_VIN1A_VSYNC0_IN */ 74427d170afSNishanth Menon {0x0A70, 150, 0}, /* CFG_VIN2A_D12_OUT */ 74527d170afSNishanth Menon {0x0A7C, 1500, 0}, /* CFG_VIN2A_D13_OUT */ 74627d170afSNishanth Menon {0x0A88, 1600, 0}, /* CFG_VIN2A_D14_OUT */ 74727d170afSNishanth Menon {0x0A94, 900, 0}, /* CFG_VIN2A_D15_OUT */ 74827d170afSNishanth Menon {0x0AA0, 680, 0}, /* CFG_VIN2A_D16_OUT */ 74927d170afSNishanth Menon {0x0AAC, 500, 0}, /* CFG_VIN2A_D17_OUT */ 75027d170afSNishanth Menon {0x0AB0, 702, 0}, /* CFG_VIN2A_D18_IN */ 75127d170afSNishanth Menon {0x0ABC, 136, 976}, /* CFG_VIN2A_D19_IN */ 75227d170afSNishanth Menon {0x0AD4, 210, 1357}, /* CFG_VIN2A_D20_IN */ 75327d170afSNishanth Menon {0x0AE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ 75427d170afSNishanth Menon {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ 75527d170afSNishanth Menon {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ 756900e2104SVignesh R {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 757900e2104SVignesh R {0x0150, 1976, 1389}, /* CFG_GPMC_A14_IN */ 758900e2104SVignesh R {0x015C, 1872, 1408}, /* CFG_GPMC_A15_IN */ 759900e2104SVignesh R {0x0168, 1914, 1506}, /* CFG_GPMC_A16_IN */ 760900e2104SVignesh R {0x0170, 57, 0}, /* CFG_GPMC_A16_OUT */ 761900e2104SVignesh R {0x0174, 1904, 1471}, /* CFG_GPMC_A17_IN */ 762900e2104SVignesh R {0x0188, 1690, 0}, /* CFG_GPMC_A18_OUT */ 763900e2104SVignesh R {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 76427d170afSNishanth Menon }; 76503589234SNishanth Menon 76603589234SNishanth Menon const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = { 76703589234SNishanth Menon {0x06F0, 471, 0}, /* CFG_RGMII0_RXC_IN */ 76803589234SNishanth Menon {0x06FC, 30, 1919}, /* CFG_RGMII0_RXCTL_IN */ 76903589234SNishanth Menon {0x0708, 74, 1688}, /* CFG_RGMII0_RXD0_IN */ 77003589234SNishanth Menon {0x0714, 94, 1697}, /* CFG_RGMII0_RXD1_IN */ 77103589234SNishanth Menon {0x0720, 0, 1703}, /* CFG_RGMII0_RXD2_IN */ 77203589234SNishanth Menon {0x072C, 70, 1804}, /* CFG_RGMII0_RXD3_IN */ 77303589234SNishanth Menon {0x0740, 70, 70}, /* CFG_RGMII0_TXC_OUT */ 77403589234SNishanth Menon {0x074C, 35, 70}, /* CFG_RGMII0_TXCTL_OUT */ 77503589234SNishanth Menon {0x0758, 100, 130}, /* CFG_RGMII0_TXD0_OUT */ 77603589234SNishanth Menon {0x0764, 0, 70}, /* CFG_RGMII0_TXD1_OUT */ 77703589234SNishanth Menon {0x0770, 0, 0}, /* CFG_RGMII0_TXD2_OUT */ 77803589234SNishanth Menon {0x077C, 100, 130}, /* CFG_RGMII0_TXD3_OUT */ 77903589234SNishanth Menon {0x08D0, 0, 0}, /* CFG_VIN1A_CLK0_IN */ 78003589234SNishanth Menon {0x08DC, 2105, 619}, /* CFG_VIN1A_D0_IN */ 78103589234SNishanth Menon {0x08E8, 2107, 739}, /* CFG_VIN1A_D10_IN */ 78203589234SNishanth Menon {0x08F4, 2005, 788}, /* CFG_VIN1A_D11_IN */ 78303589234SNishanth Menon {0x0900, 2059, 1297}, /* CFG_VIN1A_D12_IN */ 78403589234SNishanth Menon {0x090C, 2027, 1141}, /* CFG_VIN1A_D13_IN */ 78503589234SNishanth Menon {0x0918, 2071, 1332}, /* CFG_VIN1A_D14_IN */ 78603589234SNishanth Menon {0x0924, 1995, 1764}, /* CFG_VIN1A_D15_IN */ 78703589234SNishanth Menon {0x0930, 1999, 1542}, /* CFG_VIN1A_D16_IN */ 78803589234SNishanth Menon {0x093C, 2072, 1540}, /* CFG_VIN1A_D17_IN */ 78903589234SNishanth Menon {0x0948, 2034, 1629}, /* CFG_VIN1A_D18_IN */ 79003589234SNishanth Menon {0x0954, 2026, 1761}, /* CFG_VIN1A_D19_IN */ 79103589234SNishanth Menon {0x0960, 2017, 757}, /* CFG_VIN1A_D1_IN */ 79203589234SNishanth Menon {0x096C, 2037, 1469}, /* CFG_VIN1A_D20_IN */ 79303589234SNishanth Menon {0x0978, 2077, 1349}, /* CFG_VIN1A_D21_IN */ 79403589234SNishanth Menon {0x0984, 2022, 1545}, /* CFG_VIN1A_D22_IN */ 79503589234SNishanth Menon {0x0990, 2168, 784}, /* CFG_VIN1A_D23_IN */ 79603589234SNishanth Menon {0x099C, 1996, 962}, /* CFG_VIN1A_D2_IN */ 79703589234SNishanth Menon {0x09A8, 1993, 901}, /* CFG_VIN1A_D3_IN */ 79803589234SNishanth Menon {0x09B4, 2098, 499}, /* CFG_VIN1A_D4_IN */ 79903589234SNishanth Menon {0x09C0, 2038, 844}, /* CFG_VIN1A_D5_IN */ 80003589234SNishanth Menon {0x09CC, 2002, 863}, /* CFG_VIN1A_D6_IN */ 80103589234SNishanth Menon {0x09D8, 2063, 873}, /* CFG_VIN1A_D7_IN */ 80203589234SNishanth Menon {0x09E4, 2088, 759}, /* CFG_VIN1A_D8_IN */ 80303589234SNishanth Menon {0x09F0, 2152, 701}, /* CFG_VIN1A_D9_IN */ 80403589234SNishanth Menon {0x09FC, 1926, 728}, /* CFG_VIN1A_DE0_IN */ 80503589234SNishanth Menon {0x0A08, 2043, 937}, /* CFG_VIN1A_FLD0_IN */ 80603589234SNishanth Menon {0x0A14, 1978, 909}, /* CFG_VIN1A_HSYNC0_IN */ 80703589234SNishanth Menon {0x0A20, 1926, 987}, /* CFG_VIN1A_VSYNC0_IN */ 80803589234SNishanth Menon {0x0A70, 140, 0}, /* CFG_VIN2A_D12_OUT */ 80903589234SNishanth Menon {0x0A7C, 90, 70}, /* CFG_VIN2A_D13_OUT */ 81003589234SNishanth Menon {0x0A88, 0, 0}, /* CFG_VIN2A_D14_OUT */ 81103589234SNishanth Menon {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 81203589234SNishanth Menon {0x0AA0, 0, 70}, /* CFG_VIN2A_D16_OUT */ 81303589234SNishanth Menon {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ 81403589234SNishanth Menon {0x0AB0, 612, 0}, /* CFG_VIN2A_D18_IN */ 81503589234SNishanth Menon {0x0ABC, 4, 927}, /* CFG_VIN2A_D19_IN */ 81603589234SNishanth Menon {0x0AD4, 136, 1340}, /* CFG_VIN2A_D20_IN */ 81703589234SNishanth Menon {0x0AE0, 130, 1450}, /* CFG_VIN2A_D21_IN */ 81803589234SNishanth Menon {0x0AEC, 144, 1269}, /* CFG_VIN2A_D22_IN */ 81903589234SNishanth Menon {0x0AF8, 0, 1330}, /* CFG_VIN2A_D23_IN */ 820900e2104SVignesh R {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 821900e2104SVignesh R {0x0150, 2575, 966}, /* CFG_GPMC_A14_IN */ 822900e2104SVignesh R {0x015C, 2503, 889}, /* CFG_GPMC_A15_IN */ 823900e2104SVignesh R {0x0168, 2528, 1007}, /* CFG_GPMC_A16_IN */ 824900e2104SVignesh R {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 825900e2104SVignesh R {0x0174, 2533, 980}, /* CFG_GPMC_A17_IN */ 826900e2104SVignesh R {0x0188, 590, 0}, /* CFG_GPMC_A18_OUT */ 827900e2104SVignesh R {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 82803589234SNishanth Menon }; 82927d170afSNishanth Menon #endif 83027d170afSNishanth Menon 831687054a7SLokesh Vutla #endif /* _MUX_DATA_DRA7XX_H_ */ 832