10a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 20a0e4badSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2004-2008 30a0e4badSJean-Christophe PLAGNIOL-VILLARD * Texas Instruments, <www.ti.com> 40a0e4badSJean-Christophe PLAGNIOL-VILLARD * 50a0e4badSJean-Christophe PLAGNIOL-VILLARD * Author : 60a0e4badSJean-Christophe PLAGNIOL-VILLARD * Sunil Kumar <sunilsaini05@gmail.com> 70a0e4badSJean-Christophe PLAGNIOL-VILLARD * Shashi Ranjan <shashiranjanmca05@gmail.com> 80a0e4badSJean-Christophe PLAGNIOL-VILLARD * 90a0e4badSJean-Christophe PLAGNIOL-VILLARD * Derived from Beagle Board and 3430 SDP code by 100a0e4badSJean-Christophe PLAGNIOL-VILLARD * Richard Woodruff <r-woodruff2@ti.com> 110a0e4badSJean-Christophe PLAGNIOL-VILLARD * Syed Mohammed Khasim <khasim@ti.com> 120a0e4badSJean-Christophe PLAGNIOL-VILLARD * 130a0e4badSJean-Christophe PLAGNIOL-VILLARD * 140a0e4badSJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 150a0e4badSJean-Christophe PLAGNIOL-VILLARD * project. 160a0e4badSJean-Christophe PLAGNIOL-VILLARD * 170a0e4badSJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 180a0e4badSJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 190a0e4badSJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 200a0e4badSJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 210a0e4badSJean-Christophe PLAGNIOL-VILLARD * 220a0e4badSJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 230a0e4badSJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 240a0e4badSJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 250a0e4badSJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 260a0e4badSJean-Christophe PLAGNIOL-VILLARD * 270a0e4badSJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 280a0e4badSJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 290a0e4badSJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 300a0e4badSJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 310a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 320a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 3370d8c944SJason Kridner #ifdef CONFIG_STATUS_LED 3470d8c944SJason Kridner #include <status_led.h> 3570d8c944SJason Kridner #endif 360a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <twl4030.h> 370a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/io.h> 380cd31144SSteve Sakoman #include <asm/arch/mmc_host_def.h> 390a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/mux.h> 400a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/sys_proto.h> 410a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/gpio.h> 420a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/mach-types.h> 43*d90859a6SAlexander Holler #ifdef CONFIG_USB_EHCI 44*d90859a6SAlexander Holler #include <usb.h> 45*d90859a6SAlexander Holler #include <asm/arch/clocks.h> 46*d90859a6SAlexander Holler #include <asm/arch/clocks_omap3.h> 47*d90859a6SAlexander Holler #include <asm/arch/ehci_omap3.h> 48*d90859a6SAlexander Holler /* from drivers/usb/host/ehci-core.h */ 49*d90859a6SAlexander Holler extern struct ehci_hccr *hccr; 50*d90859a6SAlexander Holler extern volatile struct ehci_hcor *hcor; 51*d90859a6SAlexander Holler #endif 520a0e4badSJean-Christophe PLAGNIOL-VILLARD #include "beagle.h" 530a0e4badSJean-Christophe PLAGNIOL-VILLARD 54*d90859a6SAlexander Holler #define pr_debug(fmt, args...) debug(fmt, ##args) 55*d90859a6SAlexander Holler 56ca5f80aeSKoen Kooi #define TWL4030_I2C_BUS 0 57ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_BUS 1 58ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 59ca5f80aeSKoen Kooi 60ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY 0x01000100 61ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY2 0x02000100 62ca5f80aeSKoen Kooi #define TINCANTOOLS_TRAINER 0x04000100 63ca5f80aeSKoen Kooi #define TINCANTOOLS_SHOWDOG 0x03000100 64ca5f80aeSKoen Kooi #define KBADC_BEAGLEFPGA 0x01000600 65ee8485fdSKoen Kooi #define LW_BEAGLETOUCH 0x01000700 66ee8485fdSKoen Kooi #define BRAINMUX_LCDOG 0x01000800 67ee8485fdSKoen Kooi #define BRAINMUX_LCDOGTOUCH 0x02000800 68ee8485fdSKoen Kooi #define BBTOYS_WIFI 0x01000B00 69ee8485fdSKoen Kooi #define BBTOYS_VGA 0x02000B00 70ee8485fdSKoen Kooi #define BBTOYS_LCD 0x03000B00 71ca5f80aeSKoen Kooi #define BEAGLE_NO_EEPROM 0xffffffff 72ca5f80aeSKoen Kooi 7329565326SJohn Rigby DECLARE_GLOBAL_DATA_PTR; 7429565326SJohn Rigby 75ca5f80aeSKoen Kooi static struct { 76ca5f80aeSKoen Kooi unsigned int device_vendor; 77ca5f80aeSKoen Kooi unsigned char revision; 78ca5f80aeSKoen Kooi unsigned char content; 79ca5f80aeSKoen Kooi char fab_revision[8]; 80ca5f80aeSKoen Kooi char env_var[16]; 81ca5f80aeSKoen Kooi char env_setting[64]; 82ca5f80aeSKoen Kooi } expansion_config; 83ca5f80aeSKoen Kooi 840a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 850a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: board_init 860a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Early hardware init. 870a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 880a0e4badSJean-Christophe PLAGNIOL-VILLARD int board_init(void) 890a0e4badSJean-Christophe PLAGNIOL-VILLARD { 900a0e4badSJean-Christophe PLAGNIOL-VILLARD gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 910a0e4badSJean-Christophe PLAGNIOL-VILLARD /* board id for Linux */ 920a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; 930a0e4badSJean-Christophe PLAGNIOL-VILLARD /* boot param addr */ 940a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 950a0e4badSJean-Christophe PLAGNIOL-VILLARD 9670d8c944SJason Kridner #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) 9770d8c944SJason Kridner status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); 9870d8c944SJason Kridner #endif 9970d8c944SJason Kridner 1000a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 1010a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1020a0e4badSJean-Christophe PLAGNIOL-VILLARD 1030a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 10406b95bd5SSteve Sakoman * Routine: get_board_revision 10506b95bd5SSteve Sakoman * Description: Detect if we are running on a Beagle revision Ax/Bx, 10608cbba2aSSteve Sakoman * C1/2/3, C4 or xM. This can be done by reading 10706b95bd5SSteve Sakoman * the level of GPIO173, GPIO172 and GPIO171. This should 10806b95bd5SSteve Sakoman * result in 10906b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx 11006b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 11106b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 11208cbba2aSSteve Sakoman * GPIO173, GPIO172, GPIO171: 0 0 0 => xM 1130a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 11406b95bd5SSteve Sakoman int get_board_revision(void) 1150a0e4badSJean-Christophe PLAGNIOL-VILLARD { 11606b95bd5SSteve Sakoman int revision; 1170a0e4badSJean-Christophe PLAGNIOL-VILLARD 11806b95bd5SSteve Sakoman if (!omap_request_gpio(171) && 11906b95bd5SSteve Sakoman !omap_request_gpio(172) && 12006b95bd5SSteve Sakoman !omap_request_gpio(173)) { 1210a0e4badSJean-Christophe PLAGNIOL-VILLARD 1220a0e4badSJean-Christophe PLAGNIOL-VILLARD omap_set_gpio_direction(171, 1); 12306b95bd5SSteve Sakoman omap_set_gpio_direction(172, 1); 12406b95bd5SSteve Sakoman omap_set_gpio_direction(173, 1); 1250a0e4badSJean-Christophe PLAGNIOL-VILLARD 12606b95bd5SSteve Sakoman revision = omap_get_gpio_datain(173) << 2 | 12706b95bd5SSteve Sakoman omap_get_gpio_datain(172) << 1 | 12806b95bd5SSteve Sakoman omap_get_gpio_datain(171); 12906b95bd5SSteve Sakoman 13006b95bd5SSteve Sakoman omap_free_gpio(171); 13106b95bd5SSteve Sakoman omap_free_gpio(172); 13206b95bd5SSteve Sakoman omap_free_gpio(173); 13306b95bd5SSteve Sakoman } else { 13406b95bd5SSteve Sakoman printf("Error: unable to acquire board revision GPIOs\n"); 13506b95bd5SSteve Sakoman revision = -1; 1360a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1370a0e4badSJean-Christophe PLAGNIOL-VILLARD 13806b95bd5SSteve Sakoman return revision; 1390a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1400a0e4badSJean-Christophe PLAGNIOL-VILLARD 1410a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 142ca5f80aeSKoen Kooi * Routine: get_expansion_id 143ca5f80aeSKoen Kooi * Description: This function checks for expansion board by checking I2C 144ca5f80aeSKoen Kooi * bus 1 for the availability of an AT24C01B serial EEPROM. 145ca5f80aeSKoen Kooi * returns the device_vendor field from the EEPROM 146ca5f80aeSKoen Kooi */ 147ca5f80aeSKoen Kooi unsigned int get_expansion_id(void) 148ca5f80aeSKoen Kooi { 149ca5f80aeSKoen Kooi i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 150ca5f80aeSKoen Kooi 151ca5f80aeSKoen Kooi /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ 152ca5f80aeSKoen Kooi if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 153ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 154ca5f80aeSKoen Kooi return BEAGLE_NO_EEPROM; 155ca5f80aeSKoen Kooi } 156ca5f80aeSKoen Kooi 157ca5f80aeSKoen Kooi /* read configuration data */ 158ca5f80aeSKoen Kooi i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 159ca5f80aeSKoen Kooi sizeof(expansion_config)); 160ca5f80aeSKoen Kooi 161ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 162ca5f80aeSKoen Kooi 163ca5f80aeSKoen Kooi return expansion_config.device_vendor; 164ca5f80aeSKoen Kooi } 165ca5f80aeSKoen Kooi 166ca5f80aeSKoen Kooi /* 1670a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: misc_init_r 1680a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Configure board specific parts 1690a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 1700a0e4badSJean-Christophe PLAGNIOL-VILLARD int misc_init_r(void) 1710a0e4badSJean-Christophe PLAGNIOL-VILLARD { 1720a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; 1730a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; 174d4e53f06SSteve Kipisz struct control_prog_io *prog_io_base = (struct gpio *)OMAP34XX_CTRL_BASE; 175d4e53f06SSteve Kipisz 176d4e53f06SSteve Kipisz /* Enable i2c2 pullup resisters */ 177d4e53f06SSteve Kipisz writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1); 1780a0e4badSJean-Christophe PLAGNIOL-VILLARD 17906b95bd5SSteve Sakoman switch (get_board_revision()) { 18006b95bd5SSteve Sakoman case REVISION_AXBX: 18106b95bd5SSteve Sakoman printf("Beagle Rev Ax/Bx\n"); 18206b95bd5SSteve Sakoman setenv("beaglerev", "AxBx"); 18306b95bd5SSteve Sakoman break; 18406b95bd5SSteve Sakoman case REVISION_CX: 18506b95bd5SSteve Sakoman printf("Beagle Rev C1/C2/C3\n"); 18606b95bd5SSteve Sakoman setenv("beaglerev", "Cx"); 18706b95bd5SSteve Sakoman MUX_BEAGLE_C(); 18806b95bd5SSteve Sakoman break; 18906b95bd5SSteve Sakoman case REVISION_C4: 19006b95bd5SSteve Sakoman printf("Beagle Rev C4\n"); 19108cbba2aSSteve Sakoman setenv("beaglerev", "C4"); 19206b95bd5SSteve Sakoman MUX_BEAGLE_C(); 19306b95bd5SSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 19406b95bd5SSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 19506b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 19606b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 19706b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 19806b95bd5SSteve Sakoman break; 199f6e593bbSKoen Kooi case REVISION_XM_A: 20008cbba2aSSteve Sakoman printf("Beagle xM Rev A\n"); 20108cbba2aSSteve Sakoman setenv("beaglerev", "xMA"); 202f6e593bbSKoen Kooi MUX_BEAGLE_XM(); 203f6e593bbSKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 204f6e593bbSKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 205f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 206f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 207f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 208f6e593bbSKoen Kooi break; 209f6e593bbSKoen Kooi case REVISION_XM_B: 210f6e593bbSKoen Kooi printf("Beagle xM Rev B\n"); 211f6e593bbSKoen Kooi setenv("beaglerev", "xMB"); 21208cbba2aSSteve Sakoman MUX_BEAGLE_XM(); 21308cbba2aSSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 21408cbba2aSSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 21508cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 21608cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 21708cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 21808cbba2aSSteve Sakoman break; 21906b95bd5SSteve Sakoman default: 22006b95bd5SSteve Sakoman printf("Beagle unknown 0x%02x\n", get_board_revision()); 221f6e593bbSKoen Kooi MUX_BEAGLE_XM(); 222f6e593bbSKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 223f6e593bbSKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 224f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 225f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 226f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 22706b95bd5SSteve Sakoman } 22806b95bd5SSteve Sakoman 229ca5f80aeSKoen Kooi switch (get_expansion_id()) { 230ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY: 231ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy board (rev %d %s)\n", 232ca5f80aeSKoen Kooi expansion_config.revision, 233ca5f80aeSKoen Kooi expansion_config.fab_revision); 234ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 235ca5f80aeSKoen Kooi setenv("buddy", "zippy"); 236ca5f80aeSKoen Kooi break; 237ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY2: 238ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", 239ca5f80aeSKoen Kooi expansion_config.revision, 240ca5f80aeSKoen Kooi expansion_config.fab_revision); 241ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 242ca5f80aeSKoen Kooi setenv("buddy", "zippy2"); 243ca5f80aeSKoen Kooi break; 244ca5f80aeSKoen Kooi case TINCANTOOLS_TRAINER: 245ca5f80aeSKoen Kooi printf("Recognized Tincantools Trainer board (rev %d %s)\n", 246ca5f80aeSKoen Kooi expansion_config.revision, 247ca5f80aeSKoen Kooi expansion_config.fab_revision); 248ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 249ca5f80aeSKoen Kooi MUX_TINCANTOOLS_TRAINER(); 250ca5f80aeSKoen Kooi setenv("buddy", "trainer"); 251ca5f80aeSKoen Kooi break; 252ca5f80aeSKoen Kooi case TINCANTOOLS_SHOWDOG: 253ca5f80aeSKoen Kooi printf("Recognized Tincantools Showdow board (rev %d %s)\n", 254ca5f80aeSKoen Kooi expansion_config.revision, 255ca5f80aeSKoen Kooi expansion_config.fab_revision); 256ca5f80aeSKoen Kooi /* Place holder for DSS2 definition for showdog lcd */ 257ca5f80aeSKoen Kooi setenv("defaultdisplay", "showdoglcd"); 258ca5f80aeSKoen Kooi setenv("buddy", "showdog"); 259ca5f80aeSKoen Kooi break; 260ca5f80aeSKoen Kooi case KBADC_BEAGLEFPGA: 261ca5f80aeSKoen Kooi printf("Recognized KBADC Beagle FPGA board\n"); 262ca5f80aeSKoen Kooi MUX_KBADC_BEAGLEFPGA(); 263ca5f80aeSKoen Kooi setenv("buddy", "beaglefpga"); 264ca5f80aeSKoen Kooi break; 265ee8485fdSKoen Kooi case LW_BEAGLETOUCH: 266ee8485fdSKoen Kooi printf("Recognized Liquidware BeagleTouch board\n"); 267ee8485fdSKoen Kooi setenv("buddy", "beagletouch"); 268ee8485fdSKoen Kooi break; 269ee8485fdSKoen Kooi case BRAINMUX_LCDOG: 270ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog board\n"); 271ee8485fdSKoen Kooi setenv("buddy", "lcdog"); 272ee8485fdSKoen Kooi break; 273ee8485fdSKoen Kooi case BRAINMUX_LCDOGTOUCH: 274ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog Touch board\n"); 275ee8485fdSKoen Kooi setenv("buddy", "lcdogtouch"); 276ee8485fdSKoen Kooi break; 277ee8485fdSKoen Kooi case BBTOYS_WIFI: 278ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys WiFi board\n"); 279ee8485fdSKoen Kooi MUX_BBTOYS_WIFI() 280ee8485fdSKoen Kooi setenv("buddy", "bbtoys-wifi"); 281ee8485fdSKoen Kooi break;; 282ee8485fdSKoen Kooi case BBTOYS_VGA: 283ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys VGA board\n"); 284ee8485fdSKoen Kooi break;; 285ee8485fdSKoen Kooi case BBTOYS_LCD: 286ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys LCD board\n"); 287ee8485fdSKoen Kooi break;; 288ca5f80aeSKoen Kooi case BEAGLE_NO_EEPROM: 289ca5f80aeSKoen Kooi printf("No EEPROM on expansion board\n"); 290ca5f80aeSKoen Kooi setenv("buddy", "none"); 291ca5f80aeSKoen Kooi break; 292ca5f80aeSKoen Kooi default: 293ca5f80aeSKoen Kooi printf("Unrecognized expansion board: %x\n", 294ca5f80aeSKoen Kooi expansion_config.device_vendor); 295ca5f80aeSKoen Kooi setenv("buddy", "unknown"); 296ca5f80aeSKoen Kooi } 297ca5f80aeSKoen Kooi 298ca5f80aeSKoen Kooi if (expansion_config.content == 1) 299ca5f80aeSKoen Kooi setenv(expansion_config.env_var, expansion_config.env_setting); 300ca5f80aeSKoen Kooi 3010a0e4badSJean-Christophe PLAGNIOL-VILLARD twl4030_power_init(); 302ead39d7aSGrazvydas Ignotas twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 3030a0e4badSJean-Christophe PLAGNIOL-VILLARD 3040a0e4badSJean-Christophe PLAGNIOL-VILLARD /* Configure GPIOs to output */ 3050a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); 3060a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 3070a0e4badSJean-Christophe PLAGNIOL-VILLARD GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); 3080a0e4badSJean-Christophe PLAGNIOL-VILLARD 3090a0e4badSJean-Christophe PLAGNIOL-VILLARD /* Set GPIOs */ 3100a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, 3110a0e4badSJean-Christophe PLAGNIOL-VILLARD &gpio6_base->setdataout); 3120a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 3130a0e4badSJean-Christophe PLAGNIOL-VILLARD GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); 3140a0e4badSJean-Christophe PLAGNIOL-VILLARD 3150a0e4badSJean-Christophe PLAGNIOL-VILLARD dieid_num_r(); 3160a0e4badSJean-Christophe PLAGNIOL-VILLARD 3170a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 3180a0e4badSJean-Christophe PLAGNIOL-VILLARD } 3190a0e4badSJean-Christophe PLAGNIOL-VILLARD 3200a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 3210a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: set_muxconf_regs 3220a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Setting up the configuration Mux registers specific to the 3230a0e4badSJean-Christophe PLAGNIOL-VILLARD * hardware. Many pins need to be moved from protect to primary 3240a0e4badSJean-Christophe PLAGNIOL-VILLARD * mode. 3250a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 3260a0e4badSJean-Christophe PLAGNIOL-VILLARD void set_muxconf_regs(void) 3270a0e4badSJean-Christophe PLAGNIOL-VILLARD { 3280a0e4badSJean-Christophe PLAGNIOL-VILLARD MUX_BEAGLE(); 3290a0e4badSJean-Christophe PLAGNIOL-VILLARD } 3300cd31144SSteve Sakoman 3310cd31144SSteve Sakoman #ifdef CONFIG_GENERIC_MMC 3320cd31144SSteve Sakoman int board_mmc_init(bd_t *bis) 3330cd31144SSteve Sakoman { 3340cd31144SSteve Sakoman omap_mmc_init(0); 3350cd31144SSteve Sakoman return 0; 3360cd31144SSteve Sakoman } 3370cd31144SSteve Sakoman #endif 338*d90859a6SAlexander Holler 339*d90859a6SAlexander Holler #ifdef CONFIG_USB_EHCI 340*d90859a6SAlexander Holler 341*d90859a6SAlexander Holler #define GPIO_PHY_RESET 147 342*d90859a6SAlexander Holler 343*d90859a6SAlexander Holler /* Reset is needed otherwise the kernel-driver will throw an error. */ 344*d90859a6SAlexander Holler int ehci_hcd_stop(void) 345*d90859a6SAlexander Holler { 346*d90859a6SAlexander Holler pr_debug("Resetting OMAP3 EHCI\n"); 347*d90859a6SAlexander Holler omap_set_gpio_dataout(GPIO_PHY_RESET, 0); 348*d90859a6SAlexander Holler writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG); 349*d90859a6SAlexander Holler return 0; 350*d90859a6SAlexander Holler } 351*d90859a6SAlexander Holler 352*d90859a6SAlexander Holler /* Call usb_stop() before starting the kernel */ 353*d90859a6SAlexander Holler void show_boot_progress(int val) 354*d90859a6SAlexander Holler { 355*d90859a6SAlexander Holler if(val == 15) 356*d90859a6SAlexander Holler usb_stop(); 357*d90859a6SAlexander Holler } 358*d90859a6SAlexander Holler 359*d90859a6SAlexander Holler /* 360*d90859a6SAlexander Holler * Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard. 361*d90859a6SAlexander Holler * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37. 362*d90859a6SAlexander Holler * See there for additional Copyrights. 363*d90859a6SAlexander Holler */ 364*d90859a6SAlexander Holler int ehci_hcd_init(void) 365*d90859a6SAlexander Holler { 366*d90859a6SAlexander Holler pr_debug("Initializing OMAP3 ECHI\n"); 367*d90859a6SAlexander Holler 368*d90859a6SAlexander Holler /* Put the PHY in RESET */ 369*d90859a6SAlexander Holler omap_request_gpio(GPIO_PHY_RESET); 370*d90859a6SAlexander Holler omap_set_gpio_direction(GPIO_PHY_RESET, 0); 371*d90859a6SAlexander Holler omap_set_gpio_dataout(GPIO_PHY_RESET, 0); 372*d90859a6SAlexander Holler 373*d90859a6SAlexander Holler /* Hold the PHY in RESET for enough time till DIR is high */ 374*d90859a6SAlexander Holler /* Refer: ISSUE1 */ 375*d90859a6SAlexander Holler udelay(10); 376*d90859a6SAlexander Holler 377*d90859a6SAlexander Holler struct prcm *prcm_base = (struct prcm *)PRCM_BASE; 378*d90859a6SAlexander Holler /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */ 379*d90859a6SAlexander Holler sr32(&prcm_base->iclken_usbhost, 0, 1, 1); 380*d90859a6SAlexander Holler /* 381*d90859a6SAlexander Holler * Enable USBHOST_48M_FCLK (USBHOST_FCLK1) 382*d90859a6SAlexander Holler * and USBHOST_120M_FCLK (USBHOST_FCLK2) 383*d90859a6SAlexander Holler */ 384*d90859a6SAlexander Holler sr32(&prcm_base->fclken_usbhost, 0, 2, 3); 385*d90859a6SAlexander Holler /* Enable USBTTL_ICLK */ 386*d90859a6SAlexander Holler sr32(&prcm_base->iclken3_core, 2, 1, 1); 387*d90859a6SAlexander Holler /* Enable USBTTL_FCLK */ 388*d90859a6SAlexander Holler sr32(&prcm_base->fclken3_core, 2, 1, 1); 389*d90859a6SAlexander Holler pr_debug("USB clocks enabled\n"); 390*d90859a6SAlexander Holler 391*d90859a6SAlexander Holler /* perform TLL soft reset, and wait until reset is complete */ 392*d90859a6SAlexander Holler writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET, 393*d90859a6SAlexander Holler OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG); 394*d90859a6SAlexander Holler /* Wait for TLL reset to complete */ 395*d90859a6SAlexander Holler while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS) 396*d90859a6SAlexander Holler & OMAP_USBTLL_SYSSTATUS_RESETDONE)); 397*d90859a6SAlexander Holler pr_debug("TLL reset done\n"); 398*d90859a6SAlexander Holler 399*d90859a6SAlexander Holler writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP | 400*d90859a6SAlexander Holler OMAP_USBTLL_SYSCONFIG_SIDLEMODE | 401*d90859a6SAlexander Holler OMAP_USBTLL_SYSCONFIG_CACTIVITY, 402*d90859a6SAlexander Holler OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG); 403*d90859a6SAlexander Holler 404*d90859a6SAlexander Holler /* Put UHH in NoIdle/NoStandby mode */ 405*d90859a6SAlexander Holler writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP 406*d90859a6SAlexander Holler | OMAP_UHH_SYSCONFIG_SIDLEMODE 407*d90859a6SAlexander Holler | OMAP_UHH_SYSCONFIG_CACTIVITY 408*d90859a6SAlexander Holler | OMAP_UHH_SYSCONFIG_MIDLEMODE, 409*d90859a6SAlexander Holler OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG); 410*d90859a6SAlexander Holler 411*d90859a6SAlexander Holler /* setup burst configurations */ 412*d90859a6SAlexander Holler writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN 413*d90859a6SAlexander Holler | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN 414*d90859a6SAlexander Holler | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN, 415*d90859a6SAlexander Holler OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG); 416*d90859a6SAlexander Holler 417*d90859a6SAlexander Holler /* 418*d90859a6SAlexander Holler * Refer ISSUE1: 419*d90859a6SAlexander Holler * Hold the PHY in RESET for enough time till 420*d90859a6SAlexander Holler * PHY is settled and ready 421*d90859a6SAlexander Holler */ 422*d90859a6SAlexander Holler udelay(10); 423*d90859a6SAlexander Holler omap_set_gpio_dataout(GPIO_PHY_RESET, 1); 424*d90859a6SAlexander Holler 425*d90859a6SAlexander Holler hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE); 426*d90859a6SAlexander Holler hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10); 427*d90859a6SAlexander Holler 428*d90859a6SAlexander Holler pr_debug("OMAP3 EHCI init done\n"); 429*d90859a6SAlexander Holler return 0; 430*d90859a6SAlexander Holler } 431*d90859a6SAlexander Holler 432*d90859a6SAlexander Holler #endif /* CONFIG_USB_EHCI */ 433