10a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 20a0e4badSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2004-2008 30a0e4badSJean-Christophe PLAGNIOL-VILLARD * Texas Instruments, <www.ti.com> 40a0e4badSJean-Christophe PLAGNIOL-VILLARD * 50a0e4badSJean-Christophe PLAGNIOL-VILLARD * Author : 60a0e4badSJean-Christophe PLAGNIOL-VILLARD * Sunil Kumar <sunilsaini05@gmail.com> 70a0e4badSJean-Christophe PLAGNIOL-VILLARD * Shashi Ranjan <shashiranjanmca05@gmail.com> 80a0e4badSJean-Christophe PLAGNIOL-VILLARD * 90a0e4badSJean-Christophe PLAGNIOL-VILLARD * Derived from Beagle Board and 3430 SDP code by 100a0e4badSJean-Christophe PLAGNIOL-VILLARD * Richard Woodruff <r-woodruff2@ti.com> 110a0e4badSJean-Christophe PLAGNIOL-VILLARD * Syed Mohammed Khasim <khasim@ti.com> 120a0e4badSJean-Christophe PLAGNIOL-VILLARD * 130a0e4badSJean-Christophe PLAGNIOL-VILLARD * 140a0e4badSJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 150a0e4badSJean-Christophe PLAGNIOL-VILLARD * project. 160a0e4badSJean-Christophe PLAGNIOL-VILLARD * 170a0e4badSJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 180a0e4badSJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 190a0e4badSJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 200a0e4badSJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 210a0e4badSJean-Christophe PLAGNIOL-VILLARD * 220a0e4badSJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 230a0e4badSJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 240a0e4badSJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 250a0e4badSJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 260a0e4badSJean-Christophe PLAGNIOL-VILLARD * 270a0e4badSJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 280a0e4badSJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 290a0e4badSJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 300a0e4badSJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 310a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 320a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 330a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <twl4030.h> 340a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/io.h> 350cd31144SSteve Sakoman #include <asm/arch/mmc_host_def.h> 360a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/mux.h> 370a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/sys_proto.h> 380a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/gpio.h> 390a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/mach-types.h> 400a0e4badSJean-Christophe PLAGNIOL-VILLARD #include "beagle.h" 410a0e4badSJean-Christophe PLAGNIOL-VILLARD 42*ca5f80aeSKoen Kooi #define TWL4030_I2C_BUS 0 43*ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_BUS 1 44*ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 45*ca5f80aeSKoen Kooi 46*ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY 0x01000100 47*ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY2 0x02000100 48*ca5f80aeSKoen Kooi #define TINCANTOOLS_TRAINER 0x04000100 49*ca5f80aeSKoen Kooi #define TINCANTOOLS_SHOWDOG 0x03000100 50*ca5f80aeSKoen Kooi #define KBADC_BEAGLEFPGA 0x01000600 51*ca5f80aeSKoen Kooi 52*ca5f80aeSKoen Kooi #define BEAGLE_NO_EEPROM 0xffffffff 53*ca5f80aeSKoen Kooi 54*ca5f80aeSKoen Kooi static struct { 55*ca5f80aeSKoen Kooi unsigned int device_vendor; 56*ca5f80aeSKoen Kooi unsigned char revision; 57*ca5f80aeSKoen Kooi unsigned char content; 58*ca5f80aeSKoen Kooi char fab_revision[8]; 59*ca5f80aeSKoen Kooi char env_var[16]; 60*ca5f80aeSKoen Kooi char env_setting[64]; 61*ca5f80aeSKoen Kooi } expansion_config; 62*ca5f80aeSKoen Kooi 630a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 640a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: board_init 650a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Early hardware init. 660a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 670a0e4badSJean-Christophe PLAGNIOL-VILLARD int board_init(void) 680a0e4badSJean-Christophe PLAGNIOL-VILLARD { 690a0e4badSJean-Christophe PLAGNIOL-VILLARD DECLARE_GLOBAL_DATA_PTR; 700a0e4badSJean-Christophe PLAGNIOL-VILLARD 710a0e4badSJean-Christophe PLAGNIOL-VILLARD gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 720a0e4badSJean-Christophe PLAGNIOL-VILLARD /* board id for Linux */ 730a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; 740a0e4badSJean-Christophe PLAGNIOL-VILLARD /* boot param addr */ 750a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 760a0e4badSJean-Christophe PLAGNIOL-VILLARD 770a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 780a0e4badSJean-Christophe PLAGNIOL-VILLARD } 790a0e4badSJean-Christophe PLAGNIOL-VILLARD 800a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 8106b95bd5SSteve Sakoman * Routine: get_board_revision 8206b95bd5SSteve Sakoman * Description: Detect if we are running on a Beagle revision Ax/Bx, 8308cbba2aSSteve Sakoman * C1/2/3, C4 or xM. This can be done by reading 8406b95bd5SSteve Sakoman * the level of GPIO173, GPIO172 and GPIO171. This should 8506b95bd5SSteve Sakoman * result in 8606b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx 8706b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 8806b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 8908cbba2aSSteve Sakoman * GPIO173, GPIO172, GPIO171: 0 0 0 => xM 900a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 9106b95bd5SSteve Sakoman int get_board_revision(void) 920a0e4badSJean-Christophe PLAGNIOL-VILLARD { 9306b95bd5SSteve Sakoman int revision; 940a0e4badSJean-Christophe PLAGNIOL-VILLARD 9506b95bd5SSteve Sakoman if (!omap_request_gpio(171) && 9606b95bd5SSteve Sakoman !omap_request_gpio(172) && 9706b95bd5SSteve Sakoman !omap_request_gpio(173)) { 980a0e4badSJean-Christophe PLAGNIOL-VILLARD 990a0e4badSJean-Christophe PLAGNIOL-VILLARD omap_set_gpio_direction(171, 1); 10006b95bd5SSteve Sakoman omap_set_gpio_direction(172, 1); 10106b95bd5SSteve Sakoman omap_set_gpio_direction(173, 1); 1020a0e4badSJean-Christophe PLAGNIOL-VILLARD 10306b95bd5SSteve Sakoman revision = omap_get_gpio_datain(173) << 2 | 10406b95bd5SSteve Sakoman omap_get_gpio_datain(172) << 1 | 10506b95bd5SSteve Sakoman omap_get_gpio_datain(171); 10606b95bd5SSteve Sakoman 10706b95bd5SSteve Sakoman omap_free_gpio(171); 10806b95bd5SSteve Sakoman omap_free_gpio(172); 10906b95bd5SSteve Sakoman omap_free_gpio(173); 11006b95bd5SSteve Sakoman } else { 11106b95bd5SSteve Sakoman printf("Error: unable to acquire board revision GPIOs\n"); 11206b95bd5SSteve Sakoman revision = -1; 1130a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1140a0e4badSJean-Christophe PLAGNIOL-VILLARD 11506b95bd5SSteve Sakoman return revision; 1160a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1170a0e4badSJean-Christophe PLAGNIOL-VILLARD 1180a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 119*ca5f80aeSKoen Kooi * Routine: get_expansion_id 120*ca5f80aeSKoen Kooi * Description: This function checks for expansion board by checking I2C 121*ca5f80aeSKoen Kooi * bus 1 for the availability of an AT24C01B serial EEPROM. 122*ca5f80aeSKoen Kooi * returns the device_vendor field from the EEPROM 123*ca5f80aeSKoen Kooi */ 124*ca5f80aeSKoen Kooi unsigned int get_expansion_id(void) 125*ca5f80aeSKoen Kooi { 126*ca5f80aeSKoen Kooi i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 127*ca5f80aeSKoen Kooi 128*ca5f80aeSKoen Kooi /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ 129*ca5f80aeSKoen Kooi if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 130*ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 131*ca5f80aeSKoen Kooi return BEAGLE_NO_EEPROM; 132*ca5f80aeSKoen Kooi } 133*ca5f80aeSKoen Kooi 134*ca5f80aeSKoen Kooi /* read configuration data */ 135*ca5f80aeSKoen Kooi i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 136*ca5f80aeSKoen Kooi sizeof(expansion_config)); 137*ca5f80aeSKoen Kooi 138*ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 139*ca5f80aeSKoen Kooi 140*ca5f80aeSKoen Kooi return expansion_config.device_vendor; 141*ca5f80aeSKoen Kooi } 142*ca5f80aeSKoen Kooi 143*ca5f80aeSKoen Kooi /* 1440a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: misc_init_r 1450a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Configure board specific parts 1460a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 1470a0e4badSJean-Christophe PLAGNIOL-VILLARD int misc_init_r(void) 1480a0e4badSJean-Christophe PLAGNIOL-VILLARD { 1490a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; 1500a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; 1510a0e4badSJean-Christophe PLAGNIOL-VILLARD 15206b95bd5SSteve Sakoman switch (get_board_revision()) { 15306b95bd5SSteve Sakoman case REVISION_AXBX: 15406b95bd5SSteve Sakoman printf("Beagle Rev Ax/Bx\n"); 15506b95bd5SSteve Sakoman setenv("beaglerev", "AxBx"); 15606b95bd5SSteve Sakoman setenv("mpurate", "600"); 15706b95bd5SSteve Sakoman break; 15806b95bd5SSteve Sakoman case REVISION_CX: 15906b95bd5SSteve Sakoman printf("Beagle Rev C1/C2/C3\n"); 16006b95bd5SSteve Sakoman setenv("beaglerev", "Cx"); 16106b95bd5SSteve Sakoman setenv("mpurate", "600"); 16206b95bd5SSteve Sakoman MUX_BEAGLE_C(); 16306b95bd5SSteve Sakoman break; 16406b95bd5SSteve Sakoman case REVISION_C4: 16506b95bd5SSteve Sakoman printf("Beagle Rev C4\n"); 16608cbba2aSSteve Sakoman setenv("beaglerev", "C4"); 16706b95bd5SSteve Sakoman setenv("mpurate", "720"); 16806b95bd5SSteve Sakoman MUX_BEAGLE_C(); 16906b95bd5SSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 17006b95bd5SSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 17106b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 17206b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 17306b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 17406b95bd5SSteve Sakoman break; 17508cbba2aSSteve Sakoman case REVISION_XM: 17608cbba2aSSteve Sakoman printf("Beagle xM Rev A\n"); 17708cbba2aSSteve Sakoman setenv("beaglerev", "xMA"); 17808cbba2aSSteve Sakoman setenv("mpurate", "1000"); 17908cbba2aSSteve Sakoman MUX_BEAGLE_XM(); 18008cbba2aSSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 18108cbba2aSSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 18208cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 18308cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 18408cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 18508cbba2aSSteve Sakoman break; 18606b95bd5SSteve Sakoman default: 18706b95bd5SSteve Sakoman printf("Beagle unknown 0x%02x\n", get_board_revision()); 18806b95bd5SSteve Sakoman } 18906b95bd5SSteve Sakoman 190*ca5f80aeSKoen Kooi switch (get_expansion_id()) { 191*ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY: 192*ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy board (rev %d %s)\n", 193*ca5f80aeSKoen Kooi expansion_config.revision, 194*ca5f80aeSKoen Kooi expansion_config.fab_revision); 195*ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 196*ca5f80aeSKoen Kooi setenv("buddy", "zippy"); 197*ca5f80aeSKoen Kooi break; 198*ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY2: 199*ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", 200*ca5f80aeSKoen Kooi expansion_config.revision, 201*ca5f80aeSKoen Kooi expansion_config.fab_revision); 202*ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 203*ca5f80aeSKoen Kooi setenv("buddy", "zippy2"); 204*ca5f80aeSKoen Kooi break; 205*ca5f80aeSKoen Kooi case TINCANTOOLS_TRAINER: 206*ca5f80aeSKoen Kooi printf("Recognized Tincantools Trainer board (rev %d %s)\n", 207*ca5f80aeSKoen Kooi expansion_config.revision, 208*ca5f80aeSKoen Kooi expansion_config.fab_revision); 209*ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 210*ca5f80aeSKoen Kooi MUX_TINCANTOOLS_TRAINER(); 211*ca5f80aeSKoen Kooi setenv("buddy", "trainer"); 212*ca5f80aeSKoen Kooi break; 213*ca5f80aeSKoen Kooi case TINCANTOOLS_SHOWDOG: 214*ca5f80aeSKoen Kooi printf("Recognized Tincantools Showdow board (rev %d %s)\n", 215*ca5f80aeSKoen Kooi expansion_config.revision, 216*ca5f80aeSKoen Kooi expansion_config.fab_revision); 217*ca5f80aeSKoen Kooi /* Place holder for DSS2 definition for showdog lcd */ 218*ca5f80aeSKoen Kooi setenv("defaultdisplay", "showdoglcd"); 219*ca5f80aeSKoen Kooi setenv("buddy", "showdog"); 220*ca5f80aeSKoen Kooi break; 221*ca5f80aeSKoen Kooi case KBADC_BEAGLEFPGA: 222*ca5f80aeSKoen Kooi printf("Recognized KBADC Beagle FPGA board\n"); 223*ca5f80aeSKoen Kooi MUX_KBADC_BEAGLEFPGA(); 224*ca5f80aeSKoen Kooi setenv("buddy", "beaglefpga"); 225*ca5f80aeSKoen Kooi break; 226*ca5f80aeSKoen Kooi case BEAGLE_NO_EEPROM: 227*ca5f80aeSKoen Kooi printf("No EEPROM on expansion board\n"); 228*ca5f80aeSKoen Kooi setenv("buddy", "none"); 229*ca5f80aeSKoen Kooi break; 230*ca5f80aeSKoen Kooi default: 231*ca5f80aeSKoen Kooi printf("Unrecognized expansion board: %x\n", 232*ca5f80aeSKoen Kooi expansion_config.device_vendor); 233*ca5f80aeSKoen Kooi setenv("buddy", "unknown"); 234*ca5f80aeSKoen Kooi } 235*ca5f80aeSKoen Kooi 236*ca5f80aeSKoen Kooi if (expansion_config.content == 1) 237*ca5f80aeSKoen Kooi setenv(expansion_config.env_var, expansion_config.env_setting); 238*ca5f80aeSKoen Kooi 2390a0e4badSJean-Christophe PLAGNIOL-VILLARD twl4030_power_init(); 240ead39d7aSGrazvydas Ignotas twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 2410a0e4badSJean-Christophe PLAGNIOL-VILLARD 2420a0e4badSJean-Christophe PLAGNIOL-VILLARD /* Configure GPIOs to output */ 2430a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); 2440a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 2450a0e4badSJean-Christophe PLAGNIOL-VILLARD GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); 2460a0e4badSJean-Christophe PLAGNIOL-VILLARD 2470a0e4badSJean-Christophe PLAGNIOL-VILLARD /* Set GPIOs */ 2480a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, 2490a0e4badSJean-Christophe PLAGNIOL-VILLARD &gpio6_base->setdataout); 2500a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 2510a0e4badSJean-Christophe PLAGNIOL-VILLARD GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); 2520a0e4badSJean-Christophe PLAGNIOL-VILLARD 2530a0e4badSJean-Christophe PLAGNIOL-VILLARD dieid_num_r(); 2540a0e4badSJean-Christophe PLAGNIOL-VILLARD 2550a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 2560a0e4badSJean-Christophe PLAGNIOL-VILLARD } 2570a0e4badSJean-Christophe PLAGNIOL-VILLARD 2580a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 2590a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: set_muxconf_regs 2600a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Setting up the configuration Mux registers specific to the 2610a0e4badSJean-Christophe PLAGNIOL-VILLARD * hardware. Many pins need to be moved from protect to primary 2620a0e4badSJean-Christophe PLAGNIOL-VILLARD * mode. 2630a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 2640a0e4badSJean-Christophe PLAGNIOL-VILLARD void set_muxconf_regs(void) 2650a0e4badSJean-Christophe PLAGNIOL-VILLARD { 2660a0e4badSJean-Christophe PLAGNIOL-VILLARD MUX_BEAGLE(); 2670a0e4badSJean-Christophe PLAGNIOL-VILLARD } 2680cd31144SSteve Sakoman 2690cd31144SSteve Sakoman #ifdef CONFIG_GENERIC_MMC 2700cd31144SSteve Sakoman int board_mmc_init(bd_t *bis) 2710cd31144SSteve Sakoman { 2720cd31144SSteve Sakoman omap_mmc_init(0); 2730cd31144SSteve Sakoman return 0; 2740cd31144SSteve Sakoman } 2750cd31144SSteve Sakoman #endif 276