10a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 275c57a35STom Rini * (C) Copyright 2004-2011 30a0e4badSJean-Christophe PLAGNIOL-VILLARD * Texas Instruments, <www.ti.com> 40a0e4badSJean-Christophe PLAGNIOL-VILLARD * 50a0e4badSJean-Christophe PLAGNIOL-VILLARD * Author : 60a0e4badSJean-Christophe PLAGNIOL-VILLARD * Sunil Kumar <sunilsaini05@gmail.com> 70a0e4badSJean-Christophe PLAGNIOL-VILLARD * Shashi Ranjan <shashiranjanmca05@gmail.com> 80a0e4badSJean-Christophe PLAGNIOL-VILLARD * 90a0e4badSJean-Christophe PLAGNIOL-VILLARD * Derived from Beagle Board and 3430 SDP code by 100a0e4badSJean-Christophe PLAGNIOL-VILLARD * Richard Woodruff <r-woodruff2@ti.com> 110a0e4badSJean-Christophe PLAGNIOL-VILLARD * Syed Mohammed Khasim <khasim@ti.com> 120a0e4badSJean-Christophe PLAGNIOL-VILLARD * 130a0e4badSJean-Christophe PLAGNIOL-VILLARD * 140a0e4badSJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 150a0e4badSJean-Christophe PLAGNIOL-VILLARD * project. 160a0e4badSJean-Christophe PLAGNIOL-VILLARD * 170a0e4badSJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 180a0e4badSJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 190a0e4badSJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 200a0e4badSJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 210a0e4badSJean-Christophe PLAGNIOL-VILLARD * 220a0e4badSJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 230a0e4badSJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 240a0e4badSJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 250a0e4badSJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 260a0e4badSJean-Christophe PLAGNIOL-VILLARD * 270a0e4badSJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 280a0e4badSJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 290a0e4badSJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 300a0e4badSJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 310a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 320a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 3370d8c944SJason Kridner #ifdef CONFIG_STATUS_LED 3470d8c944SJason Kridner #include <status_led.h> 3570d8c944SJason Kridner #endif 360a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <twl4030.h> 3775c57a35STom Rini #include <linux/mtd/nand.h> 380a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/io.h> 390cd31144SSteve Sakoman #include <asm/arch/mmc_host_def.h> 400a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/mux.h> 4175c57a35STom Rini #include <asm/arch/mem.h> 420a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/sys_proto.h> 4384c3b631SSanjeev Premi #include <asm/gpio.h> 440a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/mach-types.h> 45c642b151SIlya Yanok #include <asm/omap_musb.h> 46c642b151SIlya Yanok #include <asm/errno.h> 47c642b151SIlya Yanok #include <linux/usb/ch9.h> 48c642b151SIlya Yanok #include <linux/usb/gadget.h> 49c642b151SIlya Yanok #include <linux/usb/musb.h> 500a0e4badSJean-Christophe PLAGNIOL-VILLARD #include "beagle.h" 51f835ea71SJason Kridner #include <command.h> 520a0e4badSJean-Christophe PLAGNIOL-VILLARD 5343b62393SGovindraj.R #ifdef CONFIG_USB_EHCI 5443b62393SGovindraj.R #include <usb.h> 5543b62393SGovindraj.R #include <asm/ehci-omap.h> 5643b62393SGovindraj.R #endif 5743b62393SGovindraj.R 58ca5f80aeSKoen Kooi #define TWL4030_I2C_BUS 0 59ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_BUS 1 60ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 61ca5f80aeSKoen Kooi 62ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY 0x01000100 63ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY2 0x02000100 64ca5f80aeSKoen Kooi #define TINCANTOOLS_TRAINER 0x04000100 65ca5f80aeSKoen Kooi #define TINCANTOOLS_SHOWDOG 0x03000100 66ca5f80aeSKoen Kooi #define KBADC_BEAGLEFPGA 0x01000600 67ee8485fdSKoen Kooi #define LW_BEAGLETOUCH 0x01000700 68ee8485fdSKoen Kooi #define BRAINMUX_LCDOG 0x01000800 69ee8485fdSKoen Kooi #define BRAINMUX_LCDOGTOUCH 0x02000800 70ee8485fdSKoen Kooi #define BBTOYS_WIFI 0x01000B00 71ee8485fdSKoen Kooi #define BBTOYS_VGA 0x02000B00 72ee8485fdSKoen Kooi #define BBTOYS_LCD 0x03000B00 736cce5504SPeter Meerwald #define BCT_BRETTL3 0x01000F00 74ef88e609SPeter Meerwald #define BCT_BRETTL4 0x02000F00 75*8a1f2dc0Srobertcnelson@gmail.com #define LSR_COM6L_ADPT 0x01001300 76ca5f80aeSKoen Kooi #define BEAGLE_NO_EEPROM 0xffffffff 77ca5f80aeSKoen Kooi 7829565326SJohn Rigby DECLARE_GLOBAL_DATA_PTR; 7929565326SJohn Rigby 80ca5f80aeSKoen Kooi static struct { 81ca5f80aeSKoen Kooi unsigned int device_vendor; 82ca5f80aeSKoen Kooi unsigned char revision; 83ca5f80aeSKoen Kooi unsigned char content; 84ca5f80aeSKoen Kooi char fab_revision[8]; 85ca5f80aeSKoen Kooi char env_var[16]; 86ca5f80aeSKoen Kooi char env_setting[64]; 87ca5f80aeSKoen Kooi } expansion_config; 88ca5f80aeSKoen Kooi 890a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 900a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: board_init 910a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Early hardware init. 920a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 930a0e4badSJean-Christophe PLAGNIOL-VILLARD int board_init(void) 940a0e4badSJean-Christophe PLAGNIOL-VILLARD { 950a0e4badSJean-Christophe PLAGNIOL-VILLARD gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 960a0e4badSJean-Christophe PLAGNIOL-VILLARD /* board id for Linux */ 970a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; 980a0e4badSJean-Christophe PLAGNIOL-VILLARD /* boot param addr */ 990a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 1000a0e4badSJean-Christophe PLAGNIOL-VILLARD 10170d8c944SJason Kridner #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) 10270d8c944SJason Kridner status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); 10370d8c944SJason Kridner #endif 10470d8c944SJason Kridner 1050a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 1060a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1070a0e4badSJean-Christophe PLAGNIOL-VILLARD 1080a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 10906b95bd5SSteve Sakoman * Routine: get_board_revision 11006b95bd5SSteve Sakoman * Description: Detect if we are running on a Beagle revision Ax/Bx, 11108cbba2aSSteve Sakoman * C1/2/3, C4 or xM. This can be done by reading 11206b95bd5SSteve Sakoman * the level of GPIO173, GPIO172 and GPIO171. This should 11306b95bd5SSteve Sakoman * result in 11406b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx 11506b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 11606b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 11708cbba2aSSteve Sakoman * GPIO173, GPIO172, GPIO171: 0 0 0 => xM 1180a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 119fff1a572SPeter Meerwald static int get_board_revision(void) 1200a0e4badSJean-Christophe PLAGNIOL-VILLARD { 12106b95bd5SSteve Sakoman int revision; 1220a0e4badSJean-Christophe PLAGNIOL-VILLARD 12384c3b631SSanjeev Premi if (!gpio_request(171, "") && 12484c3b631SSanjeev Premi !gpio_request(172, "") && 12584c3b631SSanjeev Premi !gpio_request(173, "")) { 1260a0e4badSJean-Christophe PLAGNIOL-VILLARD 12784c3b631SSanjeev Premi gpio_direction_input(171); 12884c3b631SSanjeev Premi gpio_direction_input(172); 12984c3b631SSanjeev Premi gpio_direction_input(173); 1300a0e4badSJean-Christophe PLAGNIOL-VILLARD 13184c3b631SSanjeev Premi revision = gpio_get_value(173) << 2 | 13284c3b631SSanjeev Premi gpio_get_value(172) << 1 | 13384c3b631SSanjeev Premi gpio_get_value(171); 13406b95bd5SSteve Sakoman } else { 13506b95bd5SSteve Sakoman printf("Error: unable to acquire board revision GPIOs\n"); 13606b95bd5SSteve Sakoman revision = -1; 1370a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1380a0e4badSJean-Christophe PLAGNIOL-VILLARD 13906b95bd5SSteve Sakoman return revision; 1400a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1410a0e4badSJean-Christophe PLAGNIOL-VILLARD 14275c57a35STom Rini #ifdef CONFIG_SPL_BUILD 14375c57a35STom Rini /* 14475c57a35STom Rini * Routine: get_board_mem_timings 14575c57a35STom Rini * Description: If we use SPL then there is no x-loader nor config header 14675c57a35STom Rini * so we have to setup the DDR timings ourself on both banks. 14775c57a35STom Rini */ 1488c4445d2SPeter Barada void get_board_mem_timings(struct board_sdrc_timings *timings) 14975c57a35STom Rini { 15075c57a35STom Rini int pop_mfr, pop_id; 15175c57a35STom Rini 15275c57a35STom Rini /* 15375c57a35STom Rini * We need to identify what PoP memory is on the board so that 15475c57a35STom Rini * we know what timings to use. If we can't identify it then 15575c57a35STom Rini * we know it's an xM. To map the ID values please see nand_ids.c 15675c57a35STom Rini */ 15775c57a35STom Rini identify_nand_chip(&pop_mfr, &pop_id); 15875c57a35STom Rini 1598c4445d2SPeter Barada timings->mr = MICRON_V_MR_165; 16075c57a35STom Rini switch (get_board_revision()) { 16175c57a35STom Rini case REVISION_C4: 16275c57a35STom Rini if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { 16375c57a35STom Rini /* 512MB DDR */ 1648c4445d2SPeter Barada timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 1658c4445d2SPeter Barada timings->ctrla = NUMONYX_V_ACTIMA_165; 1668c4445d2SPeter Barada timings->ctrlb = NUMONYX_V_ACTIMB_165; 1678c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 16875c57a35STom Rini break; 169223b8aa4Srobertcnelson@gmail.com } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { 170223b8aa4Srobertcnelson@gmail.com /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ 1718c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_165(128 << 20); 1728c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_165; 1738c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_165; 1748c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 175223b8aa4Srobertcnelson@gmail.com break; 17675c57a35STom Rini } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { 17775c57a35STom Rini /* Beagleboard Rev C5, 256MB DDR */ 1788c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_200(256 << 20); 1798c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_200; 1808c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_200; 1818c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 18275c57a35STom Rini break; 18375c57a35STom Rini } 18475c57a35STom Rini case REVISION_XM_A: 18575c57a35STom Rini case REVISION_XM_B: 18675c57a35STom Rini case REVISION_XM_C: 18775c57a35STom Rini if (pop_mfr == 0) { 18875c57a35STom Rini /* 256MB DDR */ 1898c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_200(256 << 20); 1908c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_200; 1918c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_200; 1928c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 19375c57a35STom Rini } else { 19475c57a35STom Rini /* 512MB DDR */ 1958c4445d2SPeter Barada timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 1968c4445d2SPeter Barada timings->ctrla = NUMONYX_V_ACTIMA_165; 1978c4445d2SPeter Barada timings->ctrlb = NUMONYX_V_ACTIMB_165; 1988c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 19975c57a35STom Rini } 20075c57a35STom Rini break; 20175c57a35STom Rini default: 20275c57a35STom Rini /* Assume 128MB and Micron/165MHz timings to be safe */ 2038c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_165(128 << 20); 2048c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_165; 2058c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_165; 2068c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 20775c57a35STom Rini } 20875c57a35STom Rini } 20975c57a35STom Rini #endif 21075c57a35STom Rini 2110a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 212ca5f80aeSKoen Kooi * Routine: get_expansion_id 213ca5f80aeSKoen Kooi * Description: This function checks for expansion board by checking I2C 214ca5f80aeSKoen Kooi * bus 1 for the availability of an AT24C01B serial EEPROM. 215ca5f80aeSKoen Kooi * returns the device_vendor field from the EEPROM 216ca5f80aeSKoen Kooi */ 217fff1a572SPeter Meerwald static unsigned int get_expansion_id(void) 218ca5f80aeSKoen Kooi { 219ca5f80aeSKoen Kooi i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 220ca5f80aeSKoen Kooi 221ca5f80aeSKoen Kooi /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ 222ca5f80aeSKoen Kooi if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 223ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 224ca5f80aeSKoen Kooi return BEAGLE_NO_EEPROM; 225ca5f80aeSKoen Kooi } 226ca5f80aeSKoen Kooi 227ca5f80aeSKoen Kooi /* read configuration data */ 228ca5f80aeSKoen Kooi i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 229ca5f80aeSKoen Kooi sizeof(expansion_config)); 230ca5f80aeSKoen Kooi 231ff229ecfSrobertcnelson@gmail.com /* retry reading configuration data with 16bit addressing */ 232ff229ecfSrobertcnelson@gmail.com if ((expansion_config.device_vendor == 0xFFFFFF00) || 233ff229ecfSrobertcnelson@gmail.com (expansion_config.device_vendor == 0xFFFFFFFF)) { 234ff229ecfSrobertcnelson@gmail.com printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); 235ff229ecfSrobertcnelson@gmail.com i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, 236ff229ecfSrobertcnelson@gmail.com sizeof(expansion_config)); 237ff229ecfSrobertcnelson@gmail.com } 238ff229ecfSrobertcnelson@gmail.com 239ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 240ca5f80aeSKoen Kooi 241ca5f80aeSKoen Kooi return expansion_config.device_vendor; 242ca5f80aeSKoen Kooi } 243ca5f80aeSKoen Kooi 2442c30c184SPeter Meerwald #ifdef CONFIG_VIDEO_OMAP3 245ca5f80aeSKoen Kooi /* 2463f16ab91SJason Kridner * Configure DSS to display background color on DVID 2473f16ab91SJason Kridner * Configure VENC to display color bar on S-Video 2483f16ab91SJason Kridner */ 249fff1a572SPeter Meerwald static void beagle_display_init(void) 2503f16ab91SJason Kridner { 2513f16ab91SJason Kridner omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH); 2523f16ab91SJason Kridner switch (get_board_revision()) { 2533f16ab91SJason Kridner case REVISION_AXBX: 2543f16ab91SJason Kridner case REVISION_CX: 2553f16ab91SJason Kridner case REVISION_C4: 2563f16ab91SJason Kridner omap3_dss_panel_config(&dvid_cfg); 2573f16ab91SJason Kridner break; 2583f16ab91SJason Kridner case REVISION_XM_A: 2593f16ab91SJason Kridner case REVISION_XM_B: 2603f16ab91SJason Kridner case REVISION_XM_C: 2613f16ab91SJason Kridner default: 2623f16ab91SJason Kridner omap3_dss_panel_config(&dvid_cfg_xm); 2633f16ab91SJason Kridner break; 2643f16ab91SJason Kridner } 2653f16ab91SJason Kridner } 2663f16ab91SJason Kridner 2673f16ab91SJason Kridner /* 2684258aa62SPeter Meerwald * Enable DVI power 2694258aa62SPeter Meerwald */ 2703fbc6931SAnatolij Gustschin static void beagle_dvi_pup(void) 2713fbc6931SAnatolij Gustschin { 2724258aa62SPeter Meerwald uchar val; 2734258aa62SPeter Meerwald 2744258aa62SPeter Meerwald switch (get_board_revision()) { 2754258aa62SPeter Meerwald case REVISION_AXBX: 2764258aa62SPeter Meerwald case REVISION_CX: 2774258aa62SPeter Meerwald case REVISION_C4: 2784258aa62SPeter Meerwald case REVISION_XM_A: 2794258aa62SPeter Meerwald gpio_request(170, ""); 2804258aa62SPeter Meerwald gpio_direction_output(170, 0); 2814258aa62SPeter Meerwald gpio_set_value(170, 1); 2824258aa62SPeter Meerwald break; 2834258aa62SPeter Meerwald case REVISION_XM_B: 2844258aa62SPeter Meerwald case REVISION_XM_C: 2854258aa62SPeter Meerwald default: 2864258aa62SPeter Meerwald #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3) 2874258aa62SPeter Meerwald #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6) 2884258aa62SPeter Meerwald 2894258aa62SPeter Meerwald i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 2904258aa62SPeter Meerwald val |= 4; 2914258aa62SPeter Meerwald i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 2924258aa62SPeter Meerwald 2934258aa62SPeter Meerwald i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 2944258aa62SPeter Meerwald val |= 4; 2954258aa62SPeter Meerwald i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 2964258aa62SPeter Meerwald break; 2974258aa62SPeter Meerwald } 2984258aa62SPeter Meerwald } 2992c30c184SPeter Meerwald #endif 3004258aa62SPeter Meerwald 301c642b151SIlya Yanok #ifdef CONFIG_USB_MUSB_OMAP2PLUS 302c642b151SIlya Yanok static struct musb_hdrc_config musb_config = { 303c642b151SIlya Yanok .multipoint = 1, 304c642b151SIlya Yanok .dyn_fifo = 1, 305c642b151SIlya Yanok .num_eps = 16, 306c642b151SIlya Yanok .ram_bits = 12, 307c642b151SIlya Yanok }; 308c642b151SIlya Yanok 309c642b151SIlya Yanok static struct omap_musb_board_data musb_board_data = { 310c642b151SIlya Yanok .interface_type = MUSB_INTERFACE_ULPI, 311c642b151SIlya Yanok }; 312c642b151SIlya Yanok 313c642b151SIlya Yanok static struct musb_hdrc_platform_data musb_plat = { 314c642b151SIlya Yanok #if defined(CONFIG_MUSB_HOST) 315c642b151SIlya Yanok .mode = MUSB_HOST, 316c642b151SIlya Yanok #elif defined(CONFIG_MUSB_GADGET) 317c642b151SIlya Yanok .mode = MUSB_PERIPHERAL, 318c642b151SIlya Yanok #else 319c642b151SIlya Yanok #error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET" 320c642b151SIlya Yanok #endif 321c642b151SIlya Yanok .config = &musb_config, 322c642b151SIlya Yanok .power = 100, 323c642b151SIlya Yanok .platform_ops = &omap2430_ops, 324c642b151SIlya Yanok .board_data = &musb_board_data, 325c642b151SIlya Yanok }; 326c642b151SIlya Yanok #endif 327c642b151SIlya Yanok 3284258aa62SPeter Meerwald /* 3290a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: misc_init_r 3300a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Configure board specific parts 3310a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 3320a0e4badSJean-Christophe PLAGNIOL-VILLARD int misc_init_r(void) 3330a0e4badSJean-Christophe PLAGNIOL-VILLARD { 3340a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; 3350a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; 336f14a522aSJason Kridner struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE; 337d4e53f06SSteve Kipisz 338d4e53f06SSteve Kipisz /* Enable i2c2 pullup resisters */ 339d4e53f06SSteve Kipisz writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1); 3400a0e4badSJean-Christophe PLAGNIOL-VILLARD 34106b95bd5SSteve Sakoman switch (get_board_revision()) { 34206b95bd5SSteve Sakoman case REVISION_AXBX: 34306b95bd5SSteve Sakoman printf("Beagle Rev Ax/Bx\n"); 34406b95bd5SSteve Sakoman setenv("beaglerev", "AxBx"); 34506b95bd5SSteve Sakoman break; 34606b95bd5SSteve Sakoman case REVISION_CX: 34706b95bd5SSteve Sakoman printf("Beagle Rev C1/C2/C3\n"); 34806b95bd5SSteve Sakoman setenv("beaglerev", "Cx"); 34906b95bd5SSteve Sakoman MUX_BEAGLE_C(); 35006b95bd5SSteve Sakoman break; 35106b95bd5SSteve Sakoman case REVISION_C4: 35206b95bd5SSteve Sakoman printf("Beagle Rev C4\n"); 35308cbba2aSSteve Sakoman setenv("beaglerev", "C4"); 35406b95bd5SSteve Sakoman MUX_BEAGLE_C(); 35506b95bd5SSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 35606b95bd5SSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 35706b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 35806b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 35906b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 36006b95bd5SSteve Sakoman break; 361f6e593bbSKoen Kooi case REVISION_XM_A: 36208cbba2aSSteve Sakoman printf("Beagle xM Rev A\n"); 36308cbba2aSSteve Sakoman setenv("beaglerev", "xMA"); 364f6e593bbSKoen Kooi MUX_BEAGLE_XM(); 365f6e593bbSKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 366f6e593bbSKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 367f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 368f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 369f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 370f6e593bbSKoen Kooi break; 371f6e593bbSKoen Kooi case REVISION_XM_B: 372f6e593bbSKoen Kooi printf("Beagle xM Rev B\n"); 373f6e593bbSKoen Kooi setenv("beaglerev", "xMB"); 37408cbba2aSSteve Sakoman MUX_BEAGLE_XM(); 37508cbba2aSSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 37608cbba2aSSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 37708cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 37808cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 37908cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 38008cbba2aSSteve Sakoman break; 3811ffcb346SKoen Kooi case REVISION_XM_C: 3821ffcb346SKoen Kooi printf("Beagle xM Rev C\n"); 3831ffcb346SKoen Kooi setenv("beaglerev", "xMC"); 3841ffcb346SKoen Kooi MUX_BEAGLE_XM(); 3851ffcb346SKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 3861ffcb346SKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 3871ffcb346SKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 3881ffcb346SKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 3891ffcb346SKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 3901ffcb346SKoen Kooi break; 39106b95bd5SSteve Sakoman default: 39206b95bd5SSteve Sakoman printf("Beagle unknown 0x%02x\n", get_board_revision()); 393f6e593bbSKoen Kooi MUX_BEAGLE_XM(); 394f6e593bbSKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 395f6e593bbSKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 396f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 397f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 398f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 39906b95bd5SSteve Sakoman } 40006b95bd5SSteve Sakoman 401ca5f80aeSKoen Kooi switch (get_expansion_id()) { 402ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY: 403ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy board (rev %d %s)\n", 404ca5f80aeSKoen Kooi expansion_config.revision, 405ca5f80aeSKoen Kooi expansion_config.fab_revision); 406ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 407ca5f80aeSKoen Kooi setenv("buddy", "zippy"); 408ca5f80aeSKoen Kooi break; 409ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY2: 410ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", 411ca5f80aeSKoen Kooi expansion_config.revision, 412ca5f80aeSKoen Kooi expansion_config.fab_revision); 413ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 414ca5f80aeSKoen Kooi setenv("buddy", "zippy2"); 415ca5f80aeSKoen Kooi break; 416ca5f80aeSKoen Kooi case TINCANTOOLS_TRAINER: 417ca5f80aeSKoen Kooi printf("Recognized Tincantools Trainer board (rev %d %s)\n", 418ca5f80aeSKoen Kooi expansion_config.revision, 419ca5f80aeSKoen Kooi expansion_config.fab_revision); 420ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 421ca5f80aeSKoen Kooi MUX_TINCANTOOLS_TRAINER(); 422ca5f80aeSKoen Kooi setenv("buddy", "trainer"); 423ca5f80aeSKoen Kooi break; 424ca5f80aeSKoen Kooi case TINCANTOOLS_SHOWDOG: 425ca5f80aeSKoen Kooi printf("Recognized Tincantools Showdow board (rev %d %s)\n", 426ca5f80aeSKoen Kooi expansion_config.revision, 427ca5f80aeSKoen Kooi expansion_config.fab_revision); 428ca5f80aeSKoen Kooi /* Place holder for DSS2 definition for showdog lcd */ 429ca5f80aeSKoen Kooi setenv("defaultdisplay", "showdoglcd"); 430ca5f80aeSKoen Kooi setenv("buddy", "showdog"); 431ca5f80aeSKoen Kooi break; 432ca5f80aeSKoen Kooi case KBADC_BEAGLEFPGA: 433ca5f80aeSKoen Kooi printf("Recognized KBADC Beagle FPGA board\n"); 434ca5f80aeSKoen Kooi MUX_KBADC_BEAGLEFPGA(); 435ca5f80aeSKoen Kooi setenv("buddy", "beaglefpga"); 436ca5f80aeSKoen Kooi break; 437ee8485fdSKoen Kooi case LW_BEAGLETOUCH: 438ee8485fdSKoen Kooi printf("Recognized Liquidware BeagleTouch board\n"); 439ee8485fdSKoen Kooi setenv("buddy", "beagletouch"); 440ee8485fdSKoen Kooi break; 441ee8485fdSKoen Kooi case BRAINMUX_LCDOG: 442ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog board\n"); 443ee8485fdSKoen Kooi setenv("buddy", "lcdog"); 444ee8485fdSKoen Kooi break; 445ee8485fdSKoen Kooi case BRAINMUX_LCDOGTOUCH: 446ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog Touch board\n"); 447ee8485fdSKoen Kooi setenv("buddy", "lcdogtouch"); 448ee8485fdSKoen Kooi break; 449ee8485fdSKoen Kooi case BBTOYS_WIFI: 450ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys WiFi board\n"); 451ee8485fdSKoen Kooi MUX_BBTOYS_WIFI() 452ee8485fdSKoen Kooi setenv("buddy", "bbtoys-wifi"); 453ee8485fdSKoen Kooi break;; 454ee8485fdSKoen Kooi case BBTOYS_VGA: 455ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys VGA board\n"); 456ee8485fdSKoen Kooi break;; 457ee8485fdSKoen Kooi case BBTOYS_LCD: 458ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys LCD board\n"); 459ee8485fdSKoen Kooi break;; 4606cce5504SPeter Meerwald case BCT_BRETTL3: 4616cce5504SPeter Meerwald printf("Recognized bct electronic GmbH brettl3 board\n"); 4626cce5504SPeter Meerwald break; 463ef88e609SPeter Meerwald case BCT_BRETTL4: 464ef88e609SPeter Meerwald printf("Recognized bct electronic GmbH brettl4 board\n"); 465ef88e609SPeter Meerwald break; 466*8a1f2dc0Srobertcnelson@gmail.com case LSR_COM6L_ADPT: 467*8a1f2dc0Srobertcnelson@gmail.com printf("Recognized LSR COM6L Adapter Board\n"); 468*8a1f2dc0Srobertcnelson@gmail.com MUX_BBTOYS_WIFI() 469*8a1f2dc0Srobertcnelson@gmail.com setenv("buddy", "lsr-com6l-adpt"); 470*8a1f2dc0Srobertcnelson@gmail.com break; 471ca5f80aeSKoen Kooi case BEAGLE_NO_EEPROM: 472ca5f80aeSKoen Kooi printf("No EEPROM on expansion board\n"); 473ca5f80aeSKoen Kooi setenv("buddy", "none"); 474ca5f80aeSKoen Kooi break; 475ca5f80aeSKoen Kooi default: 476ca5f80aeSKoen Kooi printf("Unrecognized expansion board: %x\n", 477ca5f80aeSKoen Kooi expansion_config.device_vendor); 478ca5f80aeSKoen Kooi setenv("buddy", "unknown"); 479ca5f80aeSKoen Kooi } 480ca5f80aeSKoen Kooi 481ca5f80aeSKoen Kooi if (expansion_config.content == 1) 482ca5f80aeSKoen Kooi setenv(expansion_config.env_var, expansion_config.env_setting); 483ca5f80aeSKoen Kooi 4840a0e4badSJean-Christophe PLAGNIOL-VILLARD twl4030_power_init(); 48538a77c3aSChristian Spielberger switch (get_board_revision()) { 48638a77c3aSChristian Spielberger case REVISION_XM_A: 48738a77c3aSChristian Spielberger case REVISION_XM_B: 48838a77c3aSChristian Spielberger twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); 48938a77c3aSChristian Spielberger break; 49038a77c3aSChristian Spielberger default: 491ead39d7aSGrazvydas Ignotas twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 49238a77c3aSChristian Spielberger break; 49338a77c3aSChristian Spielberger } 4940a0e4badSJean-Christophe PLAGNIOL-VILLARD 49552d82e40SBob Feretich /* Set GPIO states before they are made outputs */ 4960a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, 4970a0e4badSJean-Christophe PLAGNIOL-VILLARD &gpio6_base->setdataout); 4980a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 4990a0e4badSJean-Christophe PLAGNIOL-VILLARD GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); 5000a0e4badSJean-Christophe PLAGNIOL-VILLARD 50152d82e40SBob Feretich /* Configure GPIOs to output */ 50252d82e40SBob Feretich writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); 50352d82e40SBob Feretich writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 50452d82e40SBob Feretich GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); 50552d82e40SBob Feretich 5060a0e4badSJean-Christophe PLAGNIOL-VILLARD dieid_num_r(); 5074258aa62SPeter Meerwald 5082c30c184SPeter Meerwald #ifdef CONFIG_VIDEO_OMAP3 5094258aa62SPeter Meerwald beagle_dvi_pup(); 5103f16ab91SJason Kridner beagle_display_init(); 5113f16ab91SJason Kridner omap3_dss_enable(); 5122c30c184SPeter Meerwald #endif 5130a0e4badSJean-Christophe PLAGNIOL-VILLARD 514c642b151SIlya Yanok #ifdef CONFIG_USB_MUSB_OMAP2PLUS 515c642b151SIlya Yanok musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); 516c642b151SIlya Yanok #endif 517c642b151SIlya Yanok 5180a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 5190a0e4badSJean-Christophe PLAGNIOL-VILLARD } 5200a0e4badSJean-Christophe PLAGNIOL-VILLARD 5210a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 5220a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: set_muxconf_regs 5230a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Setting up the configuration Mux registers specific to the 5240a0e4badSJean-Christophe PLAGNIOL-VILLARD * hardware. Many pins need to be moved from protect to primary 5250a0e4badSJean-Christophe PLAGNIOL-VILLARD * mode. 5260a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 5270a0e4badSJean-Christophe PLAGNIOL-VILLARD void set_muxconf_regs(void) 5280a0e4badSJean-Christophe PLAGNIOL-VILLARD { 5290a0e4badSJean-Christophe PLAGNIOL-VILLARD MUX_BEAGLE(); 5300a0e4badSJean-Christophe PLAGNIOL-VILLARD } 5310cd31144SSteve Sakoman 53275c57a35STom Rini #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 5330cd31144SSteve Sakoman int board_mmc_init(bd_t *bis) 5340cd31144SSteve Sakoman { 535bbbc1ae9SJonathan Solnit omap_mmc_init(0, 0, 0); 5360cd31144SSteve Sakoman return 0; 5370cd31144SSteve Sakoman } 5380cd31144SSteve Sakoman #endif 539d90859a6SAlexander Holler 5407ac2fe2dSIlya Yanok #if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD) 541d90859a6SAlexander Holler /* Call usb_stop() before starting the kernel */ 542d90859a6SAlexander Holler void show_boot_progress(int val) 543d90859a6SAlexander Holler { 544578ac1e9SSimon Glass if (val == BOOTSTAGE_ID_RUN_OS) 545d90859a6SAlexander Holler usb_stop(); 546d90859a6SAlexander Holler } 54743b62393SGovindraj.R 54843b62393SGovindraj.R static struct omap_usbhs_board_data usbhs_bdata = { 54943b62393SGovindraj.R .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 55043b62393SGovindraj.R .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 55143b62393SGovindraj.R .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED 55243b62393SGovindraj.R }; 55343b62393SGovindraj.R 554676ae068SLucas Stach int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) 55543b62393SGovindraj.R { 556676ae068SLucas Stach return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor); 55743b62393SGovindraj.R } 55843b62393SGovindraj.R 559676ae068SLucas Stach int ehci_hcd_stop(int index) 56043b62393SGovindraj.R { 56143b62393SGovindraj.R return omap_ehci_hcd_stop(); 56243b62393SGovindraj.R } 56343b62393SGovindraj.R 564d90859a6SAlexander Holler #endif /* CONFIG_USB_EHCI */ 565c642b151SIlya Yanok 566c642b151SIlya Yanok #if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET) 567c642b151SIlya Yanok int board_eth_init(bd_t *bis) 568c642b151SIlya Yanok { 569c642b151SIlya Yanok return usb_eth_initialize(bis); 570c642b151SIlya Yanok } 571c642b151SIlya Yanok #endif 572