10a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 275c57a35STom Rini * (C) Copyright 2004-2011 30a0e4badSJean-Christophe PLAGNIOL-VILLARD * Texas Instruments, <www.ti.com> 40a0e4badSJean-Christophe PLAGNIOL-VILLARD * 50a0e4badSJean-Christophe PLAGNIOL-VILLARD * Author : 60a0e4badSJean-Christophe PLAGNIOL-VILLARD * Sunil Kumar <sunilsaini05@gmail.com> 70a0e4badSJean-Christophe PLAGNIOL-VILLARD * Shashi Ranjan <shashiranjanmca05@gmail.com> 80a0e4badSJean-Christophe PLAGNIOL-VILLARD * 90a0e4badSJean-Christophe PLAGNIOL-VILLARD * Derived from Beagle Board and 3430 SDP code by 100a0e4badSJean-Christophe PLAGNIOL-VILLARD * Richard Woodruff <r-woodruff2@ti.com> 110a0e4badSJean-Christophe PLAGNIOL-VILLARD * Syed Mohammed Khasim <khasim@ti.com> 120a0e4badSJean-Christophe PLAGNIOL-VILLARD * 130a0e4badSJean-Christophe PLAGNIOL-VILLARD * 141a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 150a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 160a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 17b3f4ca11SSimon Glass #include <dm.h> 18b3f4ca11SSimon Glass #include <ns16550.h> 19*2d8d190cSUri Mashiach #ifdef CONFIG_LED_STATUS 2070d8c944SJason Kridner #include <status_led.h> 2170d8c944SJason Kridner #endif 220a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <twl4030.h> 2375c57a35STom Rini #include <linux/mtd/nand.h> 240a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/io.h> 250cd31144SSteve Sakoman #include <asm/arch/mmc_host_def.h> 260a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/mux.h> 2775c57a35STom Rini #include <asm/arch/mem.h> 280a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/sys_proto.h> 2984c3b631SSanjeev Premi #include <asm/gpio.h> 300a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/mach-types.h> 31c642b151SIlya Yanok #include <asm/omap_musb.h> 321221ce45SMasahiro Yamada #include <linux/errno.h> 33c642b151SIlya Yanok #include <linux/usb/ch9.h> 34c642b151SIlya Yanok #include <linux/usb/gadget.h> 35c642b151SIlya Yanok #include <linux/usb/musb.h> 360a0e4badSJean-Christophe PLAGNIOL-VILLARD #include "beagle.h" 37f835ea71SJason Kridner #include <command.h> 380a0e4badSJean-Christophe PLAGNIOL-VILLARD 3943b62393SGovindraj.R #ifdef CONFIG_USB_EHCI 4043b62393SGovindraj.R #include <usb.h> 4143b62393SGovindraj.R #include <asm/ehci-omap.h> 4243b62393SGovindraj.R #endif 4343b62393SGovindraj.R 44ca5f80aeSKoen Kooi #define TWL4030_I2C_BUS 0 45ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_BUS 1 46ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 47ca5f80aeSKoen Kooi 48ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY 0x01000100 49ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY2 0x02000100 50ca5f80aeSKoen Kooi #define TINCANTOOLS_TRAINER 0x04000100 51ca5f80aeSKoen Kooi #define TINCANTOOLS_SHOWDOG 0x03000100 52ca5f80aeSKoen Kooi #define KBADC_BEAGLEFPGA 0x01000600 53ee8485fdSKoen Kooi #define LW_BEAGLETOUCH 0x01000700 54ee8485fdSKoen Kooi #define BRAINMUX_LCDOG 0x01000800 55ee8485fdSKoen Kooi #define BRAINMUX_LCDOGTOUCH 0x02000800 56ee8485fdSKoen Kooi #define BBTOYS_WIFI 0x01000B00 57ee8485fdSKoen Kooi #define BBTOYS_VGA 0x02000B00 58ee8485fdSKoen Kooi #define BBTOYS_LCD 0x03000B00 596cce5504SPeter Meerwald #define BCT_BRETTL3 0x01000F00 60ef88e609SPeter Meerwald #define BCT_BRETTL4 0x02000F00 618a1f2dc0Srobertcnelson@gmail.com #define LSR_COM6L_ADPT 0x01001300 62ca5f80aeSKoen Kooi #define BEAGLE_NO_EEPROM 0xffffffff 63ca5f80aeSKoen Kooi 6429565326SJohn Rigby DECLARE_GLOBAL_DATA_PTR; 6529565326SJohn Rigby 66ca5f80aeSKoen Kooi static struct { 67ca5f80aeSKoen Kooi unsigned int device_vendor; 68ca5f80aeSKoen Kooi unsigned char revision; 69ca5f80aeSKoen Kooi unsigned char content; 70ca5f80aeSKoen Kooi char fab_revision[8]; 71ca5f80aeSKoen Kooi char env_var[16]; 72ca5f80aeSKoen Kooi char env_setting[64]; 73ca5f80aeSKoen Kooi } expansion_config; 74ca5f80aeSKoen Kooi 75b3f4ca11SSimon Glass static const struct ns16550_platdata beagle_serial = { 762f6ed3b8SAdam Ford .base = OMAP34XX_UART3, 772f6ed3b8SAdam Ford .reg_shift = 2, 7817fa0326SHeiko Schocher .clock = V_NS16550_CLK, 7917fa0326SHeiko Schocher .fcr = UART_FCR_DEFVAL, 80b3f4ca11SSimon Glass }; 81b3f4ca11SSimon Glass 82b3f4ca11SSimon Glass U_BOOT_DEVICE(beagle_uart) = { 83c7b9686dSThomas Chou "ns16550_serial", 84b3f4ca11SSimon Glass &beagle_serial 85b3f4ca11SSimon Glass }; 86b3f4ca11SSimon Glass 870a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 880a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: board_init 890a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Early hardware init. 900a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 910a0e4badSJean-Christophe PLAGNIOL-VILLARD int board_init(void) 920a0e4badSJean-Christophe PLAGNIOL-VILLARD { 930a0e4badSJean-Christophe PLAGNIOL-VILLARD gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 940a0e4badSJean-Christophe PLAGNIOL-VILLARD /* board id for Linux */ 950a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; 960a0e4badSJean-Christophe PLAGNIOL-VILLARD /* boot param addr */ 970a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 980a0e4badSJean-Christophe PLAGNIOL-VILLARD 99*2d8d190cSUri Mashiach #if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE) 100*2d8d190cSUri Mashiach status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON); 10170d8c944SJason Kridner #endif 10270d8c944SJason Kridner 1030a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 1040a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1050a0e4badSJean-Christophe PLAGNIOL-VILLARD 1060a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 10706b95bd5SSteve Sakoman * Routine: get_board_revision 10806b95bd5SSteve Sakoman * Description: Detect if we are running on a Beagle revision Ax/Bx, 1098ce4e5f9STom Rini * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading 11006b95bd5SSteve Sakoman * the level of GPIO173, GPIO172 and GPIO171. This should 11106b95bd5SSteve Sakoman * result in 11206b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx 11306b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 11406b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 1158ce4e5f9STom Rini * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx 1168ce4e5f9STom Rini * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx 1170a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 118fff1a572SPeter Meerwald static int get_board_revision(void) 1190a0e4badSJean-Christophe PLAGNIOL-VILLARD { 120b3f4ca11SSimon Glass static int revision = -1; 1210a0e4badSJean-Christophe PLAGNIOL-VILLARD 122b3f4ca11SSimon Glass if (revision == -1) { 123b3f4ca11SSimon Glass if (!gpio_request(171, "rev0") && 124b3f4ca11SSimon Glass !gpio_request(172, "rev1") && 125b3f4ca11SSimon Glass !gpio_request(173, "rev2")) { 12684c3b631SSanjeev Premi gpio_direction_input(171); 12784c3b631SSanjeev Premi gpio_direction_input(172); 12884c3b631SSanjeev Premi gpio_direction_input(173); 1290a0e4badSJean-Christophe PLAGNIOL-VILLARD 13084c3b631SSanjeev Premi revision = gpio_get_value(173) << 2 | 13184c3b631SSanjeev Premi gpio_get_value(172) << 1 | 13284c3b631SSanjeev Premi gpio_get_value(171); 13306b95bd5SSteve Sakoman } else { 13406b95bd5SSteve Sakoman printf("Error: unable to acquire board revision GPIOs\n"); 135b3f4ca11SSimon Glass } 1360a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1370a0e4badSJean-Christophe PLAGNIOL-VILLARD 13806b95bd5SSteve Sakoman return revision; 1390a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1400a0e4badSJean-Christophe PLAGNIOL-VILLARD 14175c57a35STom Rini #ifdef CONFIG_SPL_BUILD 14275c57a35STom Rini /* 14375c57a35STom Rini * Routine: get_board_mem_timings 14475c57a35STom Rini * Description: If we use SPL then there is no x-loader nor config header 14575c57a35STom Rini * so we have to setup the DDR timings ourself on both banks. 14675c57a35STom Rini */ 1478c4445d2SPeter Barada void get_board_mem_timings(struct board_sdrc_timings *timings) 14875c57a35STom Rini { 14975c57a35STom Rini int pop_mfr, pop_id; 15075c57a35STom Rini 15175c57a35STom Rini /* 15275c57a35STom Rini * We need to identify what PoP memory is on the board so that 15375c57a35STom Rini * we know what timings to use. If we can't identify it then 15475c57a35STom Rini * we know it's an xM. To map the ID values please see nand_ids.c 15575c57a35STom Rini */ 15675c57a35STom Rini identify_nand_chip(&pop_mfr, &pop_id); 15775c57a35STom Rini 1588c4445d2SPeter Barada timings->mr = MICRON_V_MR_165; 15975c57a35STom Rini switch (get_board_revision()) { 16075c57a35STom Rini case REVISION_C4: 16175c57a35STom Rini if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { 16275c57a35STom Rini /* 512MB DDR */ 1638c4445d2SPeter Barada timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 1648c4445d2SPeter Barada timings->ctrla = NUMONYX_V_ACTIMA_165; 1658c4445d2SPeter Barada timings->ctrlb = NUMONYX_V_ACTIMB_165; 1668c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 16775c57a35STom Rini break; 168223b8aa4Srobertcnelson@gmail.com } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { 169223b8aa4Srobertcnelson@gmail.com /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ 1708c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_165(128 << 20); 1718c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_165; 1728c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_165; 1738c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 174223b8aa4Srobertcnelson@gmail.com break; 17575c57a35STom Rini } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { 17675c57a35STom Rini /* Beagleboard Rev C5, 256MB DDR */ 1778c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_200(256 << 20); 1788c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_200; 1798c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_200; 1808c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 18175c57a35STom Rini break; 18275c57a35STom Rini } 183af4d896fSNishanth Menon case REVISION_XM_AB: 18475c57a35STom Rini case REVISION_XM_C: 18575c57a35STom Rini if (pop_mfr == 0) { 18675c57a35STom Rini /* 256MB DDR */ 1878c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_200(256 << 20); 1888c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_200; 1898c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_200; 1908c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 19175c57a35STom Rini } else { 19275c57a35STom Rini /* 512MB DDR */ 1938c4445d2SPeter Barada timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 1948c4445d2SPeter Barada timings->ctrla = NUMONYX_V_ACTIMA_165; 1958c4445d2SPeter Barada timings->ctrlb = NUMONYX_V_ACTIMB_165; 1968c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 19775c57a35STom Rini } 19875c57a35STom Rini break; 19975c57a35STom Rini default: 20075c57a35STom Rini /* Assume 128MB and Micron/165MHz timings to be safe */ 2018c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_165(128 << 20); 2028c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_165; 2038c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_165; 2048c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 20575c57a35STom Rini } 20675c57a35STom Rini } 20775c57a35STom Rini #endif 20875c57a35STom Rini 2090a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 210ca5f80aeSKoen Kooi * Routine: get_expansion_id 211ca5f80aeSKoen Kooi * Description: This function checks for expansion board by checking I2C 212ca5f80aeSKoen Kooi * bus 1 for the availability of an AT24C01B serial EEPROM. 213ca5f80aeSKoen Kooi * returns the device_vendor field from the EEPROM 214ca5f80aeSKoen Kooi */ 215fff1a572SPeter Meerwald static unsigned int get_expansion_id(void) 216ca5f80aeSKoen Kooi { 217ca5f80aeSKoen Kooi i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 218ca5f80aeSKoen Kooi 219ca5f80aeSKoen Kooi /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ 220ca5f80aeSKoen Kooi if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 221ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 222ca5f80aeSKoen Kooi return BEAGLE_NO_EEPROM; 223ca5f80aeSKoen Kooi } 224ca5f80aeSKoen Kooi 225ca5f80aeSKoen Kooi /* read configuration data */ 226ca5f80aeSKoen Kooi i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 227ca5f80aeSKoen Kooi sizeof(expansion_config)); 228ca5f80aeSKoen Kooi 229ff229ecfSrobertcnelson@gmail.com /* retry reading configuration data with 16bit addressing */ 230ff229ecfSrobertcnelson@gmail.com if ((expansion_config.device_vendor == 0xFFFFFF00) || 231ff229ecfSrobertcnelson@gmail.com (expansion_config.device_vendor == 0xFFFFFFFF)) { 232ff229ecfSrobertcnelson@gmail.com printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); 233ff229ecfSrobertcnelson@gmail.com i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, 234ff229ecfSrobertcnelson@gmail.com sizeof(expansion_config)); 235ff229ecfSrobertcnelson@gmail.com } 236ff229ecfSrobertcnelson@gmail.com 237ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 238ca5f80aeSKoen Kooi 239ca5f80aeSKoen Kooi return expansion_config.device_vendor; 240ca5f80aeSKoen Kooi } 241ca5f80aeSKoen Kooi 2422c30c184SPeter Meerwald #ifdef CONFIG_VIDEO_OMAP3 243ca5f80aeSKoen Kooi /* 2443f16ab91SJason Kridner * Configure DSS to display background color on DVID 2453f16ab91SJason Kridner * Configure VENC to display color bar on S-Video 2463f16ab91SJason Kridner */ 247fff1a572SPeter Meerwald static void beagle_display_init(void) 2483f16ab91SJason Kridner { 2493f16ab91SJason Kridner omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH); 2503f16ab91SJason Kridner switch (get_board_revision()) { 2513f16ab91SJason Kridner case REVISION_AXBX: 2523f16ab91SJason Kridner case REVISION_CX: 2533f16ab91SJason Kridner case REVISION_C4: 2543f16ab91SJason Kridner omap3_dss_panel_config(&dvid_cfg); 2553f16ab91SJason Kridner break; 256af4d896fSNishanth Menon case REVISION_XM_AB: 2573f16ab91SJason Kridner case REVISION_XM_C: 2583f16ab91SJason Kridner default: 2593f16ab91SJason Kridner omap3_dss_panel_config(&dvid_cfg_xm); 2603f16ab91SJason Kridner break; 2613f16ab91SJason Kridner } 2623f16ab91SJason Kridner } 2633f16ab91SJason Kridner 2643f16ab91SJason Kridner /* 2654258aa62SPeter Meerwald * Enable DVI power 2664258aa62SPeter Meerwald */ 2673fbc6931SAnatolij Gustschin static void beagle_dvi_pup(void) 2683fbc6931SAnatolij Gustschin { 2694258aa62SPeter Meerwald uchar val; 2704258aa62SPeter Meerwald 2714258aa62SPeter Meerwald switch (get_board_revision()) { 2724258aa62SPeter Meerwald case REVISION_AXBX: 2734258aa62SPeter Meerwald case REVISION_CX: 2744258aa62SPeter Meerwald case REVISION_C4: 275b3f4ca11SSimon Glass gpio_request(170, "dvi"); 2764258aa62SPeter Meerwald gpio_direction_output(170, 0); 2774258aa62SPeter Meerwald gpio_set_value(170, 1); 2784258aa62SPeter Meerwald break; 279af4d896fSNishanth Menon case REVISION_XM_AB: 2804258aa62SPeter Meerwald case REVISION_XM_C: 2814258aa62SPeter Meerwald default: 2824258aa62SPeter Meerwald #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3) 2834258aa62SPeter Meerwald #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6) 2844258aa62SPeter Meerwald 2854258aa62SPeter Meerwald i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 2864258aa62SPeter Meerwald val |= 4; 2874258aa62SPeter Meerwald i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 2884258aa62SPeter Meerwald 2894258aa62SPeter Meerwald i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 2904258aa62SPeter Meerwald val |= 4; 2914258aa62SPeter Meerwald i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 2924258aa62SPeter Meerwald break; 2934258aa62SPeter Meerwald } 2944258aa62SPeter Meerwald } 2952c30c184SPeter Meerwald #endif 2964258aa62SPeter Meerwald 297c642b151SIlya Yanok #ifdef CONFIG_USB_MUSB_OMAP2PLUS 298c642b151SIlya Yanok static struct musb_hdrc_config musb_config = { 299c642b151SIlya Yanok .multipoint = 1, 300c642b151SIlya Yanok .dyn_fifo = 1, 301c642b151SIlya Yanok .num_eps = 16, 302c642b151SIlya Yanok .ram_bits = 12, 303c642b151SIlya Yanok }; 304c642b151SIlya Yanok 305c642b151SIlya Yanok static struct omap_musb_board_data musb_board_data = { 306c642b151SIlya Yanok .interface_type = MUSB_INTERFACE_ULPI, 307c642b151SIlya Yanok }; 308c642b151SIlya Yanok 309c642b151SIlya Yanok static struct musb_hdrc_platform_data musb_plat = { 31095de1e2fSPaul Kocialkowski #if defined(CONFIG_USB_MUSB_HOST) 311c642b151SIlya Yanok .mode = MUSB_HOST, 31295de1e2fSPaul Kocialkowski #elif defined(CONFIG_USB_MUSB_GADGET) 313c642b151SIlya Yanok .mode = MUSB_PERIPHERAL, 314c642b151SIlya Yanok #else 31595de1e2fSPaul Kocialkowski #error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET" 316c642b151SIlya Yanok #endif 317c642b151SIlya Yanok .config = &musb_config, 318c642b151SIlya Yanok .power = 100, 319c642b151SIlya Yanok .platform_ops = &omap2430_ops, 320c642b151SIlya Yanok .board_data = &musb_board_data, 321c642b151SIlya Yanok }; 322c642b151SIlya Yanok #endif 323c642b151SIlya Yanok 3244258aa62SPeter Meerwald /* 3250a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: misc_init_r 3260a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Configure board specific parts 3270a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 3280a0e4badSJean-Christophe PLAGNIOL-VILLARD int misc_init_r(void) 3290a0e4badSJean-Christophe PLAGNIOL-VILLARD { 3300a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; 3310a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; 332f14a522aSJason Kridner struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE; 333548a64d8SNishanth Menon bool generate_fake_mac = false; 33404e2a133SAlexander Kochetkov u32 value; 335d4e53f06SSteve Kipisz 336d4e53f06SSteve Kipisz /* Enable i2c2 pullup resisters */ 33704e2a133SAlexander Kochetkov value = readl(&prog_io_base->io1); 33804e2a133SAlexander Kochetkov value &= ~(PRG_I2C2_PULLUPRESX); 33904e2a133SAlexander Kochetkov writel(value, &prog_io_base->io1); 3400a0e4badSJean-Christophe PLAGNIOL-VILLARD 34106b95bd5SSteve Sakoman switch (get_board_revision()) { 34206b95bd5SSteve Sakoman case REVISION_AXBX: 34306b95bd5SSteve Sakoman printf("Beagle Rev Ax/Bx\n"); 34406b95bd5SSteve Sakoman setenv("beaglerev", "AxBx"); 34506b95bd5SSteve Sakoman break; 34606b95bd5SSteve Sakoman case REVISION_CX: 34706b95bd5SSteve Sakoman printf("Beagle Rev C1/C2/C3\n"); 34806b95bd5SSteve Sakoman setenv("beaglerev", "Cx"); 34906b95bd5SSteve Sakoman MUX_BEAGLE_C(); 35006b95bd5SSteve Sakoman break; 35106b95bd5SSteve Sakoman case REVISION_C4: 35206b95bd5SSteve Sakoman printf("Beagle Rev C4\n"); 35308cbba2aSSteve Sakoman setenv("beaglerev", "C4"); 35406b95bd5SSteve Sakoman MUX_BEAGLE_C(); 35506b95bd5SSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 35606b95bd5SSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 35706b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 35806b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 35906b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 36006b95bd5SSteve Sakoman break; 361af4d896fSNishanth Menon case REVISION_XM_AB: 362af4d896fSNishanth Menon printf("Beagle xM Rev A/B\n"); 363af4d896fSNishanth Menon setenv("beaglerev", "xMAB"); 36408cbba2aSSteve Sakoman MUX_BEAGLE_XM(); 36508cbba2aSSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 36608cbba2aSSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 36708cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 36808cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 36908cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 370548a64d8SNishanth Menon generate_fake_mac = true; 37108cbba2aSSteve Sakoman break; 3721ffcb346SKoen Kooi case REVISION_XM_C: 3731ffcb346SKoen Kooi printf("Beagle xM Rev C\n"); 3741ffcb346SKoen Kooi setenv("beaglerev", "xMC"); 3751ffcb346SKoen Kooi MUX_BEAGLE_XM(); 3761ffcb346SKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 3771ffcb346SKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 3781ffcb346SKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 3791ffcb346SKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 3801ffcb346SKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 381548a64d8SNishanth Menon generate_fake_mac = true; 3821ffcb346SKoen Kooi break; 38306b95bd5SSteve Sakoman default: 38406b95bd5SSteve Sakoman printf("Beagle unknown 0x%02x\n", get_board_revision()); 385f6e593bbSKoen Kooi MUX_BEAGLE_XM(); 386f6e593bbSKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 387f6e593bbSKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 388f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 389f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 390f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 391548a64d8SNishanth Menon generate_fake_mac = true; 39206b95bd5SSteve Sakoman } 39306b95bd5SSteve Sakoman 394ca5f80aeSKoen Kooi switch (get_expansion_id()) { 395ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY: 396ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy board (rev %d %s)\n", 397ca5f80aeSKoen Kooi expansion_config.revision, 398ca5f80aeSKoen Kooi expansion_config.fab_revision); 399ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 400ca5f80aeSKoen Kooi setenv("buddy", "zippy"); 401ca5f80aeSKoen Kooi break; 402ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY2: 403ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", 404ca5f80aeSKoen Kooi expansion_config.revision, 405ca5f80aeSKoen Kooi expansion_config.fab_revision); 406ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 407ca5f80aeSKoen Kooi setenv("buddy", "zippy2"); 408ca5f80aeSKoen Kooi break; 409ca5f80aeSKoen Kooi case TINCANTOOLS_TRAINER: 410ca5f80aeSKoen Kooi printf("Recognized Tincantools Trainer board (rev %d %s)\n", 411ca5f80aeSKoen Kooi expansion_config.revision, 412ca5f80aeSKoen Kooi expansion_config.fab_revision); 413ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 414ca5f80aeSKoen Kooi MUX_TINCANTOOLS_TRAINER(); 415ca5f80aeSKoen Kooi setenv("buddy", "trainer"); 416ca5f80aeSKoen Kooi break; 417ca5f80aeSKoen Kooi case TINCANTOOLS_SHOWDOG: 418ca5f80aeSKoen Kooi printf("Recognized Tincantools Showdow board (rev %d %s)\n", 419ca5f80aeSKoen Kooi expansion_config.revision, 420ca5f80aeSKoen Kooi expansion_config.fab_revision); 421ca5f80aeSKoen Kooi /* Place holder for DSS2 definition for showdog lcd */ 422ca5f80aeSKoen Kooi setenv("defaultdisplay", "showdoglcd"); 423ca5f80aeSKoen Kooi setenv("buddy", "showdog"); 424ca5f80aeSKoen Kooi break; 425ca5f80aeSKoen Kooi case KBADC_BEAGLEFPGA: 426ca5f80aeSKoen Kooi printf("Recognized KBADC Beagle FPGA board\n"); 427ca5f80aeSKoen Kooi MUX_KBADC_BEAGLEFPGA(); 428ca5f80aeSKoen Kooi setenv("buddy", "beaglefpga"); 429ca5f80aeSKoen Kooi break; 430ee8485fdSKoen Kooi case LW_BEAGLETOUCH: 431ee8485fdSKoen Kooi printf("Recognized Liquidware BeagleTouch board\n"); 432ee8485fdSKoen Kooi setenv("buddy", "beagletouch"); 433ee8485fdSKoen Kooi break; 434ee8485fdSKoen Kooi case BRAINMUX_LCDOG: 435ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog board\n"); 436ee8485fdSKoen Kooi setenv("buddy", "lcdog"); 437ee8485fdSKoen Kooi break; 438ee8485fdSKoen Kooi case BRAINMUX_LCDOGTOUCH: 439ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog Touch board\n"); 440ee8485fdSKoen Kooi setenv("buddy", "lcdogtouch"); 441ee8485fdSKoen Kooi break; 442ee8485fdSKoen Kooi case BBTOYS_WIFI: 443ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys WiFi board\n"); 444ee8485fdSKoen Kooi MUX_BBTOYS_WIFI() 445ee8485fdSKoen Kooi setenv("buddy", "bbtoys-wifi"); 446ee8485fdSKoen Kooi break;; 447ee8485fdSKoen Kooi case BBTOYS_VGA: 448ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys VGA board\n"); 449ee8485fdSKoen Kooi break;; 450ee8485fdSKoen Kooi case BBTOYS_LCD: 451ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys LCD board\n"); 452ee8485fdSKoen Kooi break;; 4536cce5504SPeter Meerwald case BCT_BRETTL3: 4546cce5504SPeter Meerwald printf("Recognized bct electronic GmbH brettl3 board\n"); 4556cce5504SPeter Meerwald break; 456ef88e609SPeter Meerwald case BCT_BRETTL4: 457ef88e609SPeter Meerwald printf("Recognized bct electronic GmbH brettl4 board\n"); 458ef88e609SPeter Meerwald break; 4598a1f2dc0Srobertcnelson@gmail.com case LSR_COM6L_ADPT: 4608a1f2dc0Srobertcnelson@gmail.com printf("Recognized LSR COM6L Adapter Board\n"); 4618a1f2dc0Srobertcnelson@gmail.com MUX_BBTOYS_WIFI() 4628a1f2dc0Srobertcnelson@gmail.com setenv("buddy", "lsr-com6l-adpt"); 4638a1f2dc0Srobertcnelson@gmail.com break; 464ca5f80aeSKoen Kooi case BEAGLE_NO_EEPROM: 465ca5f80aeSKoen Kooi printf("No EEPROM on expansion board\n"); 466ca5f80aeSKoen Kooi setenv("buddy", "none"); 467ca5f80aeSKoen Kooi break; 468ca5f80aeSKoen Kooi default: 469ca5f80aeSKoen Kooi printf("Unrecognized expansion board: %x\n", 470ca5f80aeSKoen Kooi expansion_config.device_vendor); 471ca5f80aeSKoen Kooi setenv("buddy", "unknown"); 472ca5f80aeSKoen Kooi } 473ca5f80aeSKoen Kooi 474ca5f80aeSKoen Kooi if (expansion_config.content == 1) 475ca5f80aeSKoen Kooi setenv(expansion_config.env_var, expansion_config.env_setting); 476ca5f80aeSKoen Kooi 4770a0e4badSJean-Christophe PLAGNIOL-VILLARD twl4030_power_init(); 47838a77c3aSChristian Spielberger switch (get_board_revision()) { 479af4d896fSNishanth Menon case REVISION_XM_AB: 48038a77c3aSChristian Spielberger twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); 48138a77c3aSChristian Spielberger break; 48238a77c3aSChristian Spielberger default: 483ead39d7aSGrazvydas Ignotas twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 48438a77c3aSChristian Spielberger break; 48538a77c3aSChristian Spielberger } 4860a0e4badSJean-Christophe PLAGNIOL-VILLARD 48752d82e40SBob Feretich /* Set GPIO states before they are made outputs */ 4880a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, 4890a0e4badSJean-Christophe PLAGNIOL-VILLARD &gpio6_base->setdataout); 4900a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 4910a0e4badSJean-Christophe PLAGNIOL-VILLARD GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); 4920a0e4badSJean-Christophe PLAGNIOL-VILLARD 49352d82e40SBob Feretich /* Configure GPIOs to output */ 49452d82e40SBob Feretich writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); 49552d82e40SBob Feretich writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 49652d82e40SBob Feretich GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); 49752d82e40SBob Feretich 498679f82c3SPaul Kocialkowski omap_die_id_display(); 4994258aa62SPeter Meerwald 5002c30c184SPeter Meerwald #ifdef CONFIG_VIDEO_OMAP3 5014258aa62SPeter Meerwald beagle_dvi_pup(); 5023f16ab91SJason Kridner beagle_display_init(); 5033f16ab91SJason Kridner omap3_dss_enable(); 5042c30c184SPeter Meerwald #endif 5050a0e4badSJean-Christophe PLAGNIOL-VILLARD 506c642b151SIlya Yanok #ifdef CONFIG_USB_MUSB_OMAP2PLUS 507c642b151SIlya Yanok musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); 508c642b151SIlya Yanok #endif 509c642b151SIlya Yanok 51007815eb9SPaul Kocialkowski if (generate_fake_mac) 51107815eb9SPaul Kocialkowski omap_die_id_usbethaddr(); 512548a64d8SNishanth Menon 5130a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 5140a0e4badSJean-Christophe PLAGNIOL-VILLARD } 5150a0e4badSJean-Christophe PLAGNIOL-VILLARD 5160a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 5170a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: set_muxconf_regs 5180a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Setting up the configuration Mux registers specific to the 5190a0e4badSJean-Christophe PLAGNIOL-VILLARD * hardware. Many pins need to be moved from protect to primary 5200a0e4badSJean-Christophe PLAGNIOL-VILLARD * mode. 5210a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 5220a0e4badSJean-Christophe PLAGNIOL-VILLARD void set_muxconf_regs(void) 5230a0e4badSJean-Christophe PLAGNIOL-VILLARD { 5240a0e4badSJean-Christophe PLAGNIOL-VILLARD MUX_BEAGLE(); 5250a0e4badSJean-Christophe PLAGNIOL-VILLARD } 5260cd31144SSteve Sakoman 52775c57a35STom Rini #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 5280cd31144SSteve Sakoman int board_mmc_init(bd_t *bis) 5290cd31144SSteve Sakoman { 530e3913f56SNikita Kiryanov return omap_mmc_init(0, 0, 0, -1, -1); 5310cd31144SSteve Sakoman } 5320cd31144SSteve Sakoman #endif 533d90859a6SAlexander Holler 534aac5450eSPaul Kocialkowski #if defined(CONFIG_GENERIC_MMC) 535aac5450eSPaul Kocialkowski void board_mmc_power_init(void) 536aac5450eSPaul Kocialkowski { 537aac5450eSPaul Kocialkowski twl4030_power_mmc_init(0); 538aac5450eSPaul Kocialkowski } 539aac5450eSPaul Kocialkowski #endif 540aac5450eSPaul Kocialkowski 5417ac2fe2dSIlya Yanok #if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD) 542d90859a6SAlexander Holler /* Call usb_stop() before starting the kernel */ 543d90859a6SAlexander Holler void show_boot_progress(int val) 544d90859a6SAlexander Holler { 545578ac1e9SSimon Glass if (val == BOOTSTAGE_ID_RUN_OS) 546d90859a6SAlexander Holler usb_stop(); 547d90859a6SAlexander Holler } 54843b62393SGovindraj.R 54943b62393SGovindraj.R static struct omap_usbhs_board_data usbhs_bdata = { 55043b62393SGovindraj.R .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 55143b62393SGovindraj.R .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 55243b62393SGovindraj.R .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED 55343b62393SGovindraj.R }; 55443b62393SGovindraj.R 555127efc4fSTroy Kisky int ehci_hcd_init(int index, enum usb_init_type init, 556127efc4fSTroy Kisky struct ehci_hccr **hccr, struct ehci_hcor **hcor) 55743b62393SGovindraj.R { 55816297cfbSMateusz Zalega return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); 55943b62393SGovindraj.R } 56043b62393SGovindraj.R 561676ae068SLucas Stach int ehci_hcd_stop(int index) 56243b62393SGovindraj.R { 56343b62393SGovindraj.R return omap_ehci_hcd_stop(); 56443b62393SGovindraj.R } 56543b62393SGovindraj.R 566d90859a6SAlexander Holler #endif /* CONFIG_USB_EHCI */ 567c642b151SIlya Yanok 56895de1e2fSPaul Kocialkowski #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) 569c642b151SIlya Yanok int board_eth_init(bd_t *bis) 570c642b151SIlya Yanok { 571c642b151SIlya Yanok return usb_eth_initialize(bis); 572c642b151SIlya Yanok } 573c642b151SIlya Yanok #endif 574