10a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 275c57a35STom Rini * (C) Copyright 2004-2011 30a0e4badSJean-Christophe PLAGNIOL-VILLARD * Texas Instruments, <www.ti.com> 40a0e4badSJean-Christophe PLAGNIOL-VILLARD * 50a0e4badSJean-Christophe PLAGNIOL-VILLARD * Author : 60a0e4badSJean-Christophe PLAGNIOL-VILLARD * Sunil Kumar <sunilsaini05@gmail.com> 70a0e4badSJean-Christophe PLAGNIOL-VILLARD * Shashi Ranjan <shashiranjanmca05@gmail.com> 80a0e4badSJean-Christophe PLAGNIOL-VILLARD * 90a0e4badSJean-Christophe PLAGNIOL-VILLARD * Derived from Beagle Board and 3430 SDP code by 100a0e4badSJean-Christophe PLAGNIOL-VILLARD * Richard Woodruff <r-woodruff2@ti.com> 110a0e4badSJean-Christophe PLAGNIOL-VILLARD * Syed Mohammed Khasim <khasim@ti.com> 120a0e4badSJean-Christophe PLAGNIOL-VILLARD * 130a0e4badSJean-Christophe PLAGNIOL-VILLARD * 141a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 150a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 160a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 1770d8c944SJason Kridner #ifdef CONFIG_STATUS_LED 1870d8c944SJason Kridner #include <status_led.h> 1970d8c944SJason Kridner #endif 200a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <twl4030.h> 2175c57a35STom Rini #include <linux/mtd/nand.h> 220a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/io.h> 230cd31144SSteve Sakoman #include <asm/arch/mmc_host_def.h> 240a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/mux.h> 2575c57a35STom Rini #include <asm/arch/mem.h> 260a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/arch/sys_proto.h> 2784c3b631SSanjeev Premi #include <asm/gpio.h> 280a0e4badSJean-Christophe PLAGNIOL-VILLARD #include <asm/mach-types.h> 29c642b151SIlya Yanok #include <asm/omap_musb.h> 30c642b151SIlya Yanok #include <asm/errno.h> 31c642b151SIlya Yanok #include <linux/usb/ch9.h> 32c642b151SIlya Yanok #include <linux/usb/gadget.h> 33c642b151SIlya Yanok #include <linux/usb/musb.h> 340a0e4badSJean-Christophe PLAGNIOL-VILLARD #include "beagle.h" 35f835ea71SJason Kridner #include <command.h> 360a0e4badSJean-Christophe PLAGNIOL-VILLARD 3743b62393SGovindraj.R #ifdef CONFIG_USB_EHCI 3843b62393SGovindraj.R #include <usb.h> 3943b62393SGovindraj.R #include <asm/ehci-omap.h> 4043b62393SGovindraj.R #endif 4143b62393SGovindraj.R 42ca5f80aeSKoen Kooi #define TWL4030_I2C_BUS 0 43ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_BUS 1 44ca5f80aeSKoen Kooi #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 45ca5f80aeSKoen Kooi 46ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY 0x01000100 47ca5f80aeSKoen Kooi #define TINCANTOOLS_ZIPPY2 0x02000100 48ca5f80aeSKoen Kooi #define TINCANTOOLS_TRAINER 0x04000100 49ca5f80aeSKoen Kooi #define TINCANTOOLS_SHOWDOG 0x03000100 50ca5f80aeSKoen Kooi #define KBADC_BEAGLEFPGA 0x01000600 51ee8485fdSKoen Kooi #define LW_BEAGLETOUCH 0x01000700 52ee8485fdSKoen Kooi #define BRAINMUX_LCDOG 0x01000800 53ee8485fdSKoen Kooi #define BRAINMUX_LCDOGTOUCH 0x02000800 54ee8485fdSKoen Kooi #define BBTOYS_WIFI 0x01000B00 55ee8485fdSKoen Kooi #define BBTOYS_VGA 0x02000B00 56ee8485fdSKoen Kooi #define BBTOYS_LCD 0x03000B00 576cce5504SPeter Meerwald #define BCT_BRETTL3 0x01000F00 58ef88e609SPeter Meerwald #define BCT_BRETTL4 0x02000F00 598a1f2dc0Srobertcnelson@gmail.com #define LSR_COM6L_ADPT 0x01001300 60ca5f80aeSKoen Kooi #define BEAGLE_NO_EEPROM 0xffffffff 61ca5f80aeSKoen Kooi 6229565326SJohn Rigby DECLARE_GLOBAL_DATA_PTR; 6329565326SJohn Rigby 64ca5f80aeSKoen Kooi static struct { 65ca5f80aeSKoen Kooi unsigned int device_vendor; 66ca5f80aeSKoen Kooi unsigned char revision; 67ca5f80aeSKoen Kooi unsigned char content; 68ca5f80aeSKoen Kooi char fab_revision[8]; 69ca5f80aeSKoen Kooi char env_var[16]; 70ca5f80aeSKoen Kooi char env_setting[64]; 71ca5f80aeSKoen Kooi } expansion_config; 72ca5f80aeSKoen Kooi 730a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 740a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: board_init 750a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Early hardware init. 760a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 770a0e4badSJean-Christophe PLAGNIOL-VILLARD int board_init(void) 780a0e4badSJean-Christophe PLAGNIOL-VILLARD { 790a0e4badSJean-Christophe PLAGNIOL-VILLARD gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 800a0e4badSJean-Christophe PLAGNIOL-VILLARD /* board id for Linux */ 810a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; 820a0e4badSJean-Christophe PLAGNIOL-VILLARD /* boot param addr */ 830a0e4badSJean-Christophe PLAGNIOL-VILLARD gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 840a0e4badSJean-Christophe PLAGNIOL-VILLARD 8570d8c944SJason Kridner #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) 8670d8c944SJason Kridner status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); 8770d8c944SJason Kridner #endif 8870d8c944SJason Kridner 890a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 900a0e4badSJean-Christophe PLAGNIOL-VILLARD } 910a0e4badSJean-Christophe PLAGNIOL-VILLARD 920a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 9306b95bd5SSteve Sakoman * Routine: get_board_revision 9406b95bd5SSteve Sakoman * Description: Detect if we are running on a Beagle revision Ax/Bx, 958ce4e5f9STom Rini * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading 9606b95bd5SSteve Sakoman * the level of GPIO173, GPIO172 and GPIO171. This should 9706b95bd5SSteve Sakoman * result in 9806b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx 9906b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 10006b95bd5SSteve Sakoman * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 1018ce4e5f9STom Rini * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx 1028ce4e5f9STom Rini * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx 1030a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 104fff1a572SPeter Meerwald static int get_board_revision(void) 1050a0e4badSJean-Christophe PLAGNIOL-VILLARD { 10606b95bd5SSteve Sakoman int revision; 1070a0e4badSJean-Christophe PLAGNIOL-VILLARD 10884c3b631SSanjeev Premi if (!gpio_request(171, "") && 10984c3b631SSanjeev Premi !gpio_request(172, "") && 11084c3b631SSanjeev Premi !gpio_request(173, "")) { 1110a0e4badSJean-Christophe PLAGNIOL-VILLARD 11284c3b631SSanjeev Premi gpio_direction_input(171); 11384c3b631SSanjeev Premi gpio_direction_input(172); 11484c3b631SSanjeev Premi gpio_direction_input(173); 1150a0e4badSJean-Christophe PLAGNIOL-VILLARD 11684c3b631SSanjeev Premi revision = gpio_get_value(173) << 2 | 11784c3b631SSanjeev Premi gpio_get_value(172) << 1 | 11884c3b631SSanjeev Premi gpio_get_value(171); 11906b95bd5SSteve Sakoman } else { 12006b95bd5SSteve Sakoman printf("Error: unable to acquire board revision GPIOs\n"); 12106b95bd5SSteve Sakoman revision = -1; 1220a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1230a0e4badSJean-Christophe PLAGNIOL-VILLARD 12406b95bd5SSteve Sakoman return revision; 1250a0e4badSJean-Christophe PLAGNIOL-VILLARD } 1260a0e4badSJean-Christophe PLAGNIOL-VILLARD 12775c57a35STom Rini #ifdef CONFIG_SPL_BUILD 12875c57a35STom Rini /* 12975c57a35STom Rini * Routine: get_board_mem_timings 13075c57a35STom Rini * Description: If we use SPL then there is no x-loader nor config header 13175c57a35STom Rini * so we have to setup the DDR timings ourself on both banks. 13275c57a35STom Rini */ 1338c4445d2SPeter Barada void get_board_mem_timings(struct board_sdrc_timings *timings) 13475c57a35STom Rini { 13575c57a35STom Rini int pop_mfr, pop_id; 13675c57a35STom Rini 13775c57a35STom Rini /* 13875c57a35STom Rini * We need to identify what PoP memory is on the board so that 13975c57a35STom Rini * we know what timings to use. If we can't identify it then 14075c57a35STom Rini * we know it's an xM. To map the ID values please see nand_ids.c 14175c57a35STom Rini */ 14275c57a35STom Rini identify_nand_chip(&pop_mfr, &pop_id); 14375c57a35STom Rini 1448c4445d2SPeter Barada timings->mr = MICRON_V_MR_165; 14575c57a35STom Rini switch (get_board_revision()) { 14675c57a35STom Rini case REVISION_C4: 14775c57a35STom Rini if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { 14875c57a35STom Rini /* 512MB DDR */ 1498c4445d2SPeter Barada timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 1508c4445d2SPeter Barada timings->ctrla = NUMONYX_V_ACTIMA_165; 1518c4445d2SPeter Barada timings->ctrlb = NUMONYX_V_ACTIMB_165; 1528c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 15375c57a35STom Rini break; 154223b8aa4Srobertcnelson@gmail.com } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { 155223b8aa4Srobertcnelson@gmail.com /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ 1568c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_165(128 << 20); 1578c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_165; 1588c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_165; 1598c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 160223b8aa4Srobertcnelson@gmail.com break; 16175c57a35STom Rini } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { 16275c57a35STom Rini /* Beagleboard Rev C5, 256MB DDR */ 1638c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_200(256 << 20); 1648c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_200; 1658c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_200; 1668c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 16775c57a35STom Rini break; 16875c57a35STom Rini } 169af4d896fSNishanth Menon case REVISION_XM_AB: 17075c57a35STom Rini case REVISION_XM_C: 17175c57a35STom Rini if (pop_mfr == 0) { 17275c57a35STom Rini /* 256MB DDR */ 1738c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_200(256 << 20); 1748c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_200; 1758c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_200; 1768c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 17775c57a35STom Rini } else { 17875c57a35STom Rini /* 512MB DDR */ 1798c4445d2SPeter Barada timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 1808c4445d2SPeter Barada timings->ctrla = NUMONYX_V_ACTIMA_165; 1818c4445d2SPeter Barada timings->ctrlb = NUMONYX_V_ACTIMB_165; 1828c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 18375c57a35STom Rini } 18475c57a35STom Rini break; 18575c57a35STom Rini default: 18675c57a35STom Rini /* Assume 128MB and Micron/165MHz timings to be safe */ 1878c4445d2SPeter Barada timings->mcfg = MICRON_V_MCFG_165(128 << 20); 1888c4445d2SPeter Barada timings->ctrla = MICRON_V_ACTIMA_165; 1898c4445d2SPeter Barada timings->ctrlb = MICRON_V_ACTIMB_165; 1908c4445d2SPeter Barada timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 19175c57a35STom Rini } 19275c57a35STom Rini } 19375c57a35STom Rini #endif 19475c57a35STom Rini 1950a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 196ca5f80aeSKoen Kooi * Routine: get_expansion_id 197ca5f80aeSKoen Kooi * Description: This function checks for expansion board by checking I2C 198ca5f80aeSKoen Kooi * bus 1 for the availability of an AT24C01B serial EEPROM. 199ca5f80aeSKoen Kooi * returns the device_vendor field from the EEPROM 200ca5f80aeSKoen Kooi */ 201fff1a572SPeter Meerwald static unsigned int get_expansion_id(void) 202ca5f80aeSKoen Kooi { 203ca5f80aeSKoen Kooi i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 204ca5f80aeSKoen Kooi 205ca5f80aeSKoen Kooi /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ 206ca5f80aeSKoen Kooi if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 207ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 208ca5f80aeSKoen Kooi return BEAGLE_NO_EEPROM; 209ca5f80aeSKoen Kooi } 210ca5f80aeSKoen Kooi 211ca5f80aeSKoen Kooi /* read configuration data */ 212ca5f80aeSKoen Kooi i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 213ca5f80aeSKoen Kooi sizeof(expansion_config)); 214ca5f80aeSKoen Kooi 215ff229ecfSrobertcnelson@gmail.com /* retry reading configuration data with 16bit addressing */ 216ff229ecfSrobertcnelson@gmail.com if ((expansion_config.device_vendor == 0xFFFFFF00) || 217ff229ecfSrobertcnelson@gmail.com (expansion_config.device_vendor == 0xFFFFFFFF)) { 218ff229ecfSrobertcnelson@gmail.com printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); 219ff229ecfSrobertcnelson@gmail.com i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, 220ff229ecfSrobertcnelson@gmail.com sizeof(expansion_config)); 221ff229ecfSrobertcnelson@gmail.com } 222ff229ecfSrobertcnelson@gmail.com 223ca5f80aeSKoen Kooi i2c_set_bus_num(TWL4030_I2C_BUS); 224ca5f80aeSKoen Kooi 225ca5f80aeSKoen Kooi return expansion_config.device_vendor; 226ca5f80aeSKoen Kooi } 227ca5f80aeSKoen Kooi 2282c30c184SPeter Meerwald #ifdef CONFIG_VIDEO_OMAP3 229ca5f80aeSKoen Kooi /* 2303f16ab91SJason Kridner * Configure DSS to display background color on DVID 2313f16ab91SJason Kridner * Configure VENC to display color bar on S-Video 2323f16ab91SJason Kridner */ 233fff1a572SPeter Meerwald static void beagle_display_init(void) 2343f16ab91SJason Kridner { 2353f16ab91SJason Kridner omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH); 2363f16ab91SJason Kridner switch (get_board_revision()) { 2373f16ab91SJason Kridner case REVISION_AXBX: 2383f16ab91SJason Kridner case REVISION_CX: 2393f16ab91SJason Kridner case REVISION_C4: 2403f16ab91SJason Kridner omap3_dss_panel_config(&dvid_cfg); 2413f16ab91SJason Kridner break; 242af4d896fSNishanth Menon case REVISION_XM_AB: 2433f16ab91SJason Kridner case REVISION_XM_C: 2443f16ab91SJason Kridner default: 2453f16ab91SJason Kridner omap3_dss_panel_config(&dvid_cfg_xm); 2463f16ab91SJason Kridner break; 2473f16ab91SJason Kridner } 2483f16ab91SJason Kridner } 2493f16ab91SJason Kridner 2503f16ab91SJason Kridner /* 2514258aa62SPeter Meerwald * Enable DVI power 2524258aa62SPeter Meerwald */ 2533fbc6931SAnatolij Gustschin static void beagle_dvi_pup(void) 2543fbc6931SAnatolij Gustschin { 2554258aa62SPeter Meerwald uchar val; 2564258aa62SPeter Meerwald 2574258aa62SPeter Meerwald switch (get_board_revision()) { 2584258aa62SPeter Meerwald case REVISION_AXBX: 2594258aa62SPeter Meerwald case REVISION_CX: 2604258aa62SPeter Meerwald case REVISION_C4: 2614258aa62SPeter Meerwald gpio_request(170, ""); 2624258aa62SPeter Meerwald gpio_direction_output(170, 0); 2634258aa62SPeter Meerwald gpio_set_value(170, 1); 2644258aa62SPeter Meerwald break; 265af4d896fSNishanth Menon case REVISION_XM_AB: 2664258aa62SPeter Meerwald case REVISION_XM_C: 2674258aa62SPeter Meerwald default: 2684258aa62SPeter Meerwald #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3) 2694258aa62SPeter Meerwald #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6) 2704258aa62SPeter Meerwald 2714258aa62SPeter Meerwald i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 2724258aa62SPeter Meerwald val |= 4; 2734258aa62SPeter Meerwald i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 2744258aa62SPeter Meerwald 2754258aa62SPeter Meerwald i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 2764258aa62SPeter Meerwald val |= 4; 2774258aa62SPeter Meerwald i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 2784258aa62SPeter Meerwald break; 2794258aa62SPeter Meerwald } 2804258aa62SPeter Meerwald } 2812c30c184SPeter Meerwald #endif 2824258aa62SPeter Meerwald 283c642b151SIlya Yanok #ifdef CONFIG_USB_MUSB_OMAP2PLUS 284c642b151SIlya Yanok static struct musb_hdrc_config musb_config = { 285c642b151SIlya Yanok .multipoint = 1, 286c642b151SIlya Yanok .dyn_fifo = 1, 287c642b151SIlya Yanok .num_eps = 16, 288c642b151SIlya Yanok .ram_bits = 12, 289c642b151SIlya Yanok }; 290c642b151SIlya Yanok 291c642b151SIlya Yanok static struct omap_musb_board_data musb_board_data = { 292c642b151SIlya Yanok .interface_type = MUSB_INTERFACE_ULPI, 293c642b151SIlya Yanok }; 294c642b151SIlya Yanok 295c642b151SIlya Yanok static struct musb_hdrc_platform_data musb_plat = { 296c642b151SIlya Yanok #if defined(CONFIG_MUSB_HOST) 297c642b151SIlya Yanok .mode = MUSB_HOST, 298c642b151SIlya Yanok #elif defined(CONFIG_MUSB_GADGET) 299c642b151SIlya Yanok .mode = MUSB_PERIPHERAL, 300c642b151SIlya Yanok #else 301c642b151SIlya Yanok #error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET" 302c642b151SIlya Yanok #endif 303c642b151SIlya Yanok .config = &musb_config, 304c642b151SIlya Yanok .power = 100, 305c642b151SIlya Yanok .platform_ops = &omap2430_ops, 306c642b151SIlya Yanok .board_data = &musb_board_data, 307c642b151SIlya Yanok }; 308c642b151SIlya Yanok #endif 309c642b151SIlya Yanok 3104258aa62SPeter Meerwald /* 3110a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: misc_init_r 3120a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Configure board specific parts 3130a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 3140a0e4badSJean-Christophe PLAGNIOL-VILLARD int misc_init_r(void) 3150a0e4badSJean-Christophe PLAGNIOL-VILLARD { 3160a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; 3170a0e4badSJean-Christophe PLAGNIOL-VILLARD struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; 318f14a522aSJason Kridner struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE; 319d4e53f06SSteve Kipisz 320d4e53f06SSteve Kipisz /* Enable i2c2 pullup resisters */ 321d4e53f06SSteve Kipisz writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1); 3220a0e4badSJean-Christophe PLAGNIOL-VILLARD 32306b95bd5SSteve Sakoman switch (get_board_revision()) { 32406b95bd5SSteve Sakoman case REVISION_AXBX: 32506b95bd5SSteve Sakoman printf("Beagle Rev Ax/Bx\n"); 32606b95bd5SSteve Sakoman setenv("beaglerev", "AxBx"); 32706b95bd5SSteve Sakoman break; 32806b95bd5SSteve Sakoman case REVISION_CX: 32906b95bd5SSteve Sakoman printf("Beagle Rev C1/C2/C3\n"); 33006b95bd5SSteve Sakoman setenv("beaglerev", "Cx"); 33106b95bd5SSteve Sakoman MUX_BEAGLE_C(); 33206b95bd5SSteve Sakoman break; 33306b95bd5SSteve Sakoman case REVISION_C4: 33406b95bd5SSteve Sakoman printf("Beagle Rev C4\n"); 33508cbba2aSSteve Sakoman setenv("beaglerev", "C4"); 33606b95bd5SSteve Sakoman MUX_BEAGLE_C(); 33706b95bd5SSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 33806b95bd5SSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 33906b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 34006b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 34106b95bd5SSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 34206b95bd5SSteve Sakoman break; 343af4d896fSNishanth Menon case REVISION_XM_AB: 344af4d896fSNishanth Menon printf("Beagle xM Rev A/B\n"); 345af4d896fSNishanth Menon setenv("beaglerev", "xMAB"); 34608cbba2aSSteve Sakoman MUX_BEAGLE_XM(); 34708cbba2aSSteve Sakoman /* Set VAUX2 to 1.8V for EHCI PHY */ 34808cbba2aSSteve Sakoman twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 34908cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 35008cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 35108cbba2aSSteve Sakoman TWL4030_PM_RECEIVER_DEV_GRP_P1); 35208cbba2aSSteve Sakoman break; 3531ffcb346SKoen Kooi case REVISION_XM_C: 3541ffcb346SKoen Kooi printf("Beagle xM Rev C\n"); 3551ffcb346SKoen Kooi setenv("beaglerev", "xMC"); 3561ffcb346SKoen Kooi MUX_BEAGLE_XM(); 3571ffcb346SKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 3581ffcb346SKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 3591ffcb346SKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 3601ffcb346SKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 3611ffcb346SKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 3621ffcb346SKoen Kooi break; 36306b95bd5SSteve Sakoman default: 36406b95bd5SSteve Sakoman printf("Beagle unknown 0x%02x\n", get_board_revision()); 365f6e593bbSKoen Kooi MUX_BEAGLE_XM(); 366f6e593bbSKoen Kooi /* Set VAUX2 to 1.8V for EHCI PHY */ 367f6e593bbSKoen Kooi twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 368f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 369f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 370f6e593bbSKoen Kooi TWL4030_PM_RECEIVER_DEV_GRP_P1); 37106b95bd5SSteve Sakoman } 37206b95bd5SSteve Sakoman 373ca5f80aeSKoen Kooi switch (get_expansion_id()) { 374ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY: 375ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy board (rev %d %s)\n", 376ca5f80aeSKoen Kooi expansion_config.revision, 377ca5f80aeSKoen Kooi expansion_config.fab_revision); 378ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 379ca5f80aeSKoen Kooi setenv("buddy", "zippy"); 380ca5f80aeSKoen Kooi break; 381ca5f80aeSKoen Kooi case TINCANTOOLS_ZIPPY2: 382ca5f80aeSKoen Kooi printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", 383ca5f80aeSKoen Kooi expansion_config.revision, 384ca5f80aeSKoen Kooi expansion_config.fab_revision); 385ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 386ca5f80aeSKoen Kooi setenv("buddy", "zippy2"); 387ca5f80aeSKoen Kooi break; 388ca5f80aeSKoen Kooi case TINCANTOOLS_TRAINER: 389ca5f80aeSKoen Kooi printf("Recognized Tincantools Trainer board (rev %d %s)\n", 390ca5f80aeSKoen Kooi expansion_config.revision, 391ca5f80aeSKoen Kooi expansion_config.fab_revision); 392ca5f80aeSKoen Kooi MUX_TINCANTOOLS_ZIPPY(); 393ca5f80aeSKoen Kooi MUX_TINCANTOOLS_TRAINER(); 394ca5f80aeSKoen Kooi setenv("buddy", "trainer"); 395ca5f80aeSKoen Kooi break; 396ca5f80aeSKoen Kooi case TINCANTOOLS_SHOWDOG: 397ca5f80aeSKoen Kooi printf("Recognized Tincantools Showdow board (rev %d %s)\n", 398ca5f80aeSKoen Kooi expansion_config.revision, 399ca5f80aeSKoen Kooi expansion_config.fab_revision); 400ca5f80aeSKoen Kooi /* Place holder for DSS2 definition for showdog lcd */ 401ca5f80aeSKoen Kooi setenv("defaultdisplay", "showdoglcd"); 402ca5f80aeSKoen Kooi setenv("buddy", "showdog"); 403ca5f80aeSKoen Kooi break; 404ca5f80aeSKoen Kooi case KBADC_BEAGLEFPGA: 405ca5f80aeSKoen Kooi printf("Recognized KBADC Beagle FPGA board\n"); 406ca5f80aeSKoen Kooi MUX_KBADC_BEAGLEFPGA(); 407ca5f80aeSKoen Kooi setenv("buddy", "beaglefpga"); 408ca5f80aeSKoen Kooi break; 409ee8485fdSKoen Kooi case LW_BEAGLETOUCH: 410ee8485fdSKoen Kooi printf("Recognized Liquidware BeagleTouch board\n"); 411ee8485fdSKoen Kooi setenv("buddy", "beagletouch"); 412ee8485fdSKoen Kooi break; 413ee8485fdSKoen Kooi case BRAINMUX_LCDOG: 414ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog board\n"); 415ee8485fdSKoen Kooi setenv("buddy", "lcdog"); 416ee8485fdSKoen Kooi break; 417ee8485fdSKoen Kooi case BRAINMUX_LCDOGTOUCH: 418ee8485fdSKoen Kooi printf("Recognized Brainmux LCDog Touch board\n"); 419ee8485fdSKoen Kooi setenv("buddy", "lcdogtouch"); 420ee8485fdSKoen Kooi break; 421ee8485fdSKoen Kooi case BBTOYS_WIFI: 422ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys WiFi board\n"); 423ee8485fdSKoen Kooi MUX_BBTOYS_WIFI() 424ee8485fdSKoen Kooi setenv("buddy", "bbtoys-wifi"); 425ee8485fdSKoen Kooi break;; 426ee8485fdSKoen Kooi case BBTOYS_VGA: 427ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys VGA board\n"); 428ee8485fdSKoen Kooi break;; 429ee8485fdSKoen Kooi case BBTOYS_LCD: 430ee8485fdSKoen Kooi printf("Recognized BeagleBoardToys LCD board\n"); 431ee8485fdSKoen Kooi break;; 4326cce5504SPeter Meerwald case BCT_BRETTL3: 4336cce5504SPeter Meerwald printf("Recognized bct electronic GmbH brettl3 board\n"); 4346cce5504SPeter Meerwald break; 435ef88e609SPeter Meerwald case BCT_BRETTL4: 436ef88e609SPeter Meerwald printf("Recognized bct electronic GmbH brettl4 board\n"); 437ef88e609SPeter Meerwald break; 4388a1f2dc0Srobertcnelson@gmail.com case LSR_COM6L_ADPT: 4398a1f2dc0Srobertcnelson@gmail.com printf("Recognized LSR COM6L Adapter Board\n"); 4408a1f2dc0Srobertcnelson@gmail.com MUX_BBTOYS_WIFI() 4418a1f2dc0Srobertcnelson@gmail.com setenv("buddy", "lsr-com6l-adpt"); 4428a1f2dc0Srobertcnelson@gmail.com break; 443ca5f80aeSKoen Kooi case BEAGLE_NO_EEPROM: 444ca5f80aeSKoen Kooi printf("No EEPROM on expansion board\n"); 445ca5f80aeSKoen Kooi setenv("buddy", "none"); 446ca5f80aeSKoen Kooi break; 447ca5f80aeSKoen Kooi default: 448ca5f80aeSKoen Kooi printf("Unrecognized expansion board: %x\n", 449ca5f80aeSKoen Kooi expansion_config.device_vendor); 450ca5f80aeSKoen Kooi setenv("buddy", "unknown"); 451ca5f80aeSKoen Kooi } 452ca5f80aeSKoen Kooi 453ca5f80aeSKoen Kooi if (expansion_config.content == 1) 454ca5f80aeSKoen Kooi setenv(expansion_config.env_var, expansion_config.env_setting); 455ca5f80aeSKoen Kooi 4560a0e4badSJean-Christophe PLAGNIOL-VILLARD twl4030_power_init(); 45738a77c3aSChristian Spielberger switch (get_board_revision()) { 458af4d896fSNishanth Menon case REVISION_XM_AB: 45938a77c3aSChristian Spielberger twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); 46038a77c3aSChristian Spielberger break; 46138a77c3aSChristian Spielberger default: 462ead39d7aSGrazvydas Ignotas twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 46338a77c3aSChristian Spielberger break; 46438a77c3aSChristian Spielberger } 4650a0e4badSJean-Christophe PLAGNIOL-VILLARD 46652d82e40SBob Feretich /* Set GPIO states before they are made outputs */ 4670a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, 4680a0e4badSJean-Christophe PLAGNIOL-VILLARD &gpio6_base->setdataout); 4690a0e4badSJean-Christophe PLAGNIOL-VILLARD writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 4700a0e4badSJean-Christophe PLAGNIOL-VILLARD GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); 4710a0e4badSJean-Christophe PLAGNIOL-VILLARD 47252d82e40SBob Feretich /* Configure GPIOs to output */ 47352d82e40SBob Feretich writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); 47452d82e40SBob Feretich writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 47552d82e40SBob Feretich GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); 47652d82e40SBob Feretich 4770a0e4badSJean-Christophe PLAGNIOL-VILLARD dieid_num_r(); 4784258aa62SPeter Meerwald 4792c30c184SPeter Meerwald #ifdef CONFIG_VIDEO_OMAP3 4804258aa62SPeter Meerwald beagle_dvi_pup(); 4813f16ab91SJason Kridner beagle_display_init(); 4823f16ab91SJason Kridner omap3_dss_enable(); 4832c30c184SPeter Meerwald #endif 4840a0e4badSJean-Christophe PLAGNIOL-VILLARD 485c642b151SIlya Yanok #ifdef CONFIG_USB_MUSB_OMAP2PLUS 486c642b151SIlya Yanok musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); 487c642b151SIlya Yanok #endif 488c642b151SIlya Yanok 4890a0e4badSJean-Christophe PLAGNIOL-VILLARD return 0; 4900a0e4badSJean-Christophe PLAGNIOL-VILLARD } 4910a0e4badSJean-Christophe PLAGNIOL-VILLARD 4920a0e4badSJean-Christophe PLAGNIOL-VILLARD /* 4930a0e4badSJean-Christophe PLAGNIOL-VILLARD * Routine: set_muxconf_regs 4940a0e4badSJean-Christophe PLAGNIOL-VILLARD * Description: Setting up the configuration Mux registers specific to the 4950a0e4badSJean-Christophe PLAGNIOL-VILLARD * hardware. Many pins need to be moved from protect to primary 4960a0e4badSJean-Christophe PLAGNIOL-VILLARD * mode. 4970a0e4badSJean-Christophe PLAGNIOL-VILLARD */ 4980a0e4badSJean-Christophe PLAGNIOL-VILLARD void set_muxconf_regs(void) 4990a0e4badSJean-Christophe PLAGNIOL-VILLARD { 5000a0e4badSJean-Christophe PLAGNIOL-VILLARD MUX_BEAGLE(); 5010a0e4badSJean-Christophe PLAGNIOL-VILLARD } 5020cd31144SSteve Sakoman 50375c57a35STom Rini #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 5040cd31144SSteve Sakoman int board_mmc_init(bd_t *bis) 5050cd31144SSteve Sakoman { 506e3913f56SNikita Kiryanov return omap_mmc_init(0, 0, 0, -1, -1); 5070cd31144SSteve Sakoman } 5080cd31144SSteve Sakoman #endif 509d90859a6SAlexander Holler 5107ac2fe2dSIlya Yanok #if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD) 511d90859a6SAlexander Holler /* Call usb_stop() before starting the kernel */ 512d90859a6SAlexander Holler void show_boot_progress(int val) 513d90859a6SAlexander Holler { 514578ac1e9SSimon Glass if (val == BOOTSTAGE_ID_RUN_OS) 515d90859a6SAlexander Holler usb_stop(); 516d90859a6SAlexander Holler } 51743b62393SGovindraj.R 51843b62393SGovindraj.R static struct omap_usbhs_board_data usbhs_bdata = { 51943b62393SGovindraj.R .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 52043b62393SGovindraj.R .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 52143b62393SGovindraj.R .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED 52243b62393SGovindraj.R }; 52343b62393SGovindraj.R 524*127efc4fSTroy Kisky int ehci_hcd_init(int index, enum usb_init_type init, 525*127efc4fSTroy Kisky struct ehci_hccr **hccr, struct ehci_hcor **hcor) 52643b62393SGovindraj.R { 52716297cfbSMateusz Zalega return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); 52843b62393SGovindraj.R } 52943b62393SGovindraj.R 530676ae068SLucas Stach int ehci_hcd_stop(int index) 53143b62393SGovindraj.R { 53243b62393SGovindraj.R return omap_ehci_hcd_stop(); 53343b62393SGovindraj.R } 53443b62393SGovindraj.R 535d90859a6SAlexander Holler #endif /* CONFIG_USB_EHCI */ 536c642b151SIlya Yanok 537c642b151SIlya Yanok #if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET) 538c642b151SIlya Yanok int board_eth_init(bd_t *bis) 539c642b151SIlya Yanok { 540c642b151SIlya Yanok return usb_eth_initialize(bis); 541c642b151SIlya Yanok } 542c642b151SIlya Yanok #endif 543