xref: /rk3399_rockchip-uboot/board/tcl/sl50/board.h (revision 13a3972585af60ec367d209cedbd3601e0c77467)
1*9d1b2987SEnric Balletbò i Serra /*
2*9d1b2987SEnric Balletbò i Serra  * board.h
3*9d1b2987SEnric Balletbò i Serra  *
4*9d1b2987SEnric Balletbò i Serra  * TCL SL50 boards information header
5*9d1b2987SEnric Balletbò i Serra  *
6*9d1b2987SEnric Balletbò i Serra  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7*9d1b2987SEnric Balletbò i Serra  *
8*9d1b2987SEnric Balletbò i Serra  * SPDX-License-Identifier:	GPL-2.0+
9*9d1b2987SEnric Balletbò i Serra  */
10*9d1b2987SEnric Balletbò i Serra 
11*9d1b2987SEnric Balletbò i Serra #ifndef _BOARD_H_
12*9d1b2987SEnric Balletbò i Serra #define _BOARD_H_
13*9d1b2987SEnric Balletbò i Serra 
14*9d1b2987SEnric Balletbò i Serra void enable_uart0_pin_mux(void);
15*9d1b2987SEnric Balletbò i Serra void enable_uart1_pin_mux(void);
16*9d1b2987SEnric Balletbò i Serra void enable_uart2_pin_mux(void);
17*9d1b2987SEnric Balletbò i Serra void enable_uart3_pin_mux(void);
18*9d1b2987SEnric Balletbò i Serra void enable_uart4_pin_mux(void);
19*9d1b2987SEnric Balletbò i Serra void enable_uart5_pin_mux(void);
20*9d1b2987SEnric Balletbò i Serra void enable_i2c0_pin_mux(void);
21*9d1b2987SEnric Balletbò i Serra void enable_board_pin_mux(void);
22*9d1b2987SEnric Balletbò i Serra #endif
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