15cc16d88SPatrice Chotard /* 25cc16d88SPatrice Chotard * Board init file for STiH410-B2260 35cc16d88SPatrice Chotard * 45cc16d88SPatrice Chotard * (C) Copyright 2017 Patrice Chotard <patrice.chotard@st.com> 55cc16d88SPatrice Chotard * 65cc16d88SPatrice Chotard * SPDX-License-Identifier: GPL-2.0+ 75cc16d88SPatrice Chotard */ 85cc16d88SPatrice Chotard 95cc16d88SPatrice Chotard #include <common.h> 105cc16d88SPatrice Chotard 115cc16d88SPatrice Chotard DECLARE_GLOBAL_DATA_PTR; 125cc16d88SPatrice Chotard dram_init(void)135cc16d88SPatrice Chotardint dram_init(void) 145cc16d88SPatrice Chotard { 155cc16d88SPatrice Chotard gd->ram_size = PHYS_SDRAM_1_SIZE; 165cc16d88SPatrice Chotard return 0; 175cc16d88SPatrice Chotard } 185cc16d88SPatrice Chotard dram_init_banksize(void)1976b00acaSSimon Glassint dram_init_banksize(void) 205cc16d88SPatrice Chotard { 215cc16d88SPatrice Chotard gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 225cc16d88SPatrice Chotard gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 2376b00acaSSimon Glass 2476b00acaSSimon Glass return 0; 255cc16d88SPatrice Chotard } 265cc16d88SPatrice Chotard 27*4c4da9fbSPatrice Chotard #ifndef CONFIG_SYS_DCACHE_OFF enable_caches(void)28*4c4da9fbSPatrice Chotardvoid enable_caches(void) 29*4c4da9fbSPatrice Chotard { 30*4c4da9fbSPatrice Chotard /* Enable D-cache. I-cache is already enabled in start.S */ 31*4c4da9fbSPatrice Chotard dcache_enable(); 32*4c4da9fbSPatrice Chotard } 33*4c4da9fbSPatrice Chotard #endif 34*4c4da9fbSPatrice Chotard board_init(void)355cc16d88SPatrice Chotardint board_init(void) 365cc16d88SPatrice Chotard { 375cc16d88SPatrice Chotard return 0; 385cc16d88SPatrice Chotard } 39