xref: /rk3399_rockchip-uboot/board/socrates/socrates.c (revision c918261c6d9f265f88baf70f8a73dfe6f0cb9596)
1 /*
2  * (C) Copyright 2008
3  * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
4  *
5  * Copyright 2004 Freescale Semiconductor.
6  * (C) Copyright 2002,2003, Motorola Inc.
7  * Xianghua Xiao, (X.Xiao@motorola.com)
8  *
9  * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
10  *
11  * See file CREDITS for list of people who contributed to this
12  * project.
13  *
14  * This program is free software; you can redistribute it and/or
15  * modify it under the terms of the GNU General Public License as
16  * published by the Free Software Foundation; either version 2 of
17  * the License, or (at your option) any later version.
18  *
19  * This program is distributed in the hope that it will be useful,
20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
22  * GNU General Public License for more details.
23  *
24  * You should have received a copy of the GNU General Public License
25  * along with this program; if not, write to the Free Software
26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27  * MA 02111-1307 USA
28  */
29 
30 #include <common.h>
31 #include <pci.h>
32 #include <asm/processor.h>
33 #include <asm/immap_85xx.h>
34 #include <ioports.h>
35 #include <flash.h>
36 #include <libfdt.h>
37 #include <fdt_support.h>
38 
39 DECLARE_GLOBAL_DATA_PTR;
40 
41 extern flash_info_t flash_info[];	/* FLASH chips info */
42 
43 void local_bus_init (void);
44 ulong flash_get_size (ulong base, int banknum);
45 
46 int checkboard (void)
47 {
48 	char *s = getenv("serial#");
49 
50 	puts("Board: Socrates");
51 	if (s != NULL) {
52 		puts(", serial# ");
53 		puts(s);
54 	}
55 	putc('\n');
56 
57 #ifdef CONFIG_PCI
58 	printf ("PCI1:  32 bit, %d MHz (compiled)\n",
59 		CONFIG_SYS_CLK_FREQ / 1000000);
60 #else
61 	printf ("PCI1:  disabled\n");
62 #endif
63 
64 	/*
65 	 * Initialize local bus.
66 	 */
67 	local_bus_init ();
68 
69 	return 0;
70 }
71 
72 int misc_init_r (void)
73 {
74 	volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);
75 
76 	/*
77 	 * Adjust flash start and offset to detected values
78 	 */
79 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
80 	gd->bd->bi_flashoffset = 0;
81 
82 	/*
83 	 * Check if boot FLASH isn't max size
84 	 */
85 	if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) {
86 		memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff);
87 		memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff);
88 
89 		/*
90 		 * Re-check to get correct base address
91 		 */
92 		flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1);
93 	}
94 
95 	/*
96 	 * Check if only one FLASH bank is available
97 	 */
98 	if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
99 		memctl->or1 = 0;
100 		memctl->br1 = 0;
101 
102 		/*
103 		 * Re-do flash protection upon new addresses
104 		 */
105 		flash_protect (FLAG_PROTECT_CLEAR,
106 			       gd->bd->bi_flashstart, 0xffffffff,
107 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
108 
109 		/* Monitor protection ON by default */
110 		flash_protect (FLAG_PROTECT_SET,
111 			       CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1,
112 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
113 
114 		/* Environment protection ON by default */
115 		flash_protect (FLAG_PROTECT_SET,
116 			       CFG_ENV_ADDR,
117 			       CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
118 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
119 
120 		/* Redundant environment protection ON by default */
121 		flash_protect (FLAG_PROTECT_SET,
122 			       CFG_ENV_ADDR_REDUND,
123 			       CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
124 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
125 	}
126 
127 	return 0;
128 }
129 
130 /*
131  * Initialize Local Bus
132  */
133 void local_bus_init (void)
134 {
135 
136 	volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
137 	volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
138 
139 	lbc->ltesr = 0xffffffff;	/* Clear LBC error interrupts */
140 	lbc->lteir = 0xffffffff;	/* Enable LBC error interrupts */
141 	ecm->eedr = 0xffffffff;		/* Clear ecm errors */
142 	ecm->eeer = 0xffffffff;		/* Enable ecm errors */
143 
144 }
145 
146 #if defined(CONFIG_PCI)
147 /*
148  * Initialize PCI Devices, report devices found.
149  */
150 
151 #ifndef CONFIG_PCI_PNP
152 static struct pci_config_table pci_mpc85xxads_config_table[] = {
153 	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
154 	 PCI_IDSEL_NUMBER, PCI_ANY_ID,
155 	 pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
156 				     PCI_ENET0_MEMADDR,
157 				     PCI_COMMAND_MEMORY |
158 				     PCI_COMMAND_MASTER}},
159 	{}
160 };
161 #endif
162 
163 
164 static struct pci_controller hose = {
165 #ifndef CONFIG_PCI_PNP
166 	config_table:pci_mpc85xxads_config_table,
167 #endif
168 };
169 
170 #endif /* CONFIG_PCI */
171 
172 
173 void pci_init_board (void)
174 {
175 #ifdef CONFIG_PCI
176 	pci_mpc85xx_init (&hose);
177 #endif /* CONFIG_PCI */
178 }
179 
180 #ifdef CONFIG_BOARD_EARLY_INIT_R
181 int board_early_init_r (void)
182 {
183 #ifdef CONFIG_PS2MULT
184 	ps2mult_early_init();
185 #endif /* CONFIG_PS2MULT */
186 	return (0);
187 }
188 #endif /* CONFIG_BOARD_EARLY_INIT_R */
189 
190 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
191 void
192 ft_board_setup(void *blob, bd_t *bd)
193 {
194 	u32 val[4];
195 	int rc;
196 
197 	ft_cpu_setup(blob, bd);
198 
199 	/* Fixup NOR mapping */
200 	val[0] = 0;				/* chip select number */
201 	val[1] = 0;				/* always 0 */
202 	val[2] = gd->bd->bi_flashstart;
203 	val[3] = gd->bd->bi_flashsize;
204 
205 	rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
206 				  val, sizeof(val), 1);
207 	if (rc)
208 		printf("Unable to update property NOR mapping, err=%s\n",
209 		       fdt_strerror(rc));
210 }
211 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
212