xref: /rk3399_rockchip-uboot/board/socrates/socrates.c (revision 5d108ac8f435924c624cd6aaacd44f35f5cf94c0)
1 /*
2  * (C) Copyright 2008
3  * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
4  *
5  * Copyright 2004 Freescale Semiconductor.
6  * (C) Copyright 2002,2003, Motorola Inc.
7  * Xianghua Xiao, (X.Xiao@motorola.com)
8  *
9  * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
10  *
11  * See file CREDITS for list of people who contributed to this
12  * project.
13  *
14  * This program is free software; you can redistribute it and/or
15  * modify it under the terms of the GNU General Public License as
16  * published by the Free Software Foundation; either version 2 of
17  * the License, or (at your option) any later version.
18  *
19  * This program is distributed in the hope that it will be useful,
20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
22  * GNU General Public License for more details.
23  *
24  * You should have received a copy of the GNU General Public License
25  * along with this program; if not, write to the Free Software
26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27  * MA 02111-1307 USA
28  */
29 
30 #include <common.h>
31 #include <pci.h>
32 #include <asm/processor.h>
33 #include <asm/immap_85xx.h>
34 #include <ioports.h>
35 #include <flash.h>
36 
37 DECLARE_GLOBAL_DATA_PTR;
38 
39 extern flash_info_t flash_info[];	/* FLASH chips info */
40 
41 void local_bus_init (void);
42 ulong flash_get_size (ulong base, int banknum);
43 
44 int checkboard (void)
45 {
46 	char *s = getenv("serial#");
47 
48 	puts("Board: Socrates");
49 	if (s != NULL) {
50 		puts(", serial# ");
51 		puts(s);
52 	}
53 	putc('\n');
54 
55 #ifdef CONFIG_PCI
56 	printf ("PCI1:  32 bit, %d MHz (compiled)\n",
57 		CONFIG_SYS_CLK_FREQ / 1000000);
58 #else
59 	printf ("PCI1:  disabled\n");
60 #endif
61 
62 	/*
63 	 * Initialize local bus.
64 	 */
65 	local_bus_init ();
66 
67 	return 0;
68 }
69 
70 int misc_init_r (void)
71 {
72 	volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);
73 
74 	/*
75 	 * Adjust flash start and offset to detected values
76 	 */
77 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
78 	gd->bd->bi_flashoffset = 0;
79 
80 	/*
81 	 * Check if boot FLASH isn't max size
82 	 */
83 	if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) {
84 		memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff);
85 		memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff);
86 
87 		/*
88 		 * Re-check to get correct base address
89 		 */
90 		flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1);
91 	}
92 
93 	/*
94 	 * Check if only one FLASH bank is available
95 	 */
96 	if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
97 		memctl->or1 = 0;
98 		memctl->br1 = 0;
99 
100 		/*
101 		 * Re-do flash protection upon new addresses
102 		 */
103 		flash_protect (FLAG_PROTECT_CLEAR,
104 			       gd->bd->bi_flashstart, 0xffffffff,
105 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
106 
107 		/* Monitor protection ON by default */
108 		flash_protect (FLAG_PROTECT_SET,
109 			       CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1,
110 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
111 
112 		/* Environment protection ON by default */
113 		flash_protect (FLAG_PROTECT_SET,
114 			       CFG_ENV_ADDR,
115 			       CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
116 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
117 
118 		/* Redundant environment protection ON by default */
119 		flash_protect (FLAG_PROTECT_SET,
120 			       CFG_ENV_ADDR_REDUND,
121 			       CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
122 			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
123 	}
124 
125 	return 0;
126 }
127 
128 /*
129  * Initialize Local Bus
130  */
131 void local_bus_init (void)
132 {
133 
134 	volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
135 	volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
136 
137 	lbc->ltesr = 0xffffffff;	/* Clear LBC error interrupts */
138 	lbc->lteir = 0xffffffff;	/* Enable LBC error interrupts */
139 	ecm->eedr = 0xffffffff;		/* Clear ecm errors */
140 	ecm->eeer = 0xffffffff;		/* Enable ecm errors */
141 
142 }
143 
144 #if defined(CONFIG_PCI)
145 /*
146  * Initialize PCI Devices, report devices found.
147  */
148 
149 #ifndef CONFIG_PCI_PNP
150 static struct pci_config_table pci_mpc85xxads_config_table[] = {
151 	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
152 	 PCI_IDSEL_NUMBER, PCI_ANY_ID,
153 	 pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
154 				     PCI_ENET0_MEMADDR,
155 				     PCI_COMMAND_MEMORY |
156 				     PCI_COMMAND_MASTER}},
157 	{}
158 };
159 #endif
160 
161 
162 static struct pci_controller hose = {
163 #ifndef CONFIG_PCI_PNP
164 	config_table:pci_mpc85xxads_config_table,
165 #endif
166 };
167 
168 #endif /* CONFIG_PCI */
169 
170 
171 void pci_init_board (void)
172 {
173 #ifdef CONFIG_PCI
174 	pci_mpc85xx_init (&hose);
175 #endif /* CONFIG_PCI */
176 }
177 
178 #ifdef CONFIG_BOARD_EARLY_INIT_R
179 int board_early_init_r (void)
180 {
181 #ifdef CONFIG_PS2MULT
182 	ps2mult_early_init();
183 #endif /* CONFIG_PS2MULT */
184 	return (0);
185 }
186 #endif /* CONFIG_BOARD_EARLY_INIT_R */
187