1e2b159d0SKumar Gala /* 2e2b159d0SKumar Gala * Copyright 2008 Freescale Semiconductor, Inc. 3e2b159d0SKumar Gala * 4e2b159d0SKumar Gala * (C) Copyright 2000 5e2b159d0SKumar Gala * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6e2b159d0SKumar Gala * 7*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 8e2b159d0SKumar Gala */ 9e2b159d0SKumar Gala 10e2b159d0SKumar Gala #include <common.h> 11e2b159d0SKumar Gala #include <asm/fsl_law.h> 12e2b159d0SKumar Gala #include <asm/mmu.h> 13e2b159d0SKumar Gala 14e2b159d0SKumar Gala /* 15e2b159d0SKumar Gala * LAW(Local Access Window) configuration: 16e2b159d0SKumar Gala * 17e2b159d0SKumar Gala * 0x0000_0000 0x0fff_ffff DDR 256M 18e2b159d0SKumar Gala * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M 19fdc7eb90SPaul Gortmaker * 0xa000_0000 0xbfff_ffff PCIe MEM 512M 20e2b159d0SKumar Gala * 0xe000_0000 0xe000_ffff CCSR 1M 21fdc7eb90SPaul Gortmaker * 0xe200_0000 0xe27f_ffff PCI1 IO 8M 22fdc7eb90SPaul Gortmaker * 0xe280_0000 0xe2ff_ffff PCIe IO 8M 233fd673cfSPaul Gortmaker * 0xec00_0000 0xefff_ffff FLASH (2nd bank) 64M 24e2b159d0SKumar Gala * 0xf000_0000 0xf7ff_ffff SDRAM 128M 25e2b159d0SKumar Gala * 0xf8b0_0000 0xf80f_ffff EEPROM 1M 26e2b159d0SKumar Gala * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M 27e2b159d0SKumar Gala * 28f0aec4eaSPaul Gortmaker * If swapped CS0/CS6 via JP12+SW2.8: 29f0aec4eaSPaul Gortmaker * 0xef80_0000 0xefff_ffff FLASH (2nd bank) 8M 30f0aec4eaSPaul Gortmaker * 0xfc00_0000 0xffff_ffff FLASH (boot bank) 64M 31f0aec4eaSPaul Gortmaker * 32e2b159d0SKumar Gala * Notes: 33e2b159d0SKumar Gala * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. 34e2b159d0SKumar Gala * If flash is 8M at default position (last 8M), no LAW needed. 35e2b159d0SKumar Gala */ 36e2b159d0SKumar Gala 37e2b159d0SKumar Gala struct law_entry law_table[] = { 38f0aec4eaSPaul Gortmaker #ifdef CONFIG_SYS_ALT_BOOT 39f0aec4eaSPaul Gortmaker SET_LAW(CONFIG_SYS_ALT_FLASH, LAW_SIZE_8M, LAW_TRGT_IF_LBC), 40f0aec4eaSPaul Gortmaker #else 413fd673cfSPaul Gortmaker SET_LAW(CONFIG_SYS_ALT_FLASH, LAW_SIZE_64M, LAW_TRGT_IF_LBC), 42f0aec4eaSPaul Gortmaker #endif 43e2b159d0SKumar Gala #ifndef CONFIG_SPD_EEPROM 446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), 45e2b159d0SKumar Gala #endif 467e44f2b7SPaul Gortmaker #ifdef CONFIG_SYS_LBC_SDRAM_BASE 47e2b159d0SKumar Gala /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ 486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), 497e44f2b7SPaul Gortmaker #else 507e44f2b7SPaul Gortmaker /* LBC window - maps 128M 0xf8000000 -> 0xffffffff */ 517e44f2b7SPaul Gortmaker SET_LAW(CONFIG_SYS_EPLD_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), 527e44f2b7SPaul Gortmaker #endif 53e2b159d0SKumar Gala }; 54e2b159d0SKumar Gala 55e2b159d0SKumar Gala int num_law_entries = ARRAY_SIZE(law_table); 56