1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * Kyungmin Park <kyungmin.park@samsung.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <asm/io.h> 27 #include <asm/arch/adc.h> 28 #include <asm/arch/gpio.h> 29 #include <asm/arch/mmc.h> 30 #include <asm/arch/pinmux.h> 31 #include <pmic.h> 32 #include <usb/s3c_udc.h> 33 #include <asm/arch/cpu.h> 34 #include <max8998_pmic.h> 35 #include <asm/arch/watchdog.h> 36 37 DECLARE_GLOBAL_DATA_PTR; 38 39 struct exynos4_gpio_part1 *gpio1; 40 struct exynos4_gpio_part2 *gpio2; 41 unsigned int board_rev; 42 43 u32 get_board_rev(void) 44 { 45 return board_rev; 46 } 47 48 static int get_hwrev(void) 49 { 50 return board_rev & 0xFF; 51 } 52 53 static void check_hw_revision(void); 54 55 int board_init(void) 56 { 57 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; 58 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; 59 60 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; 61 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 62 63 #if defined(CONFIG_PMIC) 64 pmic_init(); 65 #endif 66 67 check_hw_revision(); 68 printf("HW Revision:\t0x%x\n", board_rev); 69 70 return 0; 71 } 72 73 int dram_init(void) 74 { 75 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) + 76 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); 77 78 return 0; 79 } 80 81 void dram_init_banksize(void) 82 { 83 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 84 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 85 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; 86 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; 87 } 88 89 static unsigned short get_adc_value(int channel) 90 { 91 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc(); 92 unsigned short ret = 0; 93 unsigned int reg; 94 unsigned int loop = 0; 95 96 writel(channel & 0xF, &adc->adcmux); 97 writel((1 << 14) | (49 << 6), &adc->adccon); 98 writel(1000 & 0xffff, &adc->adcdly); 99 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */ 100 udelay(10); 101 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */ 102 udelay(10); 103 104 do { 105 udelay(1); 106 reg = readl(&adc->adccon); 107 } while (!(reg & (1 << 15)) && (loop++ < 1000)); 108 109 ret = readl(&adc->adcdat0) & 0xFFF; 110 111 return ret; 112 } 113 114 static int adc_power_control(int on) 115 { 116 int ret; 117 struct pmic *p = get_pmic(); 118 119 if (pmic_probe(p)) 120 return -1; 121 122 ret = pmic_set_output(p, 123 MAX8998_REG_ONOFF1, 124 MAX8998_LDO4, !!on); 125 126 return ret; 127 } 128 129 static unsigned int get_hw_revision(void) 130 { 131 int hwrev, mode0, mode1; 132 133 adc_power_control(1); 134 135 mode0 = get_adc_value(1); /* HWREV_MODE0 */ 136 mode1 = get_adc_value(2); /* HWREV_MODE1 */ 137 138 /* 139 * XXX Always set the default hwrev as the latest board 140 * ADC = (voltage) / 3.3 * 4096 141 */ 142 hwrev = 3; 143 144 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max)) 145 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200)) 146 hwrev = 0x0; /* 0.01V 0.01V */ 147 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200)) 148 hwrev = 0x1; /* 610mV 0.01V */ 149 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200)) 150 hwrev = 0x2; /* 1.16V 0.01V */ 151 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200)) 152 hwrev = 0x3; /* 1.79V 0.01V */ 153 #undef IS_RANGE 154 155 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); 156 157 adc_power_control(0); 158 159 return hwrev; 160 } 161 162 static void check_hw_revision(void) 163 { 164 int hwrev; 165 166 hwrev = get_hw_revision(); 167 168 board_rev |= hwrev; 169 } 170 171 #ifdef CONFIG_DISPLAY_BOARDINFO 172 int checkboard(void) 173 { 174 puts("Board:\tUniversal C210\n"); 175 return 0; 176 } 177 #endif 178 179 #ifdef CONFIG_GENERIC_MMC 180 int board_mmc_init(bd_t *bis) 181 { 182 int err; 183 184 switch (get_hwrev()) { 185 case 0: 186 /* 187 * Set the low to enable LDO_EN 188 * But when you use the test board for eMMC booting 189 * you should set it HIGH since it removes the inverter 190 */ 191 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */ 192 s5p_gpio_direction_output(&gpio1->e3, 6, 0); 193 break; 194 default: 195 /* 196 * Default reset state is High and there's no inverter 197 * But set it as HIGH to ensure 198 */ 199 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */ 200 s5p_gpio_direction_output(&gpio1->e1, 3, 1); 201 break; 202 } 203 204 /* 205 * MMC device init 206 * mmc0 : eMMC (8-bit buswidth) 207 * mmc2 : SD card (4-bit buswidth) 208 */ 209 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); 210 if (err) 211 debug("SDMMC0 not configured\n"); 212 else 213 err = s5p_mmc_init(0, 8); 214 215 /* T-flash detect */ 216 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf); 217 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP); 218 219 /* 220 * Check the T-flash detect pin 221 * GPX3[4] T-flash detect pin 222 */ 223 if (!s5p_gpio_get_value(&gpio2->x3, 4)) { 224 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE); 225 if (err) 226 debug("SDMMC2 not configured\n"); 227 else 228 err = s5p_mmc_init(2, 4); 229 } 230 231 return err; 232 233 } 234 #endif 235 236 #ifdef CONFIG_USB_GADGET 237 static int s5pc210_phy_control(int on) 238 { 239 int ret = 0; 240 struct pmic *p = get_pmic(); 241 242 if (pmic_probe(p)) 243 return -1; 244 245 if (on) { 246 ret |= pmic_set_output(p, 247 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, 248 MAX8998_SAFEOUT1, LDO_ON); 249 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1, 250 MAX8998_LDO3, LDO_ON); 251 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2, 252 MAX8998_LDO8, LDO_ON); 253 254 } else { 255 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2, 256 MAX8998_LDO8, LDO_OFF); 257 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1, 258 MAX8998_LDO3, LDO_OFF); 259 ret |= pmic_set_output(p, 260 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, 261 MAX8998_SAFEOUT1, LDO_OFF); 262 } 263 264 if (ret) { 265 puts("MAX8998 LDO setting error!\n"); 266 return -1; 267 } 268 269 return 0; 270 } 271 272 struct s3c_plat_otg_data s5pc210_otg_data = { 273 .phy_control = s5pc210_phy_control, 274 .regs_phy = EXYNOS4_USBPHY_BASE, 275 .regs_otg = EXYNOS4_USBOTG_BASE, 276 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL, 277 .usb_flags = PHY0_SLEEP, 278 }; 279 #endif 280 281 int board_early_init_f(void) 282 { 283 wdt_stop(); 284 285 return 0; 286 } 287