1 /* 2 * (C) Copyright 2013 SAMSUNG Electronics 3 * Rajeshwari Shinde <rajeshwari.s@samsung.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <cros_ec.h> 10 #include <errno.h> 11 #include <fdtdec.h> 12 #include <spi.h> 13 #include <tmu.h> 14 #include <netdev.h> 15 #include <asm/io.h> 16 #include <asm/arch/board.h> 17 #include <asm/arch/cpu.h> 18 #include <asm/arch/dwmmc.h> 19 #include <asm/arch/gpio.h> 20 #include <asm/arch/mmc.h> 21 #include <asm/arch/pinmux.h> 22 #include <asm/arch/power.h> 23 #include <power/pmic.h> 24 #include <asm/arch/sromc.h> 25 #include <lcd.h> 26 #include <samsung/misc.h> 27 28 DECLARE_GLOBAL_DATA_PTR; 29 30 int __exynos_early_init_f(void) 31 { 32 return 0; 33 } 34 int exynos_early_init_f(void) 35 __attribute__((weak, alias("__exynos_early_init_f"))); 36 37 int __exynos_power_init(void) 38 { 39 return 0; 40 } 41 int exynos_power_init(void) 42 __attribute__((weak, alias("__exynos_power_init"))); 43 44 #if defined CONFIG_EXYNOS_TMU 45 /* Boot Time Thermal Analysis for SoC temperature threshold breach */ 46 static void boot_temp_check(void) 47 { 48 int temp; 49 50 switch (tmu_monitor(&temp)) { 51 case TMU_STATUS_NORMAL: 52 break; 53 case TMU_STATUS_TRIPPED: 54 /* 55 * Status TRIPPED ans WARNING means corresponding threshold 56 * breach 57 */ 58 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); 59 set_ps_hold_ctrl(); 60 hang(); 61 break; 62 case TMU_STATUS_WARNING: 63 puts("EXYNOS_TMU: WARNING! Temperature very high\n"); 64 break; 65 case TMU_STATUS_INIT: 66 /* 67 * TMU_STATUS_INIT means something is wrong with temperature 68 * sensing and TMU status was changed back from NORMAL to INIT. 69 */ 70 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n"); 71 break; 72 default: 73 debug("EXYNOS_TMU: Unknown TMU state\n"); 74 } 75 } 76 #endif 77 78 int board_init(void) 79 { 80 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); 81 #if defined CONFIG_EXYNOS_TMU 82 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { 83 debug("%s: Failed to init TMU\n", __func__); 84 return -1; 85 } 86 boot_temp_check(); 87 #endif 88 89 #ifdef CONFIG_EXYNOS_SPI 90 spi_init(); 91 #endif 92 return exynos_init(); 93 } 94 95 int dram_init(void) 96 { 97 int i; 98 u32 addr; 99 100 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 101 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 102 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); 103 } 104 return 0; 105 } 106 107 void dram_init_banksize(void) 108 { 109 int i; 110 u32 addr, size; 111 112 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 113 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 114 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); 115 116 gd->bd->bi_dram[i].start = addr; 117 gd->bd->bi_dram[i].size = size; 118 } 119 } 120 121 static int board_uart_init(void) 122 { 123 int err, uart_id, ret = 0; 124 125 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { 126 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); 127 if (err) { 128 debug("UART%d not configured\n", 129 (uart_id - PERIPH_ID_UART0)); 130 ret |= err; 131 } 132 } 133 return ret; 134 } 135 136 #ifdef CONFIG_BOARD_EARLY_INIT_F 137 int board_early_init_f(void) 138 { 139 int err; 140 #ifdef CONFIG_BOARD_TYPES 141 set_board_type(); 142 #endif 143 err = board_uart_init(); 144 if (err) { 145 debug("UART init failed\n"); 146 return err; 147 } 148 149 #ifdef CONFIG_SYS_I2C_INIT_BOARD 150 board_i2c_init(gd->fdt_blob); 151 #endif 152 return exynos_early_init_f(); 153 } 154 #endif 155 156 #if defined(CONFIG_POWER) 157 int power_init_board(void) 158 { 159 set_ps_hold_ctrl(); 160 161 return exynos_power_init(); 162 } 163 #endif 164 165 #ifdef CONFIG_OF_CONTROL 166 #ifdef CONFIG_SMC911X 167 static int decode_sromc(const void *blob, struct fdt_sromc *config) 168 { 169 int err; 170 int node; 171 172 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); 173 if (node < 0) { 174 debug("Could not find SROMC node\n"); 175 return node; 176 } 177 178 config->bank = fdtdec_get_int(blob, node, "bank", 0); 179 config->width = fdtdec_get_int(blob, node, "width", 2); 180 181 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, 182 FDT_SROM_TIMING_COUNT); 183 if (err < 0) { 184 debug("Could not decode SROMC configuration Error: %s\n", 185 fdt_strerror(err)); 186 return -FDT_ERR_NOTFOUND; 187 } 188 return 0; 189 } 190 #endif 191 192 int board_eth_init(bd_t *bis) 193 { 194 #ifdef CONFIG_SMC911X 195 u32 smc_bw_conf, smc_bc_conf; 196 struct fdt_sromc config; 197 fdt_addr_t base_addr; 198 int node; 199 200 node = decode_sromc(gd->fdt_blob, &config); 201 if (node < 0) { 202 debug("%s: Could not find sromc configuration\n", __func__); 203 return 0; 204 } 205 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); 206 if (node < 0) { 207 debug("%s: Could not find lan9215 configuration\n", __func__); 208 return 0; 209 } 210 211 /* We now have a node, so any problems from now on are errors */ 212 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); 213 if (base_addr == FDT_ADDR_T_NONE) { 214 debug("%s: Could not find lan9215 address\n", __func__); 215 return -1; 216 } 217 218 /* Ethernet needs data bus width of 16 bits */ 219 if (config.width != 2) { 220 debug("%s: Unsupported bus width %d\n", __func__, 221 config.width); 222 return -1; 223 } 224 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank) 225 | SROMC_BYTE_ENABLE(config.bank); 226 227 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) | 228 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) | 229 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) | 230 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) | 231 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) | 232 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) | 233 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]); 234 235 /* Select and configure the SROMC bank */ 236 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank); 237 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf); 238 return smc911x_initialize(0, base_addr); 239 #endif 240 return 0; 241 } 242 243 #ifdef CONFIG_GENERIC_MMC 244 static int init_mmc(void) 245 { 246 #ifdef CONFIG_SDHCI 247 return exynos_mmc_init(gd->fdt_blob); 248 #else 249 return 0; 250 #endif 251 } 252 253 static int init_dwmmc(void) 254 { 255 #ifdef CONFIG_DWMMC 256 return exynos_dwmmc_init(gd->fdt_blob); 257 #else 258 return 0; 259 #endif 260 } 261 262 int board_mmc_init(bd_t *bis) 263 { 264 int ret; 265 266 if (get_boot_mode() == BOOT_MODE_SD) { 267 ret = init_mmc(); 268 ret |= init_dwmmc(); 269 } else { 270 ret = init_dwmmc(); 271 ret |= init_mmc(); 272 } 273 274 if (ret) 275 debug("mmc init failed\n"); 276 277 return ret; 278 } 279 #endif 280 281 #ifdef CONFIG_DISPLAY_BOARDINFO 282 int checkboard(void) 283 { 284 const char *board_info; 285 286 board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL); 287 printf("Board: %s\n", board_info ? board_info : "unknown"); 288 #ifdef CONFIG_BOARD_TYPES 289 board_info = get_board_type(); 290 291 printf("Model: %s\n", board_info ? board_info : "unknown"); 292 #endif 293 return 0; 294 } 295 #endif 296 #endif /* CONFIG_OF_CONTROL */ 297 298 #ifdef CONFIG_BOARD_LATE_INIT 299 int board_late_init(void) 300 { 301 stdio_print_current_devices(); 302 303 if (cros_ec_get_error()) { 304 /* Force console on */ 305 gd->flags &= ~GD_FLG_SILENT; 306 307 printf("cros-ec communications failure %d\n", 308 cros_ec_get_error()); 309 puts("\nPlease reset with Power+Refresh\n\n"); 310 panic("Cannot init cros-ec device"); 311 return -1; 312 } 313 return 0; 314 } 315 #endif 316 317 int arch_early_init_r(void) 318 { 319 #ifdef CONFIG_CROS_EC 320 if (cros_ec_board_init()) { 321 printf("%s: Failed to init EC\n", __func__); 322 return 0; 323 } 324 #endif 325 326 return 0; 327 } 328 329 #ifdef CONFIG_MISC_INIT_R 330 int misc_init_r(void) 331 { 332 #ifdef CONFIG_SET_DFU_ALT_INFO 333 set_dfu_alt_info(); 334 #endif 335 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 336 set_board_info(); 337 #endif 338 #ifdef CONFIG_LCD_MENU 339 keys_init(); 340 check_boot_mode(); 341 #endif 342 #ifdef CONFIG_CMD_BMP 343 if (panel_info.logo_on) 344 draw_logo(); 345 #endif 346 return 0; 347 } 348 #endif 349