xref: /rk3399_rockchip-uboot/board/rockchip/evb_rk3562/evb_rk3562.c (revision 56f7d184f8d48bed25d50c0c4aa829cf44814248)
1*56f7d184SJoseph Chen /*
2*56f7d184SJoseph Chen  * SPDX-License-Identifier:     GPL-2.0+
3*56f7d184SJoseph Chen  *
4*56f7d184SJoseph Chen  * (C) Copyright 2022 Rockchip Electronics Co., Ltd
5*56f7d184SJoseph Chen  */
6*56f7d184SJoseph Chen 
7*56f7d184SJoseph Chen #include <common.h>
8*56f7d184SJoseph Chen #include <dwc3-uboot.h>
9*56f7d184SJoseph Chen #include <usb.h>
10*56f7d184SJoseph Chen 
11*56f7d184SJoseph Chen DECLARE_GLOBAL_DATA_PTR;
12*56f7d184SJoseph Chen 
13*56f7d184SJoseph Chen #ifdef CONFIG_USB_DWC3
14*56f7d184SJoseph Chen static struct dwc3_device dwc3_device_data = {
15*56f7d184SJoseph Chen 	.maximum_speed = USB_SPEED_HIGH,
16*56f7d184SJoseph Chen 	.base = 0xfe500000,
17*56f7d184SJoseph Chen 	.dr_mode = USB_DR_MODE_PERIPHERAL,
18*56f7d184SJoseph Chen 	.index = 0,
19*56f7d184SJoseph Chen 	.dis_u2_susphy_quirk = 1,
20*56f7d184SJoseph Chen 	.usb2_phyif_utmi_width = 16,
21*56f7d184SJoseph Chen };
22*56f7d184SJoseph Chen 
usb_gadget_handle_interrupts(void)23*56f7d184SJoseph Chen int usb_gadget_handle_interrupts(void)
24*56f7d184SJoseph Chen {
25*56f7d184SJoseph Chen 	dwc3_uboot_handle_interrupt(0);
26*56f7d184SJoseph Chen 	return 0;
27*56f7d184SJoseph Chen }
28*56f7d184SJoseph Chen 
board_usb_init(int index,enum usb_init_type init)29*56f7d184SJoseph Chen int board_usb_init(int index, enum usb_init_type init)
30*56f7d184SJoseph Chen {
31*56f7d184SJoseph Chen 	return dwc3_uboot_init(&dwc3_device_data);
32*56f7d184SJoseph Chen }
33*56f7d184SJoseph Chen #endif
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