1f7dc4ac3STom Warren /* 2f7dc4ac3STom Warren * (C) Copyright 2013-2014 3f7dc4ac3STom Warren * NVIDIA Corporation <www.nvidia.com> 4f7dc4ac3STom Warren * 5f7dc4ac3STom Warren * SPDX-License-Identifier: GPL-2.0+ 6f7dc4ac3STom Warren */ 7f7dc4ac3STom Warren 8f7dc4ac3STom Warren #include <common.h> 9f7dc4ac3STom Warren #include <asm/arch/gpio.h> 10f7dc4ac3STom Warren #include <asm/arch/pinmux.h> 11f7dc4ac3STom Warren #include "pinmux-config-venice2.h" 12f7dc4ac3STom Warren 13f7dc4ac3STom Warren /* 14f7dc4ac3STom Warren * Routine: pinmux_init 15f7dc4ac3STom Warren * Description: Do individual peripheral pinmux configs 16f7dc4ac3STom Warren */ pinmux_init(void)17f7dc4ac3STom Warrenvoid pinmux_init(void) 18f7dc4ac3STom Warren { 19*2eba87a3SStephen Warren pinmux_set_tristate_input_clamping(); 20f7dc4ac3STom Warren 21*2eba87a3SStephen Warren gpio_config_table(venice2_gpio_inits, 22*2eba87a3SStephen Warren ARRAY_SIZE(venice2_gpio_inits)); 23f7dc4ac3STom Warren 24*2eba87a3SStephen Warren pinmux_config_pingrp_table(venice2_pingrps, 25*2eba87a3SStephen Warren ARRAY_SIZE(venice2_pingrps)); 26f7dc4ac3STom Warren 27*2eba87a3SStephen Warren pinmux_config_drvgrp_table(venice2_drvgrps, 28*2eba87a3SStephen Warren ARRAY_SIZE(venice2_drvgrps)); 29f7dc4ac3STom Warren } 30