1*f4ef6668STom Warren /* 2*f4ef6668STom Warren * (C) Copyright 2010,2011 3*f4ef6668STom Warren * NVIDIA Corporation <www.nvidia.com> 4*f4ef6668STom Warren * 5*f4ef6668STom Warren * See file CREDITS for list of people who contributed to this 6*f4ef6668STom Warren * project. 7*f4ef6668STom Warren * 8*f4ef6668STom Warren * This program is free software; you can redistribute it and/or 9*f4ef6668STom Warren * modify it under the terms of the GNU General Public License as 10*f4ef6668STom Warren * published by the Free Software Foundation; either version 2 of 11*f4ef6668STom Warren * the License, or (at your option) any later version. 12*f4ef6668STom Warren * 13*f4ef6668STom Warren * This program is distributed in the hope that it will be useful, 14*f4ef6668STom Warren * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*f4ef6668STom Warren * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*f4ef6668STom Warren * GNU General Public License for more details. 17*f4ef6668STom Warren * 18*f4ef6668STom Warren * You should have received a copy of the GNU General Public License 19*f4ef6668STom Warren * along with this program; if not, write to the Free Software 20*f4ef6668STom Warren * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21*f4ef6668STom Warren * MA 02111-1307 USA 22*f4ef6668STom Warren */ 23*f4ef6668STom Warren 24*f4ef6668STom Warren #include <common.h> 25*f4ef6668STom Warren #include <asm/io.h> 26*f4ef6668STom Warren #include <asm/arch/tegra2.h> 27*f4ef6668STom Warren #include <asm/arch/gpio.h> 28*f4ef6668STom Warren 29*f4ef6668STom Warren /* 30*f4ef6668STom Warren * Routine: gpio_config_uart 31*f4ef6668STom Warren * Description: Force GPIO_PI3 low on Seaboard so UART4 works. 32*f4ef6668STom Warren */ 33*f4ef6668STom Warren void gpio_config_uart(void) 34*f4ef6668STom Warren { 35*f4ef6668STom Warren int gp = GPIO_PI3; 36*f4ef6668STom Warren struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; 37*f4ef6668STom Warren struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; 38*f4ef6668STom Warren u32 val; 39*f4ef6668STom Warren 40*f4ef6668STom Warren /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ 41*f4ef6668STom Warren val = readl(&bank->gpio_config[GPIO_PORT(gp)]); 42*f4ef6668STom Warren val |= 1 << GPIO_BIT(gp); 43*f4ef6668STom Warren writel(val, &bank->gpio_config[GPIO_PORT(gp)]); 44*f4ef6668STom Warren 45*f4ef6668STom Warren val = readl(&bank->gpio_out[GPIO_PORT(gp)]); 46*f4ef6668STom Warren val &= ~(1 << GPIO_BIT(gp)); 47*f4ef6668STom Warren writel(val, &bank->gpio_out[GPIO_PORT(gp)]); 48*f4ef6668STom Warren 49*f4ef6668STom Warren val = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); 50*f4ef6668STom Warren val |= 1 << GPIO_BIT(gp); 51*f4ef6668STom Warren writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]); 52*f4ef6668STom Warren } 53