1f4ef6668STom Warren /* 2f4ef6668STom Warren * (C) Copyright 2010,2011 3f4ef6668STom Warren * NVIDIA Corporation <www.nvidia.com> 4f4ef6668STom Warren * 5f4ef6668STom Warren * See file CREDITS for list of people who contributed to this 6f4ef6668STom Warren * project. 7f4ef6668STom Warren * 8f4ef6668STom Warren * This program is free software; you can redistribute it and/or 9f4ef6668STom Warren * modify it under the terms of the GNU General Public License as 10f4ef6668STom Warren * published by the Free Software Foundation; either version 2 of 11f4ef6668STom Warren * the License, or (at your option) any later version. 12f4ef6668STom Warren * 13f4ef6668STom Warren * This program is distributed in the hope that it will be useful, 14f4ef6668STom Warren * but WITHOUT ANY WARRANTY; without even the implied warranty of 15f4ef6668STom Warren * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16f4ef6668STom Warren * GNU General Public License for more details. 17f4ef6668STom Warren * 18f4ef6668STom Warren * You should have received a copy of the GNU General Public License 19f4ef6668STom Warren * along with this program; if not, write to the Free Software 20f4ef6668STom Warren * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21f4ef6668STom Warren * MA 02111-1307 USA 22f4ef6668STom Warren */ 23f4ef6668STom Warren 24f4ef6668STom Warren #include <common.h> 25f4ef6668STom Warren #include <asm/io.h> 26f4ef6668STom Warren #include <asm/arch/tegra2.h> 27ca28090dSSimon Glass #include <asm/arch/clock.h> 28ca28090dSSimon Glass #include <asm/arch/funcmux.h> 29ae03661fSStephen Warren #include <asm/arch/pinmux.h> 30977a39e6SThierry Reding #include <asm/arch/mmc.h> 31ccf7988bSTom Warren #include <asm/gpio.h> 32*3f82d89dSTom Warren #ifdef CONFIG_TEGRA_MMC 33ccf7988bSTom Warren #include <mmc.h> 34ccf7988bSTom Warren #endif 35f4ef6668STom Warren 36a04eba99SSimon Glass /* TODO: Remove this code when the SPI switch is working */ 37a04eba99SSimon Glass #ifndef CONFIG_SPI_UART_SWITCH 38f4ef6668STom Warren /* 39d5ef19b9SStephen Warren * Routine: gpio_config_uart_seaboard 40f4ef6668STom Warren * Description: Force GPIO_PI3 low on Seaboard so UART4 works. 41f4ef6668STom Warren */ 42d5ef19b9SStephen Warren static void gpio_config_uart_seaboard(void) 43f4ef6668STom Warren { 44f4ef6668STom Warren /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ 455fac236aSStephen Warren gpio_request(GPIO_PI3, NULL); 465fac236aSStephen Warren gpio_direction_output(GPIO_PI3, 0); 47f4ef6668STom Warren } 48ccf7988bSTom Warren 49d5ef19b9SStephen Warren void gpio_config_uart(void) 50d5ef19b9SStephen Warren { 51d5ef19b9SStephen Warren if (machine_is_ventana()) 52d5ef19b9SStephen Warren return; 53d5ef19b9SStephen Warren gpio_config_uart_seaboard(); 54d5ef19b9SStephen Warren } 55a04eba99SSimon Glass #endif 56d5ef19b9SStephen Warren 57*3f82d89dSTom Warren #ifdef CONFIG_TEGRA_MMC 58ccf7988bSTom Warren /* 59ae03661fSStephen Warren * Routine: pin_mux_mmc 60ae03661fSStephen Warren * Description: setup the pin muxes/tristate values for the SDMMC(s) 61ae03661fSStephen Warren */ 62ae03661fSStephen Warren static void pin_mux_mmc(void) 63ae03661fSStephen Warren { 64ca28090dSSimon Glass funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); 65ca28090dSSimon Glass funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT); 66ae03661fSStephen Warren 67ae03661fSStephen Warren /* For power GPIO PI6 */ 68ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_ATA); 69ae03661fSStephen Warren /* For CD GPIO PI5 */ 70ae03661fSStephen Warren pinmux_tristate_disable(PINGRP_ATC); 71ae03661fSStephen Warren } 72ae03661fSStephen Warren 73ccf7988bSTom Warren /* this is a weak define that we are overriding */ 74ae03661fSStephen Warren int board_mmc_init(bd_t *bd) 75ae03661fSStephen Warren { 76ae03661fSStephen Warren debug("board_mmc_init called\n"); 77ae03661fSStephen Warren 78ae03661fSStephen Warren /* Enable muxes, etc. for SDMMC controllers */ 79ae03661fSStephen Warren pin_mux_mmc(); 80ae03661fSStephen Warren 81ae03661fSStephen Warren debug("board_mmc_init: init eMMC\n"); 82ae03661fSStephen Warren /* init dev 0, eMMC chip, with 4-bit bus */ 83ae03661fSStephen Warren /* The board has an 8-bit bus, but 8-bit doesn't work yet */ 849877841fSStephen Warren tegra2_mmc_init(0, 4, -1, -1); 85ae03661fSStephen Warren 86ae03661fSStephen Warren debug("board_mmc_init: init SD slot\n"); 87ae03661fSStephen Warren /* init dev 1, SD slot, with 4-bit bus */ 889877841fSStephen Warren tegra2_mmc_init(1, 4, GPIO_PI6, GPIO_PI5); 89ccf7988bSTom Warren 90ccf7988bSTom Warren return 0; 91ccf7988bSTom Warren } 92ccf7988bSTom Warren #endif 93f10393e5SSimon Glass 94f10393e5SSimon Glass void pin_mux_usb(void) 95f10393e5SSimon Glass { 96f10393e5SSimon Glass /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */ 97f10393e5SSimon Glass pinmux_tristate_disable(PINGRP_SLXK); 98f10393e5SSimon Glass } 99