xref: /rk3399_rockchip-uboot/board/micronas/vct/vcth/reg_dcgu.h (revision 326ea986ac150acdc7656d57fca647db80b50158)
12a61eff6SStefan Roese /*
22a61eff6SStefan Roese  * (C) Copyright 2008-2009 Stefan Roese <sr@denx.de>, DENX Software Engineering
32a61eff6SStefan Roese  *
4*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
52a61eff6SStefan Roese  */
62a61eff6SStefan Roese 
72a61eff6SStefan Roese #define DCGU_BASE		0x00084000
82a61eff6SStefan Roese 
92a61eff6SStefan Roese /* Relative offsets of the register adresses */
102a61eff6SStefan Roese 
112a61eff6SStefan Roese #define DCGU_CLK_EN1_OFFS	0x00000010
122a61eff6SStefan Roese #define DCGU_CLK_EN1(base)	((base) + DCGU_CLK_EN1_OFFS)
132a61eff6SStefan Roese #define DCGU_CLK_EN2_OFFS	0x00000014
142a61eff6SStefan Roese #define DCGU_CLK_EN2(base)	((base) + DCGU_CLK_EN2_OFFS)
152a61eff6SStefan Roese #define DCGU_RESET_UNIT1_OFFS	0x00000018
162a61eff6SStefan Roese #define DCGU_RESET_UNIT1(base)	((base) + DCGU_RESET_UNIT1_OFFS)
172a61eff6SStefan Roese #define DCGU_USBPHY_STAT_OFFS	0x00000054
182a61eff6SStefan Roese #define DCGU_USBPHY_STAT(base)	((base) + DCGU_USBPHY_STAT_OFFS)
192a61eff6SStefan Roese #define DCGU_EN_WDT_RESET_OFFS	0x00000064
202a61eff6SStefan Roese #define DCGU_EN_WDT_RESET(base)	((base) + DCGU_EN_WDT_RESET_OFFS)
212a61eff6SStefan Roese 
222a61eff6SStefan Roese /* The magic value to write in order to activate the WDT */
232a61eff6SStefan Roese #define DCGU_MAGIC_WDT		0x1909
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