1ae691e57SStefan Roese /* 2ae691e57SStefan Roese * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering 3ae691e57SStefan Roese * 4ae691e57SStefan Roese * Copyright (C) 2006 Micronas GmbH 5ae691e57SStefan Roese * 61a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7ae691e57SStefan Roese */ 8ae691e57SStefan Roese 9ae691e57SStefan Roese #include <asm/io.h> 10ae691e57SStefan Roese 11ae691e57SStefan Roese #include "bcu.h" 12ae691e57SStefan Roese #include "dcgu.h" 13ae691e57SStefan Roese #include "ebi.h" 14ae691e57SStefan Roese #include "scc.h" 15ae691e57SStefan Roese 16ae691e57SStefan Roese #ifdef CONFIG_VCT_PREMIUM 17ae691e57SStefan Roese /* Global start address of all memory mapped registers */ 18ae691e57SStefan Roese #define REG_GLOBAL_START_ADDR 0xbf800000 19ae691e57SStefan Roese #define TOP_BASE 0x000c8000 20ae691e57SStefan Roese 21ae691e57SStefan Roese #include "vcth/reg_ebi.h" 22ae691e57SStefan Roese #include "vcth/reg_dcgu.h" 23ae691e57SStefan Roese #include "vcth/reg_wdt.h" 24ae691e57SStefan Roese #include "vcth/reg_gpio.h" 25ae691e57SStefan Roese #include "vcth/reg_fwsram.h" 26ae691e57SStefan Roese #include "vcth/reg_scc.h" 27ae691e57SStefan Roese #include "vcth/reg_usbh.h" 28ae691e57SStefan Roese #endif 29ae691e57SStefan Roese 30ae691e57SStefan Roese #ifdef CONFIG_VCT_PLATINUM 31ae691e57SStefan Roese /* Global start address of all memory mapped registers */ 32ae691e57SStefan Roese #define REG_GLOBAL_START_ADDR 0xbf800000 33ae691e57SStefan Roese #define TOP_BASE 0x000c8000 34ae691e57SStefan Roese 35ae691e57SStefan Roese #include "vcth2/reg_ebi.h" 36ae691e57SStefan Roese #include "vcth/reg_dcgu.h" 37ae691e57SStefan Roese #include "vcth/reg_wdt.h" 38ae691e57SStefan Roese #include "vcth/reg_gpio.h" 39ae691e57SStefan Roese #include "vcth/reg_fwsram.h" 40ae691e57SStefan Roese #include "vcth/reg_scc.h" 41ae691e57SStefan Roese #include "vcth/reg_usbh.h" 42ae691e57SStefan Roese #endif 43ae691e57SStefan Roese 44ae691e57SStefan Roese #ifdef CONFIG_VCT_PLATINUMAVC 45ae691e57SStefan Roese /* Global start address of all memory mapped registers */ 46ae691e57SStefan Roese #define REG_GLOBAL_START_ADDR 0xbdc00000 47ae691e57SStefan Roese #define TOP_BASE 0x00050000 48ae691e57SStefan Roese 49ae691e57SStefan Roese #include "vctv/reg_ebi.h" 50ae691e57SStefan Roese #include "vctv/reg_dcgu.h" 51ae691e57SStefan Roese #include "vctv/reg_wdt.h" 52ae691e57SStefan Roese #include "vctv/reg_gpio.h" 53ae691e57SStefan Roese #endif 54ae691e57SStefan Roese 55ae691e57SStefan Roese #ifndef _VCT_H 56ae691e57SStefan Roese #define _VCT_H 57ae691e57SStefan Roese 58ae691e57SStefan Roese /* 59ae691e57SStefan Roese * Defines 60ae691e57SStefan Roese */ 61ae691e57SStefan Roese #define PRID_COMP_LEGACY 0x000000 62ae691e57SStefan Roese #define PRID_COMP_MIPS 0x010000 63ae691e57SStefan Roese #define PRID_IMP_LX4280 0xc200 64ae691e57SStefan Roese #define PRID_IMP_VGC 0x9000 65ae691e57SStefan Roese 66ae691e57SStefan Roese /* 67ae691e57SStefan Roese * Prototypes 68ae691e57SStefan Roese */ 69ae691e57SStefan Roese int ebi_initialize(void); 70ae691e57SStefan Roese int ebi_init_nor_flash(void); 71ae691e57SStefan Roese int ebi_init_onenand(void); 72ae691e57SStefan Roese int ebi_init_smc911x(void); 73ae691e57SStefan Roese u32 smc911x_reg_read(u32 addr); 74ae691e57SStefan Roese void smc911x_reg_write(u32 addr, u32 data); 75ae691e57SStefan Roese int top_set_pin(int pin, int func); 76ae691e57SStefan Roese void vct_pin_mux_initialize(void); 77ae691e57SStefan Roese 78ae691e57SStefan Roese /* 79ae691e57SStefan Roese * static inlines 80ae691e57SStefan Roese */ reg_write(u32 addr,u32 data)81ae691e57SStefan Roesestatic inline void reg_write(u32 addr, u32 data) 82ae691e57SStefan Roese { 83*0c7fd8f4SDaniel Schwierzeck void *reg = (void *)(addr + REG_GLOBAL_START_ADDR); 84*0c7fd8f4SDaniel Schwierzeck __raw_writel(data, reg); 85ae691e57SStefan Roese } 86ae691e57SStefan Roese reg_read(u32 addr)87ae691e57SStefan Roesestatic inline u32 reg_read(u32 addr) 88ae691e57SStefan Roese { 89*0c7fd8f4SDaniel Schwierzeck const void *reg = (const void *)(addr + REG_GLOBAL_START_ADDR); 90*0c7fd8f4SDaniel Schwierzeck return __raw_readl(reg); 91ae691e57SStefan Roese } 92ae691e57SStefan Roese 93ae691e57SStefan Roese #endif /* _VCT_H */ 94