150752790SStefan Roese /*
250752790SStefan Roese * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
350752790SStefan Roese *
4*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+
550752790SStefan Roese */
650752790SStefan Roese
750752790SStefan Roese #include <common.h>
850752790SStefan Roese #include <asm/io.h>
950752790SStefan Roese #include "vct.h"
1050752790SStefan Roese
ebi_read(u32 addr)1150752790SStefan Roese static u32 ebi_read(u32 addr)
1250752790SStefan Roese {
1350752790SStefan Roese addr &= ~0xFC000000;
1450752790SStefan Roese
1550752790SStefan Roese reg_write(EBI_CPU_IO_ACCS(EBI_BASE), EXT_DEVICE_CHANNEL_2 | addr);
1650752790SStefan Roese ebi_wait();
1750752790SStefan Roese
1850752790SStefan Roese return reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
1950752790SStefan Roese }
2050752790SStefan Roese
ebi_write_u16(u32 addr,u32 data,int fetchIO)2150752790SStefan Roese static int ebi_write_u16(u32 addr, u32 data, int fetchIO)
2250752790SStefan Roese {
2350752790SStefan Roese u32 val = (data << 16);
2450752790SStefan Roese
2550752790SStefan Roese addr &= ~0xFC000000;
2650752790SStefan Roese
2750752790SStefan Roese ebi_wait();
2850752790SStefan Roese
2950752790SStefan Roese reg_write(EBI_IO_ACCS_DATA(EBI_BASE), val);
3050752790SStefan Roese reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
3150752790SStefan Roese EXT_DEVICE_CHANNEL_2 | EBI_CPU_WRITE | addr);
3250752790SStefan Roese ebi_wait();
3350752790SStefan Roese
3450752790SStefan Roese if (fetchIO) {
3550752790SStefan Roese u32 counter = 0;
3650752790SStefan Roese while (!(reg_read(EBI_SIG_LEVEL(EBI_BASE)) & EXT_CPU_IORDY_SL)) {
3750752790SStefan Roese if (counter++ > 0xFFFFFF)
3850752790SStefan Roese return 1;
3950752790SStefan Roese }
4050752790SStefan Roese }
4150752790SStefan Roese
4250752790SStefan Roese return 0;
4350752790SStefan Roese }
4450752790SStefan Roese
ebi_read_u16(u32 addr)4550752790SStefan Roese static u16 ebi_read_u16(u32 addr)
4650752790SStefan Roese {
4750752790SStefan Roese return ((ebi_read(addr) >> 16) & 0xFFFF);
4850752790SStefan Roese }
4950752790SStefan Roese
ebi_read_u8(u32 addr)5050752790SStefan Roese static u8 ebi_read_u8(u32 addr)
5150752790SStefan Roese {
5250752790SStefan Roese u32 val = ebi_read(addr) >> 16;
5350752790SStefan Roese
5450752790SStefan Roese if (addr & 0x1)
5550752790SStefan Roese return val & 0xff;
5650752790SStefan Roese else
5750752790SStefan Roese return (val >> 8) & 0xff;
5850752790SStefan Roese }
5950752790SStefan Roese
6050752790SStefan Roese /*
6150752790SStefan Roese * EBI initialization for NOR FLASH access
6250752790SStefan Roese */
ebi_init_nor_flash(void)6350752790SStefan Roese int ebi_init_nor_flash(void)
6450752790SStefan Roese {
6550752790SStefan Roese reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000);
6650752790SStefan Roese
6750752790SStefan Roese reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x400002);
6850752790SStefan Roese reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50);
6950752790SStefan Roese
7050752790SStefan Roese reg_write(EBI_DEV2_TIM1_RD1(EBI_BASE), 0x409113);
7150752790SStefan Roese reg_write(EBI_DEV2_TIM1_RD2(EBI_BASE), 0xFF01000);
7250752790SStefan Roese reg_write(EBI_DEV2_TIM1_WR1(EBI_BASE), 0x04003113);
7350752790SStefan Roese reg_write(EBI_DEV2_TIM1_WR2(EBI_BASE), 0x3FC12011);
7450752790SStefan Roese reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000);
7550752790SStefan Roese
7650752790SStefan Roese return 0;
7750752790SStefan Roese }
7850752790SStefan Roese
7950752790SStefan Roese /*
8050752790SStefan Roese * Accessor functions replacing the "weak" functions in
8150752790SStefan Roese * drivers/mtd/cfi_flash.c
8250752790SStefan Roese */
flash_write8(u8 value,void * addr)8350752790SStefan Roese void flash_write8(u8 value, void *addr)
8450752790SStefan Roese {
8550752790SStefan Roese ebi_write_u16((u32)addr, value, 0);
8650752790SStefan Roese }
8750752790SStefan Roese
flash_write16(u16 value,void * addr)8850752790SStefan Roese void flash_write16(u16 value, void *addr)
8950752790SStefan Roese {
9050752790SStefan Roese ebi_write_u16((u32)addr, value, 0);
9150752790SStefan Roese }
9250752790SStefan Roese
flash_read8(void * addr)9350752790SStefan Roese u8 flash_read8(void *addr)
9450752790SStefan Roese {
9550752790SStefan Roese return ebi_read_u8((u32)addr);
9650752790SStefan Roese }
9750752790SStefan Roese
flash_read16(void * addr)9850752790SStefan Roese u16 flash_read16(void *addr)
9950752790SStefan Roese {
10050752790SStefan Roese return ebi_read_u16((u32)addr);
10150752790SStefan Roese }
10250752790SStefan Roese
flash_read32(void * addr)10350752790SStefan Roese u32 flash_read32(void *addr)
10450752790SStefan Roese {
10550752790SStefan Roese return ((u32)ebi_read_u16((u32)addr) << 16) |
10650752790SStefan Roese ebi_read_u16((u32)addr + 2);
10750752790SStefan Roese }
10850752790SStefan Roese
board_flash_read_memcpy(void * dest,const void * src,size_t count)10950752790SStefan Roese void *board_flash_read_memcpy(void *dest, const void *src, size_t count)
11050752790SStefan Roese {
11150752790SStefan Roese u16 *tmp = (u16 *)dest, *s = (u16 *)src;
11250752790SStefan Roese int i;
11350752790SStefan Roese
11450752790SStefan Roese for (i = 0; i < count; i += 2)
11550752790SStefan Roese *tmp++ = flash_read16(s++);
11650752790SStefan Roese
11750752790SStefan Roese return dest;
11850752790SStefan Roese }
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