1ad8783cbSPaul Burton /* 2ad8783cbSPaul Burton * Copyright (C) 2016 Imagination Technologies 3ad8783cbSPaul Burton * 4ad8783cbSPaul Burton * SPDX-License-Identifier: GPL-2.0 5ad8783cbSPaul Burton */ 6ad8783cbSPaul Burton 7ad8783cbSPaul Burton #include <common.h> 8ad8783cbSPaul Burton 9ad8783cbSPaul Burton #include <asm/io.h> 10ad8783cbSPaul Burton 11ad8783cbSPaul Burton #include "boston-regs.h" 12ad8783cbSPaul Burton 13088454cdSSimon Glass DECLARE_GLOBAL_DATA_PTR; 14088454cdSSimon Glass dram_init(void)15*f1683aa7SSimon Glassint dram_init(void) 16ad8783cbSPaul Burton { 17ad8783cbSPaul Burton u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0); 18ad8783cbSPaul Burton 19088454cdSSimon Glass gd->ram_size = (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) << 20088454cdSSimon Glass 30; 21088454cdSSimon Glass 22088454cdSSimon Glass return 0; 23ad8783cbSPaul Burton } 24ad8783cbSPaul Burton board_get_usable_ram_top(ulong total_size)25ad8783cbSPaul Burtonulong board_get_usable_ram_top(ulong total_size) 26ad8783cbSPaul Burton { 27ad8783cbSPaul Burton DECLARE_GLOBAL_DATA_PTR; 28ad8783cbSPaul Burton 29ad8783cbSPaul Burton if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) { 30ad8783cbSPaul Burton /* 2GB wrapped around to 0 */ 31ad8783cbSPaul Burton return CKSEG0ADDR(256 << 20); 32ad8783cbSPaul Burton } 33ad8783cbSPaul Burton 34ad8783cbSPaul Burton return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20)); 35ad8783cbSPaul Burton } 36