1 /* 2 * (C) Copyright 2010 3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <i2c.h> 10 #include <malloc.h> 11 12 #include "ch7301.h" 13 #include "dp501.h" 14 #include <gdsys_fpga.h> 15 16 #define ICS8N3QV01_I2C_ADDR 0x6E 17 #define ICS8N3QV01_FREF 114285000 18 #define ICS8N3QV01_FREF_LL 114285000LL 19 #define ICS8N3QV01_F_DEFAULT_0 156250000LL 20 #define ICS8N3QV01_F_DEFAULT_1 125000000LL 21 #define ICS8N3QV01_F_DEFAULT_2 100000000LL 22 #define ICS8N3QV01_F_DEFAULT_3 25175000LL 23 24 #define SIL1178_MASTER_I2C_ADDRESS 0x38 25 #define SIL1178_SLAVE_I2C_ADDRESS 0x39 26 27 #define DP501_I2C_ADDR 0x08 28 29 #define PIXCLK_640_480_60 25180000 30 31 unsigned int base_width; 32 unsigned int base_height; 33 size_t bufsize; 34 u16 *buf; 35 36 unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1; 37 38 #ifdef CONFIG_SYS_ICS8N3QV01_I2C 39 int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C; 40 #endif 41 42 #ifdef CONFIG_SYS_SIL1178_I2C 43 int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C; 44 #endif 45 46 #ifdef CONFIG_SYS_DP501_I2C 47 int dp501_i2c[] = CONFIG_SYS_DP501_I2C; 48 #endif 49 50 51 #ifdef CONFIG_SYS_MPC92469AC 52 static void mpc92469ac_calc_parameters(unsigned int fout, 53 unsigned int *post_div, unsigned int *feedback_div) 54 { 55 unsigned int n = *post_div; 56 unsigned int m = *feedback_div; 57 unsigned int a; 58 unsigned int b = 14745600 / 16; 59 60 if (fout < 50169600) 61 n = 8; 62 else if (fout < 100339199) 63 n = 4; 64 else if (fout < 200678399) 65 n = 2; 66 else 67 n = 1; 68 69 a = fout * n + (b / 2); /* add b/2 for proper rounding */ 70 71 m = a / b; 72 73 *post_div = n; 74 *feedback_div = m; 75 } 76 77 static void mpc92469ac_set(unsigned screen, unsigned int fout) 78 { 79 unsigned int n; 80 unsigned int m; 81 unsigned int bitval = 0; 82 mpc92469ac_calc_parameters(fout, &n, &m); 83 84 switch (n) { 85 case 1: 86 bitval = 0x00; 87 break; 88 case 2: 89 bitval = 0x01; 90 break; 91 case 4: 92 bitval = 0x02; 93 break; 94 case 8: 95 bitval = 0x03; 96 break; 97 } 98 99 FPGA_SET_REG(screen, mpc3w_control, (bitval << 9) | m); 100 } 101 #endif 102 103 #ifdef CONFIG_SYS_ICS8N3QV01_I2C 104 105 static unsigned int ics8n3qv01_get_fout_calc(unsigned index) 106 { 107 unsigned long long n; 108 unsigned long long mint; 109 unsigned long long mfrac; 110 u8 reg_a, reg_b, reg_c, reg_d, reg_f; 111 unsigned long long fout_calc; 112 113 if (index > 3) 114 return 0; 115 116 reg_a = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 0 + index); 117 reg_b = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 4 + index); 118 reg_c = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 8 + index); 119 reg_d = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 12 + index); 120 reg_f = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 20 + index); 121 122 mint = ((reg_a >> 1) & 0x1f) | (reg_f & 0x20); 123 mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1) 124 | (reg_d >> 7); 125 n = reg_d & 0x7f; 126 127 fout_calc = (mint * ICS8N3QV01_FREF_LL 128 + mfrac * ICS8N3QV01_FREF_LL / 262144LL 129 + ICS8N3QV01_FREF_LL / 524288LL 130 + n / 2) 131 / n 132 * 1000000 133 / (1000000 - 100); 134 135 return fout_calc; 136 } 137 138 139 static void ics8n3qv01_calc_parameters(unsigned int fout, 140 unsigned int *_mint, unsigned int *_mfrac, 141 unsigned int *_n) 142 { 143 unsigned int n; 144 unsigned int foutiic; 145 unsigned int fvcoiic; 146 unsigned int mint; 147 unsigned long long mfrac; 148 149 n = (2215000000U + fout / 2) / fout; 150 if ((n & 1) && (n > 5)) 151 n -= 1; 152 153 foutiic = fout - (fout / 10000); 154 fvcoiic = foutiic * n; 155 156 mint = fvcoiic / 114285000; 157 if ((mint < 17) || (mint > 63)) 158 printf("ics8n3qv01_calc_parameters: cannot determine mint\n"); 159 160 mfrac = ((unsigned long long)fvcoiic % 114285000LL) * 262144LL 161 / 114285000LL; 162 163 *_mint = mint; 164 *_mfrac = mfrac; 165 *_n = n; 166 } 167 168 static void ics8n3qv01_set(unsigned int fout) 169 { 170 unsigned int n; 171 unsigned int mint; 172 unsigned int mfrac; 173 unsigned int fout_calc; 174 unsigned long long fout_prog; 175 long long off_ppm; 176 u8 reg0, reg4, reg8, reg12, reg18, reg20; 177 178 fout_calc = ics8n3qv01_get_fout_calc(1); 179 off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000 180 / ICS8N3QV01_F_DEFAULT_1; 181 printf(" PLL is off by %lld ppm\n", off_ppm); 182 fout_prog = (unsigned long long)fout * (unsigned long long)fout_calc 183 / ICS8N3QV01_F_DEFAULT_1; 184 ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n); 185 186 reg0 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 0) & 0xc0; 187 reg0 |= (mint & 0x1f) << 1; 188 reg0 |= (mfrac >> 17) & 0x01; 189 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 0, reg0); 190 191 reg4 = mfrac >> 9; 192 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 4, reg4); 193 194 reg8 = mfrac >> 1; 195 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 8, reg8); 196 197 reg12 = mfrac << 7; 198 reg12 |= n & 0x7f; 199 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 12, reg12); 200 201 reg18 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 18) & 0x03; 202 reg18 |= 0x20; 203 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 18, reg18); 204 205 reg20 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 20) & 0x1f; 206 reg20 |= mint & (1 << 5); 207 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 20, reg20); 208 } 209 #endif 210 211 static int osd_write_videomem(unsigned screen, unsigned offset, 212 u16 *data, size_t charcount) 213 { 214 unsigned int k; 215 216 for (k = 0; k < charcount; ++k) { 217 if (offset + k >= bufsize) 218 return -1; 219 FPGA_SET_REG(screen, videomem[offset + k], data[k]); 220 } 221 222 return charcount; 223 } 224 225 static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 226 { 227 unsigned screen; 228 229 for (screen = 0; screen <= max_osd_screen; ++screen) { 230 unsigned x; 231 unsigned y; 232 unsigned charcount; 233 unsigned len; 234 u8 color; 235 unsigned int k; 236 char *text; 237 int res; 238 239 if (argc < 5) { 240 cmd_usage(cmdtp); 241 return 1; 242 } 243 244 x = simple_strtoul(argv[1], NULL, 16); 245 y = simple_strtoul(argv[2], NULL, 16); 246 color = simple_strtoul(argv[3], NULL, 16); 247 text = argv[4]; 248 charcount = strlen(text); 249 len = (charcount > bufsize) ? bufsize : charcount; 250 251 for (k = 0; k < len; ++k) 252 buf[k] = (text[k] << 8) | color; 253 254 res = osd_write_videomem(screen, y * base_width + x, buf, len); 255 if (res < 0) 256 return res; 257 } 258 259 return 0; 260 } 261 262 int osd_probe(unsigned screen) 263 { 264 u16 version; 265 u16 features; 266 int old_bus = i2c_get_bus_num(); 267 bool pixclock_present = false; 268 bool output_driver_present = false; 269 270 FPGA_GET_REG(0, osd.version, &version); 271 FPGA_GET_REG(0, osd.features, &features); 272 273 base_width = ((features & 0x3f00) >> 8) + 1; 274 base_height = (features & 0x001f) + 1; 275 bufsize = base_width * base_height; 276 buf = malloc(sizeof(u16) * bufsize); 277 if (!buf) 278 return -1; 279 280 printf("OSD%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n", 281 screen, version/100, version%100, base_width, base_height); 282 283 /* setup pixclock */ 284 285 #ifdef CONFIG_SYS_MPC92469AC 286 pixclock_present = true; 287 mpc92469ac_set(screen, PIXCLK_640_480_60); 288 #endif 289 290 #ifdef CONFIG_SYS_ICS8N3QV01_I2C 291 i2c_set_bus_num(ics8n3qv01_i2c[screen]); 292 if (!i2c_probe(ICS8N3QV01_I2C_ADDR)) { 293 ics8n3qv01_set(PIXCLK_640_480_60); 294 pixclock_present = true; 295 } 296 #endif 297 298 if (!pixclock_present) 299 printf(" no pixelclock found\n"); 300 301 /* setup output driver */ 302 303 #ifdef CONFIG_SYS_CH7301_I2C 304 if (!ch7301_probe(screen, true)) 305 output_driver_present = true; 306 #endif 307 308 #ifdef CONFIG_SYS_SIL1178_I2C 309 i2c_set_bus_num(sil1178_i2c[screen]); 310 if (!i2c_probe(SIL1178_SLAVE_I2C_ADDRESS)) { 311 if (i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02) == 0x06) { 312 /* 313 * magic initialization sequence, 314 * adapted from datasheet 315 */ 316 i2c_reg_write(SIL1178_SLAVE_I2C_ADDRESS, 0x08, 0x36); 317 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x44); 318 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x4c); 319 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0e, 0x10); 320 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0a, 0x80); 321 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x09, 0x30); 322 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0c, 0x89); 323 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0d, 0x60); 324 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x36); 325 i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37); 326 output_driver_present = true; 327 } 328 } 329 #endif 330 331 #ifdef CONFIG_SYS_DP501_I2C 332 i2c_set_bus_num(dp501_i2c[screen]); 333 if (!i2c_probe(DP501_I2C_ADDR)) { 334 dp501_powerup(DP501_I2C_ADDR); 335 output_driver_present = true; 336 } 337 #endif 338 339 if (!output_driver_present) 340 printf(" no output driver found\n"); 341 342 FPGA_SET_REG(screen, osd.control, 0x0049); 343 344 FPGA_SET_REG(screen, osd.xy_size, ((32 - 1) << 8) | (16 - 1)); 345 FPGA_SET_REG(screen, osd.x_pos, 0x007f); 346 FPGA_SET_REG(screen, osd.y_pos, 0x005f); 347 348 if (screen > max_osd_screen) 349 max_osd_screen = screen; 350 351 i2c_set_bus_num(old_bus); 352 353 return 0; 354 } 355 356 int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 357 { 358 unsigned screen; 359 360 for (screen = 0; screen <= max_osd_screen; ++screen) { 361 unsigned x; 362 unsigned y; 363 unsigned k; 364 u16 buffer[base_width]; 365 char *rp; 366 u16 *wp = buffer; 367 unsigned count = (argc > 4) ? 368 simple_strtoul(argv[4], NULL, 16) : 1; 369 370 if ((argc < 4) || (strlen(argv[3]) % 4)) { 371 cmd_usage(cmdtp); 372 return 1; 373 } 374 375 x = simple_strtoul(argv[1], NULL, 16); 376 y = simple_strtoul(argv[2], NULL, 16); 377 rp = argv[3]; 378 379 380 while (*rp) { 381 char substr[5]; 382 383 memcpy(substr, rp, 4); 384 substr[4] = 0; 385 *wp = simple_strtoul(substr, NULL, 16); 386 387 rp += 4; 388 wp++; 389 if (wp - buffer > base_width) 390 break; 391 } 392 393 for (k = 0; k < count; ++k) { 394 unsigned offset = 395 y * base_width + x + k * (wp - buffer); 396 osd_write_videomem(screen, offset, buffer, 397 wp - buffer); 398 } 399 } 400 401 return 0; 402 } 403 404 U_BOOT_CMD( 405 osdw, 5, 0, osd_write, 406 "write 16-bit hex encoded buffer to osd memory", 407 "pos_x pos_y buffer count\n" 408 ); 409 410 U_BOOT_CMD( 411 osdp, 5, 0, osd_print, 412 "write ASCII buffer to osd memory", 413 "pos_x pos_y color text\n" 414 ); 415