1a3f9d6c7SDirk Eibach /*
2a3f9d6c7SDirk Eibach * (C) Copyright 2014
3a3f9d6c7SDirk Eibach * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4a3f9d6c7SDirk Eibach *
5a3f9d6c7SDirk Eibach * SPDX-License-Identifier: GPL-2.0+
6a3f9d6c7SDirk Eibach */
7a3f9d6c7SDirk Eibach
8a3f9d6c7SDirk Eibach #include <common.h>
9a3f9d6c7SDirk Eibach
10a3f9d6c7SDirk Eibach #include <gdsys_fpga.h>
11a3f9d6c7SDirk Eibach
12a3f9d6c7SDirk Eibach enum {
13a3f9d6c7SDirk Eibach UNITTYPE_MAIN_SERVER = 0,
14a3f9d6c7SDirk Eibach UNITTYPE_MAIN_USER = 1,
15a3f9d6c7SDirk Eibach UNITTYPE_VIDEO_SERVER = 2,
16a3f9d6c7SDirk Eibach UNITTYPE_VIDEO_USER = 3,
17a3f9d6c7SDirk Eibach };
18a3f9d6c7SDirk Eibach
19a3f9d6c7SDirk Eibach enum {
20a3f9d6c7SDirk Eibach UNITTYPEPCB_DVI = 0,
21a3f9d6c7SDirk Eibach UNITTYPEPCB_DP_165 = 1,
22a3f9d6c7SDirk Eibach UNITTYPEPCB_DP_300 = 2,
23a3f9d6c7SDirk Eibach UNITTYPEPCB_HDMI = 3,
24a3f9d6c7SDirk Eibach };
25a3f9d6c7SDirk Eibach
26a3f9d6c7SDirk Eibach enum {
27a3f9d6c7SDirk Eibach COMPRESSION_NONE = 0,
28*52b13f27SDirk Eibach COMPRESSION_TYPE_1 = 1,
29*52b13f27SDirk Eibach COMPRESSION_TYPE_1_2 = 3,
30*52b13f27SDirk Eibach COMPRESSION_TYPE_1_2_3 = 7,
31a3f9d6c7SDirk Eibach };
32a3f9d6c7SDirk Eibach
33a3f9d6c7SDirk Eibach enum {
34a3f9d6c7SDirk Eibach AUDIO_NONE = 0,
35a3f9d6c7SDirk Eibach AUDIO_TX = 1,
36a3f9d6c7SDirk Eibach AUDIO_RX = 2,
37a3f9d6c7SDirk Eibach AUDIO_RXTX = 3,
38a3f9d6c7SDirk Eibach };
39a3f9d6c7SDirk Eibach
40a3f9d6c7SDirk Eibach enum {
41a3f9d6c7SDirk Eibach SYSCLK_147456 = 0,
42a3f9d6c7SDirk Eibach };
43a3f9d6c7SDirk Eibach
44a3f9d6c7SDirk Eibach enum {
45a3f9d6c7SDirk Eibach RAM_DDR2_32 = 0,
46a3f9d6c7SDirk Eibach RAM_DDR3_32 = 1,
47d4e58888SDirk Eibach RAM_DDR3_48 = 2,
48a3f9d6c7SDirk Eibach };
49a3f9d6c7SDirk Eibach
50a3f9d6c7SDirk Eibach enum {
51a3f9d6c7SDirk Eibach CARRIER_SPEED_1G = 0,
52a3f9d6c7SDirk Eibach CARRIER_SPEED_2_5G = 1,
53a3f9d6c7SDirk Eibach };
54a3f9d6c7SDirk Eibach
ioep_fpga_has_osd(unsigned int fpga)55a3f9d6c7SDirk Eibach bool ioep_fpga_has_osd(unsigned int fpga)
56a3f9d6c7SDirk Eibach {
57a3f9d6c7SDirk Eibach u16 fpga_features;
58a3f9d6c7SDirk Eibach unsigned feature_osd;
59a3f9d6c7SDirk Eibach
60a3f9d6c7SDirk Eibach FPGA_GET_REG(0, fpga_features, &fpga_features);
61a3f9d6c7SDirk Eibach feature_osd = fpga_features & (1<<11);
62a3f9d6c7SDirk Eibach
63a3f9d6c7SDirk Eibach return feature_osd;
64a3f9d6c7SDirk Eibach }
65a3f9d6c7SDirk Eibach
ioep_fpga_print_info(unsigned int fpga)66a3f9d6c7SDirk Eibach void ioep_fpga_print_info(unsigned int fpga)
67a3f9d6c7SDirk Eibach {
68a3f9d6c7SDirk Eibach u16 versions;
69a3f9d6c7SDirk Eibach u16 fpga_version;
70a3f9d6c7SDirk Eibach u16 fpga_features;
71a3f9d6c7SDirk Eibach unsigned unit_type;
72a3f9d6c7SDirk Eibach unsigned unit_type_pcb_video;
73a3f9d6c7SDirk Eibach unsigned feature_compression;
74a3f9d6c7SDirk Eibach unsigned feature_osd;
75a3f9d6c7SDirk Eibach unsigned feature_audio;
76a3f9d6c7SDirk Eibach unsigned feature_sysclock;
77a3f9d6c7SDirk Eibach unsigned feature_ramconfig;
78a3f9d6c7SDirk Eibach unsigned feature_carrier_speed;
79a3f9d6c7SDirk Eibach unsigned feature_carriers;
80a3f9d6c7SDirk Eibach unsigned feature_video_channels;
81a3f9d6c7SDirk Eibach
82a3f9d6c7SDirk Eibach FPGA_GET_REG(fpga, versions, &versions);
83a3f9d6c7SDirk Eibach FPGA_GET_REG(fpga, fpga_version, &fpga_version);
84a3f9d6c7SDirk Eibach FPGA_GET_REG(fpga, fpga_features, &fpga_features);
85a3f9d6c7SDirk Eibach
86a3f9d6c7SDirk Eibach unit_type = (versions & 0xf000) >> 12;
87a3f9d6c7SDirk Eibach unit_type_pcb_video = (versions & 0x01c0) >> 6;
88a3f9d6c7SDirk Eibach feature_compression = (fpga_features & 0xe000) >> 13;
89a3f9d6c7SDirk Eibach feature_osd = fpga_features & (1<<11);
90a3f9d6c7SDirk Eibach feature_audio = (fpga_features & 0x0600) >> 9;
91a3f9d6c7SDirk Eibach feature_sysclock = (fpga_features & 0x0180) >> 7;
92a3f9d6c7SDirk Eibach feature_ramconfig = (fpga_features & 0x0060) >> 5;
93a3f9d6c7SDirk Eibach feature_carrier_speed = fpga_features & (1<<4);
94a3f9d6c7SDirk Eibach feature_carriers = (fpga_features & 0x000c) >> 2;
95a3f9d6c7SDirk Eibach feature_video_channels = fpga_features & 0x0003;
96a3f9d6c7SDirk Eibach
97a3f9d6c7SDirk Eibach switch (unit_type) {
98a3f9d6c7SDirk Eibach case UNITTYPE_MAIN_SERVER:
99a3f9d6c7SDirk Eibach case UNITTYPE_MAIN_USER:
100a3f9d6c7SDirk Eibach printf("Mainchannel");
101a3f9d6c7SDirk Eibach break;
102a3f9d6c7SDirk Eibach
103a3f9d6c7SDirk Eibach case UNITTYPE_VIDEO_SERVER:
104a3f9d6c7SDirk Eibach case UNITTYPE_VIDEO_USER:
105a3f9d6c7SDirk Eibach printf("Videochannel");
106a3f9d6c7SDirk Eibach break;
107a3f9d6c7SDirk Eibach
108a3f9d6c7SDirk Eibach default:
109a3f9d6c7SDirk Eibach printf("UnitType %d(not supported)", unit_type);
110a3f9d6c7SDirk Eibach break;
111a3f9d6c7SDirk Eibach }
112a3f9d6c7SDirk Eibach
113a3f9d6c7SDirk Eibach switch (unit_type) {
114a3f9d6c7SDirk Eibach case UNITTYPE_MAIN_SERVER:
115a3f9d6c7SDirk Eibach case UNITTYPE_VIDEO_SERVER:
116a3f9d6c7SDirk Eibach printf(" Server");
117a3f9d6c7SDirk Eibach if (versions & (1<<4))
118a3f9d6c7SDirk Eibach printf(" UC");
119a3f9d6c7SDirk Eibach break;
120a3f9d6c7SDirk Eibach
121a3f9d6c7SDirk Eibach case UNITTYPE_MAIN_USER:
122a3f9d6c7SDirk Eibach case UNITTYPE_VIDEO_USER:
123a3f9d6c7SDirk Eibach printf(" User");
124a3f9d6c7SDirk Eibach break;
125a3f9d6c7SDirk Eibach
126a3f9d6c7SDirk Eibach default:
127a3f9d6c7SDirk Eibach break;
128a3f9d6c7SDirk Eibach }
129a3f9d6c7SDirk Eibach
130a3f9d6c7SDirk Eibach if (versions & (1<<5))
131a3f9d6c7SDirk Eibach printf(" Fiber");
132a3f9d6c7SDirk Eibach else
133a3f9d6c7SDirk Eibach printf(" CAT");
134a3f9d6c7SDirk Eibach
135a3f9d6c7SDirk Eibach switch (unit_type_pcb_video) {
136a3f9d6c7SDirk Eibach case UNITTYPEPCB_DVI:
137a3f9d6c7SDirk Eibach printf(" DVI,");
138a3f9d6c7SDirk Eibach break;
139a3f9d6c7SDirk Eibach
140a3f9d6c7SDirk Eibach case UNITTYPEPCB_DP_165:
141a3f9d6c7SDirk Eibach printf(" DP 165MPix/s,");
142a3f9d6c7SDirk Eibach break;
143a3f9d6c7SDirk Eibach
144a3f9d6c7SDirk Eibach case UNITTYPEPCB_DP_300:
145a3f9d6c7SDirk Eibach printf(" DP 300MPix/s,");
146a3f9d6c7SDirk Eibach break;
147a3f9d6c7SDirk Eibach
148a3f9d6c7SDirk Eibach case UNITTYPEPCB_HDMI:
149a3f9d6c7SDirk Eibach printf(" HDMI,");
150a3f9d6c7SDirk Eibach break;
151a3f9d6c7SDirk Eibach }
152a3f9d6c7SDirk Eibach
153a3f9d6c7SDirk Eibach printf(" FPGA V %d.%02d\n features:",
154a3f9d6c7SDirk Eibach fpga_version / 100, fpga_version % 100);
155a3f9d6c7SDirk Eibach
156a3f9d6c7SDirk Eibach
157a3f9d6c7SDirk Eibach switch (feature_compression) {
158a3f9d6c7SDirk Eibach case COMPRESSION_NONE:
159a3f9d6c7SDirk Eibach printf(" no compression");
160a3f9d6c7SDirk Eibach break;
161a3f9d6c7SDirk Eibach
162*52b13f27SDirk Eibach case COMPRESSION_TYPE_1:
163*52b13f27SDirk Eibach printf(" compression type1(delta)");
164a3f9d6c7SDirk Eibach break;
165a3f9d6c7SDirk Eibach
166*52b13f27SDirk Eibach case COMPRESSION_TYPE_1_2:
167*52b13f27SDirk Eibach printf(" compression type1(delta), type2(inline)");
168*52b13f27SDirk Eibach break;
169*52b13f27SDirk Eibach
170*52b13f27SDirk Eibach case COMPRESSION_TYPE_1_2_3:
171*52b13f27SDirk Eibach printf(" compression type1(delta), type2(inline), type3(intempo)");
172a3f9d6c7SDirk Eibach break;
173a3f9d6c7SDirk Eibach
174a3f9d6c7SDirk Eibach default:
175a3f9d6c7SDirk Eibach printf(" compression %d(not supported)", feature_compression);
176a3f9d6c7SDirk Eibach break;
177a3f9d6c7SDirk Eibach }
178a3f9d6c7SDirk Eibach
179a3f9d6c7SDirk Eibach printf(", %sosd", feature_osd ? "" : "no ");
180a3f9d6c7SDirk Eibach
181a3f9d6c7SDirk Eibach switch (feature_audio) {
182a3f9d6c7SDirk Eibach case AUDIO_NONE:
183a3f9d6c7SDirk Eibach printf(", no audio");
184a3f9d6c7SDirk Eibach break;
185a3f9d6c7SDirk Eibach
186a3f9d6c7SDirk Eibach case AUDIO_TX:
187a3f9d6c7SDirk Eibach printf(", audio tx");
188a3f9d6c7SDirk Eibach break;
189a3f9d6c7SDirk Eibach
190a3f9d6c7SDirk Eibach case AUDIO_RX:
191a3f9d6c7SDirk Eibach printf(", audio rx");
192a3f9d6c7SDirk Eibach break;
193a3f9d6c7SDirk Eibach
194a3f9d6c7SDirk Eibach case AUDIO_RXTX:
195a3f9d6c7SDirk Eibach printf(", audio rx+tx");
196a3f9d6c7SDirk Eibach break;
197a3f9d6c7SDirk Eibach
198a3f9d6c7SDirk Eibach default:
199a3f9d6c7SDirk Eibach printf(", audio %d(not supported)", feature_audio);
200a3f9d6c7SDirk Eibach break;
201a3f9d6c7SDirk Eibach }
202a3f9d6c7SDirk Eibach
203a3f9d6c7SDirk Eibach puts(",\n ");
204a3f9d6c7SDirk Eibach
205a3f9d6c7SDirk Eibach switch (feature_sysclock) {
206a3f9d6c7SDirk Eibach case SYSCLK_147456:
207a3f9d6c7SDirk Eibach printf("clock 147.456 MHz");
208a3f9d6c7SDirk Eibach break;
209a3f9d6c7SDirk Eibach
210a3f9d6c7SDirk Eibach default:
211a3f9d6c7SDirk Eibach printf("clock %d(not supported)", feature_sysclock);
212a3f9d6c7SDirk Eibach break;
213a3f9d6c7SDirk Eibach }
214a3f9d6c7SDirk Eibach
215a3f9d6c7SDirk Eibach switch (feature_ramconfig) {
216a3f9d6c7SDirk Eibach case RAM_DDR2_32:
217a3f9d6c7SDirk Eibach printf(", RAM 32 bit DDR2");
218a3f9d6c7SDirk Eibach break;
219a3f9d6c7SDirk Eibach
220a3f9d6c7SDirk Eibach case RAM_DDR3_32:
221a3f9d6c7SDirk Eibach printf(", RAM 32 bit DDR3");
222a3f9d6c7SDirk Eibach break;
223a3f9d6c7SDirk Eibach
224d4e58888SDirk Eibach case RAM_DDR3_48:
225d4e58888SDirk Eibach printf(", RAM 48 bit DDR3");
226d4e58888SDirk Eibach break;
227d4e58888SDirk Eibach
228a3f9d6c7SDirk Eibach default:
229a3f9d6c7SDirk Eibach printf(", RAM %d(not supported)", feature_ramconfig);
230a3f9d6c7SDirk Eibach break;
231a3f9d6c7SDirk Eibach }
232a3f9d6c7SDirk Eibach
233a3f9d6c7SDirk Eibach printf(", %d carrier(s) %s", feature_carriers,
234a3f9d6c7SDirk Eibach feature_carrier_speed ? "2.5Gbit/s" : "1Gbit/s");
235a3f9d6c7SDirk Eibach
236a3f9d6c7SDirk Eibach printf(", %d video channel(s)\n", feature_video_channels);
237a3f9d6c7SDirk Eibach }
238