1*15f05610SDirk Eibach /*
2*15f05610SDirk Eibach * (C) Copyright 2013
3*15f05610SDirk Eibach * Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc
4*15f05610SDirk Eibach *
5*15f05610SDirk Eibach * SPDX-License-Identifier: GPL-2.0+
6*15f05610SDirk Eibach */
7*15f05610SDirk Eibach
8*15f05610SDirk Eibach #include <common.h>
9*15f05610SDirk Eibach #include <malloc.h>
10*15f05610SDirk Eibach #include <fs.h>
11*15f05610SDirk Eibach #include <i2c.h>
12*15f05610SDirk Eibach #include <mmc.h>
13*15f05610SDirk Eibach #include <tpm.h>
14*15f05610SDirk Eibach #include <u-boot/sha1.h>
15*15f05610SDirk Eibach #include <asm/byteorder.h>
16*15f05610SDirk Eibach #include <asm/unaligned.h>
17*15f05610SDirk Eibach #include <pca9698.h>
18*15f05610SDirk Eibach
19*15f05610SDirk Eibach #include "hre.h"
20*15f05610SDirk Eibach
21*15f05610SDirk Eibach /* other constants */
22*15f05610SDirk Eibach enum {
23*15f05610SDirk Eibach ESDHC_BOOT_IMAGE_SIG_OFS = 0x40,
24*15f05610SDirk Eibach ESDHC_BOOT_IMAGE_SIZE_OFS = 0x48,
25*15f05610SDirk Eibach ESDHC_BOOT_IMAGE_ADDR_OFS = 0x50,
26*15f05610SDirk Eibach ESDHC_BOOT_IMAGE_TARGET_OFS = 0x58,
27*15f05610SDirk Eibach ESDHC_BOOT_IMAGE_ENTRY_OFS = 0x60,
28*15f05610SDirk Eibach };
29*15f05610SDirk Eibach
30*15f05610SDirk Eibach enum {
31*15f05610SDirk Eibach I2C_SOC_0 = 0,
32*15f05610SDirk Eibach I2C_SOC_1 = 1,
33*15f05610SDirk Eibach };
34*15f05610SDirk Eibach
35*15f05610SDirk Eibach enum access_mode {
36*15f05610SDirk Eibach HREG_NONE = 0,
37*15f05610SDirk Eibach HREG_RD = 1,
38*15f05610SDirk Eibach HREG_WR = 2,
39*15f05610SDirk Eibach HREG_RDWR = 3,
40*15f05610SDirk Eibach };
41*15f05610SDirk Eibach
42*15f05610SDirk Eibach /* register constants */
43*15f05610SDirk Eibach enum {
44*15f05610SDirk Eibach FIX_HREG_DEVICE_ID_HASH = 0,
45*15f05610SDirk Eibach FIX_HREG_UNUSED1 = 1,
46*15f05610SDirk Eibach FIX_HREG_UNUSED2 = 2,
47*15f05610SDirk Eibach FIX_HREG_VENDOR = 3,
48*15f05610SDirk Eibach COUNT_FIX_HREGS
49*15f05610SDirk Eibach };
50*15f05610SDirk Eibach
51*15f05610SDirk Eibach static struct h_reg pcr_hregs[24];
52*15f05610SDirk Eibach static struct h_reg fix_hregs[COUNT_FIX_HREGS];
53*15f05610SDirk Eibach static struct h_reg var_hregs[8];
54*15f05610SDirk Eibach
55*15f05610SDirk Eibach /* hre opcodes */
56*15f05610SDirk Eibach enum {
57*15f05610SDirk Eibach /* opcodes w/o data */
58*15f05610SDirk Eibach HRE_NOP = 0x00,
59*15f05610SDirk Eibach HRE_SYNC = HRE_NOP,
60*15f05610SDirk Eibach HRE_CHECK0 = 0x01,
61*15f05610SDirk Eibach /* opcodes w/o data, w/ sync dst */
62*15f05610SDirk Eibach /* opcodes w/ data */
63*15f05610SDirk Eibach HRE_LOAD = 0x81,
64*15f05610SDirk Eibach /* opcodes w/data, w/sync dst */
65*15f05610SDirk Eibach HRE_XOR = 0xC1,
66*15f05610SDirk Eibach HRE_AND = 0xC2,
67*15f05610SDirk Eibach HRE_OR = 0xC3,
68*15f05610SDirk Eibach HRE_EXTEND = 0xC4,
69*15f05610SDirk Eibach HRE_LOADKEY = 0xC5,
70*15f05610SDirk Eibach };
71*15f05610SDirk Eibach
72*15f05610SDirk Eibach /* hre errors */
73*15f05610SDirk Eibach enum {
74*15f05610SDirk Eibach HRE_E_OK = 0,
75*15f05610SDirk Eibach HRE_E_TPM_FAILURE,
76*15f05610SDirk Eibach HRE_E_INVALID_HREG,
77*15f05610SDirk Eibach };
78*15f05610SDirk Eibach
79*15f05610SDirk Eibach static uint64_t device_id;
80*15f05610SDirk Eibach static uint64_t device_cl;
81*15f05610SDirk Eibach static uint64_t device_type;
82*15f05610SDirk Eibach
83*15f05610SDirk Eibach static uint32_t platform_key_handle;
84*15f05610SDirk Eibach
85*15f05610SDirk Eibach static uint32_t hre_tpm_err;
86*15f05610SDirk Eibach static int hre_err = HRE_E_OK;
87*15f05610SDirk Eibach
88*15f05610SDirk Eibach #define IS_PCR_HREG(spec) ((spec) & 0x20)
89*15f05610SDirk Eibach #define IS_FIX_HREG(spec) (((spec) & 0x38) == 0x08)
90*15f05610SDirk Eibach #define IS_VAR_HREG(spec) (((spec) & 0x38) == 0x10)
91*15f05610SDirk Eibach #define HREG_IDX(spec) ((spec) & (IS_PCR_HREG(spec) ? 0x1f : 0x7))
92*15f05610SDirk Eibach
93*15f05610SDirk Eibach static const uint8_t vendor[] = "Guntermann & Drunck";
94*15f05610SDirk Eibach
95*15f05610SDirk Eibach /**
96*15f05610SDirk Eibach * @brief get the size of a given (TPM) NV area
97*15f05610SDirk Eibach * @param index NV index of the area to get size for
98*15f05610SDirk Eibach * @param size pointer to the size
99*15f05610SDirk Eibach * @return 0 on success, != 0 on error
100*15f05610SDirk Eibach */
get_tpm_nv_size(uint32_t index,uint32_t * size)101*15f05610SDirk Eibach static int get_tpm_nv_size(uint32_t index, uint32_t *size)
102*15f05610SDirk Eibach {
103*15f05610SDirk Eibach uint32_t err;
104*15f05610SDirk Eibach uint8_t info[72];
105*15f05610SDirk Eibach uint8_t *ptr;
106*15f05610SDirk Eibach uint16_t v16;
107*15f05610SDirk Eibach
108*15f05610SDirk Eibach err = tpm_get_capability(TPM_CAP_NV_INDEX, index,
109*15f05610SDirk Eibach info, sizeof(info));
110*15f05610SDirk Eibach if (err) {
111*15f05610SDirk Eibach printf("tpm_get_capability(CAP_NV_INDEX, %08x) failed: %u\n",
112*15f05610SDirk Eibach index, err);
113*15f05610SDirk Eibach return 1;
114*15f05610SDirk Eibach }
115*15f05610SDirk Eibach
116*15f05610SDirk Eibach /* skip tag and nvIndex */
117*15f05610SDirk Eibach ptr = info + 6;
118*15f05610SDirk Eibach /* skip 2 pcr info fields */
119*15f05610SDirk Eibach v16 = get_unaligned_be16(ptr);
120*15f05610SDirk Eibach ptr += 2 + v16 + 1 + 20;
121*15f05610SDirk Eibach v16 = get_unaligned_be16(ptr);
122*15f05610SDirk Eibach ptr += 2 + v16 + 1 + 20;
123*15f05610SDirk Eibach /* skip permission and flags */
124*15f05610SDirk Eibach ptr += 6 + 3;
125*15f05610SDirk Eibach
126*15f05610SDirk Eibach *size = get_unaligned_be32(ptr);
127*15f05610SDirk Eibach return 0;
128*15f05610SDirk Eibach }
129*15f05610SDirk Eibach
130*15f05610SDirk Eibach /**
131*15f05610SDirk Eibach * @brief search for a key by usage auth and pub key hash.
132*15f05610SDirk Eibach * @param auth usage auth of the key to search for
133*15f05610SDirk Eibach * @param pubkey_digest (SHA1) hash of the pub key structure of the key
134*15f05610SDirk Eibach * @param[out] handle the handle of the key iff found
135*15f05610SDirk Eibach * @return 0 if key was found in TPM; != 0 if not.
136*15f05610SDirk Eibach */
find_key(const uint8_t auth[20],const uint8_t pubkey_digest[20],uint32_t * handle)137*15f05610SDirk Eibach static int find_key(const uint8_t auth[20], const uint8_t pubkey_digest[20],
138*15f05610SDirk Eibach uint32_t *handle)
139*15f05610SDirk Eibach {
140*15f05610SDirk Eibach uint16_t key_count;
141*15f05610SDirk Eibach uint32_t key_handles[10];
142*15f05610SDirk Eibach uint8_t buf[288];
143*15f05610SDirk Eibach uint8_t *ptr;
144*15f05610SDirk Eibach uint32_t err;
145*15f05610SDirk Eibach uint8_t digest[20];
146*15f05610SDirk Eibach size_t buf_len;
147*15f05610SDirk Eibach unsigned int i;
148*15f05610SDirk Eibach
149*15f05610SDirk Eibach /* fetch list of already loaded keys in the TPM */
150*15f05610SDirk Eibach err = tpm_get_capability(TPM_CAP_HANDLE, TPM_RT_KEY, buf, sizeof(buf));
151*15f05610SDirk Eibach if (err)
152*15f05610SDirk Eibach return -1;
153*15f05610SDirk Eibach key_count = get_unaligned_be16(buf);
154*15f05610SDirk Eibach ptr = buf + 2;
155*15f05610SDirk Eibach for (i = 0; i < key_count; ++i, ptr += 4)
156*15f05610SDirk Eibach key_handles[i] = get_unaligned_be32(ptr);
157*15f05610SDirk Eibach
158*15f05610SDirk Eibach /* now search a(/ the) key which we can access with the given auth */
159*15f05610SDirk Eibach for (i = 0; i < key_count; ++i) {
160*15f05610SDirk Eibach buf_len = sizeof(buf);
161*15f05610SDirk Eibach err = tpm_get_pub_key_oiap(key_handles[i], auth, buf, &buf_len);
162*15f05610SDirk Eibach if (err && err != TPM_AUTHFAIL)
163*15f05610SDirk Eibach return -1;
164*15f05610SDirk Eibach if (err)
165*15f05610SDirk Eibach continue;
166*15f05610SDirk Eibach sha1_csum(buf, buf_len, digest);
167*15f05610SDirk Eibach if (!memcmp(digest, pubkey_digest, 20)) {
168*15f05610SDirk Eibach *handle = key_handles[i];
169*15f05610SDirk Eibach return 0;
170*15f05610SDirk Eibach }
171*15f05610SDirk Eibach }
172*15f05610SDirk Eibach return 1;
173*15f05610SDirk Eibach }
174*15f05610SDirk Eibach
175*15f05610SDirk Eibach /**
176*15f05610SDirk Eibach * @brief read CCDM common data from TPM NV
177*15f05610SDirk Eibach * @return 0 if CCDM common data was found and read, !=0 if something failed.
178*15f05610SDirk Eibach */
read_common_data(void)179*15f05610SDirk Eibach static int read_common_data(void)
180*15f05610SDirk Eibach {
181*15f05610SDirk Eibach uint32_t size = 0;
182*15f05610SDirk Eibach uint32_t err;
183*15f05610SDirk Eibach uint8_t buf[256];
184*15f05610SDirk Eibach sha1_context ctx;
185*15f05610SDirk Eibach
186*15f05610SDirk Eibach if (get_tpm_nv_size(NV_COMMON_DATA_INDEX, &size) ||
187*15f05610SDirk Eibach size < NV_COMMON_DATA_MIN_SIZE)
188*15f05610SDirk Eibach return 1;
189*15f05610SDirk Eibach err = tpm_nv_read_value(NV_COMMON_DATA_INDEX,
190*15f05610SDirk Eibach buf, min(sizeof(buf), size));
191*15f05610SDirk Eibach if (err) {
192*15f05610SDirk Eibach printf("tpm_nv_read_value() failed: %u\n", err);
193*15f05610SDirk Eibach return 1;
194*15f05610SDirk Eibach }
195*15f05610SDirk Eibach
196*15f05610SDirk Eibach device_id = get_unaligned_be64(buf);
197*15f05610SDirk Eibach device_cl = get_unaligned_be64(buf + 8);
198*15f05610SDirk Eibach device_type = get_unaligned_be64(buf + 16);
199*15f05610SDirk Eibach
200*15f05610SDirk Eibach sha1_starts(&ctx);
201*15f05610SDirk Eibach sha1_update(&ctx, buf, 24);
202*15f05610SDirk Eibach sha1_finish(&ctx, fix_hregs[FIX_HREG_DEVICE_ID_HASH].digest);
203*15f05610SDirk Eibach fix_hregs[FIX_HREG_DEVICE_ID_HASH].valid = true;
204*15f05610SDirk Eibach
205*15f05610SDirk Eibach platform_key_handle = get_unaligned_be32(buf + 24);
206*15f05610SDirk Eibach
207*15f05610SDirk Eibach return 0;
208*15f05610SDirk Eibach }
209*15f05610SDirk Eibach
210*15f05610SDirk Eibach /**
211*15f05610SDirk Eibach * @brief get pointer to hash register by specification
212*15f05610SDirk Eibach * @param spec specification of a hash register
213*15f05610SDirk Eibach * @return pointer to hash register or NULL if @a spec does not qualify a
214*15f05610SDirk Eibach * valid hash register; NULL else.
215*15f05610SDirk Eibach */
get_hreg(uint8_t spec)216*15f05610SDirk Eibach static struct h_reg *get_hreg(uint8_t spec)
217*15f05610SDirk Eibach {
218*15f05610SDirk Eibach uint8_t idx;
219*15f05610SDirk Eibach
220*15f05610SDirk Eibach idx = HREG_IDX(spec);
221*15f05610SDirk Eibach if (IS_FIX_HREG(spec)) {
222*15f05610SDirk Eibach if (idx < ARRAY_SIZE(fix_hregs))
223*15f05610SDirk Eibach return fix_hregs + idx;
224*15f05610SDirk Eibach hre_err = HRE_E_INVALID_HREG;
225*15f05610SDirk Eibach } else if (IS_PCR_HREG(spec)) {
226*15f05610SDirk Eibach if (idx < ARRAY_SIZE(pcr_hregs))
227*15f05610SDirk Eibach return pcr_hregs + idx;
228*15f05610SDirk Eibach hre_err = HRE_E_INVALID_HREG;
229*15f05610SDirk Eibach } else if (IS_VAR_HREG(spec)) {
230*15f05610SDirk Eibach if (idx < ARRAY_SIZE(var_hregs))
231*15f05610SDirk Eibach return var_hregs + idx;
232*15f05610SDirk Eibach hre_err = HRE_E_INVALID_HREG;
233*15f05610SDirk Eibach }
234*15f05610SDirk Eibach return NULL;
235*15f05610SDirk Eibach }
236*15f05610SDirk Eibach
237*15f05610SDirk Eibach /**
238*15f05610SDirk Eibach * @brief get pointer of a hash register by specification and usage.
239*15f05610SDirk Eibach * @param spec specification of a hash register
240*15f05610SDirk Eibach * @param mode access mode (read or write or read/write)
241*15f05610SDirk Eibach * @return pointer to hash register if found and valid; NULL else.
242*15f05610SDirk Eibach *
243*15f05610SDirk Eibach * This func uses @a get_reg() to determine the hash register for a given spec.
244*15f05610SDirk Eibach * If a register is found it is validated according to the desired access mode.
245*15f05610SDirk Eibach * The value of automatic registers (PCR register and fixed registers) is
246*15f05610SDirk Eibach * loaded or computed on read access.
247*15f05610SDirk Eibach */
access_hreg(uint8_t spec,enum access_mode mode)248*15f05610SDirk Eibach static struct h_reg *access_hreg(uint8_t spec, enum access_mode mode)
249*15f05610SDirk Eibach {
250*15f05610SDirk Eibach struct h_reg *result;
251*15f05610SDirk Eibach
252*15f05610SDirk Eibach result = get_hreg(spec);
253*15f05610SDirk Eibach if (!result)
254*15f05610SDirk Eibach return NULL;
255*15f05610SDirk Eibach
256*15f05610SDirk Eibach if (mode & HREG_WR) {
257*15f05610SDirk Eibach if (IS_FIX_HREG(spec)) {
258*15f05610SDirk Eibach hre_err = HRE_E_INVALID_HREG;
259*15f05610SDirk Eibach return NULL;
260*15f05610SDirk Eibach }
261*15f05610SDirk Eibach }
262*15f05610SDirk Eibach if (mode & HREG_RD) {
263*15f05610SDirk Eibach if (!result->valid) {
264*15f05610SDirk Eibach if (IS_PCR_HREG(spec)) {
265*15f05610SDirk Eibach hre_tpm_err = tpm_pcr_read(HREG_IDX(spec),
266*15f05610SDirk Eibach result->digest, 20);
267*15f05610SDirk Eibach result->valid = (hre_tpm_err == TPM_SUCCESS);
268*15f05610SDirk Eibach } else if (IS_FIX_HREG(spec)) {
269*15f05610SDirk Eibach switch (HREG_IDX(spec)) {
270*15f05610SDirk Eibach case FIX_HREG_DEVICE_ID_HASH:
271*15f05610SDirk Eibach read_common_data();
272*15f05610SDirk Eibach break;
273*15f05610SDirk Eibach case FIX_HREG_VENDOR:
274*15f05610SDirk Eibach memcpy(result->digest, vendor, 20);
275*15f05610SDirk Eibach result->valid = true;
276*15f05610SDirk Eibach break;
277*15f05610SDirk Eibach }
278*15f05610SDirk Eibach } else {
279*15f05610SDirk Eibach result->valid = true;
280*15f05610SDirk Eibach }
281*15f05610SDirk Eibach }
282*15f05610SDirk Eibach if (!result->valid) {
283*15f05610SDirk Eibach hre_err = HRE_E_INVALID_HREG;
284*15f05610SDirk Eibach return NULL;
285*15f05610SDirk Eibach }
286*15f05610SDirk Eibach }
287*15f05610SDirk Eibach
288*15f05610SDirk Eibach return result;
289*15f05610SDirk Eibach }
290*15f05610SDirk Eibach
compute_and(void * _dst,const void * _src,size_t n)291*15f05610SDirk Eibach static void *compute_and(void *_dst, const void *_src, size_t n)
292*15f05610SDirk Eibach {
293*15f05610SDirk Eibach uint8_t *dst = _dst;
294*15f05610SDirk Eibach const uint8_t *src = _src;
295*15f05610SDirk Eibach size_t i;
296*15f05610SDirk Eibach
297*15f05610SDirk Eibach for (i = n; i-- > 0; )
298*15f05610SDirk Eibach *dst++ &= *src++;
299*15f05610SDirk Eibach
300*15f05610SDirk Eibach return _dst;
301*15f05610SDirk Eibach }
302*15f05610SDirk Eibach
compute_or(void * _dst,const void * _src,size_t n)303*15f05610SDirk Eibach static void *compute_or(void *_dst, const void *_src, size_t n)
304*15f05610SDirk Eibach {
305*15f05610SDirk Eibach uint8_t *dst = _dst;
306*15f05610SDirk Eibach const uint8_t *src = _src;
307*15f05610SDirk Eibach size_t i;
308*15f05610SDirk Eibach
309*15f05610SDirk Eibach for (i = n; i-- > 0; )
310*15f05610SDirk Eibach *dst++ |= *src++;
311*15f05610SDirk Eibach
312*15f05610SDirk Eibach return _dst;
313*15f05610SDirk Eibach }
314*15f05610SDirk Eibach
compute_xor(void * _dst,const void * _src,size_t n)315*15f05610SDirk Eibach static void *compute_xor(void *_dst, const void *_src, size_t n)
316*15f05610SDirk Eibach {
317*15f05610SDirk Eibach uint8_t *dst = _dst;
318*15f05610SDirk Eibach const uint8_t *src = _src;
319*15f05610SDirk Eibach size_t i;
320*15f05610SDirk Eibach
321*15f05610SDirk Eibach for (i = n; i-- > 0; )
322*15f05610SDirk Eibach *dst++ ^= *src++;
323*15f05610SDirk Eibach
324*15f05610SDirk Eibach return _dst;
325*15f05610SDirk Eibach }
326*15f05610SDirk Eibach
compute_extend(void * _dst,const void * _src,size_t n)327*15f05610SDirk Eibach static void *compute_extend(void *_dst, const void *_src, size_t n)
328*15f05610SDirk Eibach {
329*15f05610SDirk Eibach uint8_t digest[20];
330*15f05610SDirk Eibach sha1_context ctx;
331*15f05610SDirk Eibach
332*15f05610SDirk Eibach sha1_starts(&ctx);
333*15f05610SDirk Eibach sha1_update(&ctx, _dst, n);
334*15f05610SDirk Eibach sha1_update(&ctx, _src, n);
335*15f05610SDirk Eibach sha1_finish(&ctx, digest);
336*15f05610SDirk Eibach memcpy(_dst, digest, min(n, sizeof(digest)));
337*15f05610SDirk Eibach
338*15f05610SDirk Eibach return _dst;
339*15f05610SDirk Eibach }
340*15f05610SDirk Eibach
hre_op_loadkey(struct h_reg * src_reg,struct h_reg * dst_reg,const void * key,size_t key_size)341*15f05610SDirk Eibach static int hre_op_loadkey(struct h_reg *src_reg, struct h_reg *dst_reg,
342*15f05610SDirk Eibach const void *key, size_t key_size)
343*15f05610SDirk Eibach {
344*15f05610SDirk Eibach uint32_t parent_handle;
345*15f05610SDirk Eibach uint32_t key_handle;
346*15f05610SDirk Eibach
347*15f05610SDirk Eibach if (!src_reg || !dst_reg || !src_reg->valid || !dst_reg->valid)
348*15f05610SDirk Eibach return -1;
349*15f05610SDirk Eibach if (find_key(src_reg->digest, dst_reg->digest, &parent_handle))
350*15f05610SDirk Eibach return -1;
351*15f05610SDirk Eibach hre_tpm_err = tpm_load_key2_oiap(parent_handle, key, key_size,
352*15f05610SDirk Eibach src_reg->digest, &key_handle);
353*15f05610SDirk Eibach if (hre_tpm_err) {
354*15f05610SDirk Eibach hre_err = HRE_E_TPM_FAILURE;
355*15f05610SDirk Eibach return -1;
356*15f05610SDirk Eibach }
357*15f05610SDirk Eibach
358*15f05610SDirk Eibach return 0;
359*15f05610SDirk Eibach }
360*15f05610SDirk Eibach
361*15f05610SDirk Eibach /**
362*15f05610SDirk Eibach * @brief executes the next opcode on the hash register engine.
363*15f05610SDirk Eibach * @param[in,out] ip pointer to the opcode (instruction pointer)
364*15f05610SDirk Eibach * @param[in,out] code_size (remaining) size of the code
365*15f05610SDirk Eibach * @return new instruction pointer on success, NULL on error.
366*15f05610SDirk Eibach */
hre_execute_op(const uint8_t ** ip,size_t * code_size)367*15f05610SDirk Eibach static const uint8_t *hre_execute_op(const uint8_t **ip, size_t *code_size)
368*15f05610SDirk Eibach {
369*15f05610SDirk Eibach bool dst_modified = false;
370*15f05610SDirk Eibach uint32_t ins;
371*15f05610SDirk Eibach uint8_t opcode;
372*15f05610SDirk Eibach uint8_t src_spec;
373*15f05610SDirk Eibach uint8_t dst_spec;
374*15f05610SDirk Eibach uint16_t data_size;
375*15f05610SDirk Eibach struct h_reg *src_reg, *dst_reg;
376*15f05610SDirk Eibach uint8_t buf[20];
377*15f05610SDirk Eibach const uint8_t *src_buf, *data;
378*15f05610SDirk Eibach uint8_t *ptr;
379*15f05610SDirk Eibach int i;
380*15f05610SDirk Eibach void * (*bin_func)(void *, const void *, size_t);
381*15f05610SDirk Eibach
382*15f05610SDirk Eibach if (*code_size < 4)
383*15f05610SDirk Eibach return NULL;
384*15f05610SDirk Eibach
385*15f05610SDirk Eibach ins = get_unaligned_be32(*ip);
386*15f05610SDirk Eibach opcode = **ip;
387*15f05610SDirk Eibach data = *ip + 4;
388*15f05610SDirk Eibach src_spec = (ins >> 18) & 0x3f;
389*15f05610SDirk Eibach dst_spec = (ins >> 12) & 0x3f;
390*15f05610SDirk Eibach data_size = (ins & 0x7ff);
391*15f05610SDirk Eibach
392*15f05610SDirk Eibach debug("HRE: ins=%08x (op=%02x, s=%02x, d=%02x, L=%d)\n", ins,
393*15f05610SDirk Eibach opcode, src_spec, dst_spec, data_size);
394*15f05610SDirk Eibach
395*15f05610SDirk Eibach if ((opcode & 0x80) && (data_size + 4) > *code_size)
396*15f05610SDirk Eibach return NULL;
397*15f05610SDirk Eibach
398*15f05610SDirk Eibach src_reg = access_hreg(src_spec, HREG_RD);
399*15f05610SDirk Eibach if (hre_err || hre_tpm_err)
400*15f05610SDirk Eibach return NULL;
401*15f05610SDirk Eibach dst_reg = access_hreg(dst_spec, (opcode & 0x40) ? HREG_RDWR : HREG_WR);
402*15f05610SDirk Eibach if (hre_err || hre_tpm_err)
403*15f05610SDirk Eibach return NULL;
404*15f05610SDirk Eibach
405*15f05610SDirk Eibach switch (opcode) {
406*15f05610SDirk Eibach case HRE_NOP:
407*15f05610SDirk Eibach goto end;
408*15f05610SDirk Eibach case HRE_CHECK0:
409*15f05610SDirk Eibach if (src_reg) {
410*15f05610SDirk Eibach for (i = 0; i < 20; ++i) {
411*15f05610SDirk Eibach if (src_reg->digest[i])
412*15f05610SDirk Eibach return NULL;
413*15f05610SDirk Eibach }
414*15f05610SDirk Eibach }
415*15f05610SDirk Eibach break;
416*15f05610SDirk Eibach case HRE_LOAD:
417*15f05610SDirk Eibach bin_func = memcpy;
418*15f05610SDirk Eibach goto do_bin_func;
419*15f05610SDirk Eibach case HRE_XOR:
420*15f05610SDirk Eibach bin_func = compute_xor;
421*15f05610SDirk Eibach goto do_bin_func;
422*15f05610SDirk Eibach case HRE_AND:
423*15f05610SDirk Eibach bin_func = compute_and;
424*15f05610SDirk Eibach goto do_bin_func;
425*15f05610SDirk Eibach case HRE_OR:
426*15f05610SDirk Eibach bin_func = compute_or;
427*15f05610SDirk Eibach goto do_bin_func;
428*15f05610SDirk Eibach case HRE_EXTEND:
429*15f05610SDirk Eibach bin_func = compute_extend;
430*15f05610SDirk Eibach do_bin_func:
431*15f05610SDirk Eibach if (!dst_reg)
432*15f05610SDirk Eibach return NULL;
433*15f05610SDirk Eibach if (src_reg) {
434*15f05610SDirk Eibach src_buf = src_reg->digest;
435*15f05610SDirk Eibach } else {
436*15f05610SDirk Eibach if (!data_size) {
437*15f05610SDirk Eibach memset(buf, 0, 20);
438*15f05610SDirk Eibach src_buf = buf;
439*15f05610SDirk Eibach } else if (data_size == 1) {
440*15f05610SDirk Eibach memset(buf, *data, 20);
441*15f05610SDirk Eibach src_buf = buf;
442*15f05610SDirk Eibach } else if (data_size >= 20) {
443*15f05610SDirk Eibach src_buf = data;
444*15f05610SDirk Eibach } else {
445*15f05610SDirk Eibach src_buf = buf;
446*15f05610SDirk Eibach for (ptr = (uint8_t *)src_buf, i = 20; i > 0;
447*15f05610SDirk Eibach i -= data_size, ptr += data_size)
448*15f05610SDirk Eibach memcpy(ptr, data,
449*15f05610SDirk Eibach min_t(size_t, i, data_size));
450*15f05610SDirk Eibach }
451*15f05610SDirk Eibach }
452*15f05610SDirk Eibach bin_func(dst_reg->digest, src_buf, 20);
453*15f05610SDirk Eibach dst_reg->valid = true;
454*15f05610SDirk Eibach dst_modified = true;
455*15f05610SDirk Eibach break;
456*15f05610SDirk Eibach case HRE_LOADKEY:
457*15f05610SDirk Eibach if (hre_op_loadkey(src_reg, dst_reg, data, data_size))
458*15f05610SDirk Eibach return NULL;
459*15f05610SDirk Eibach break;
460*15f05610SDirk Eibach default:
461*15f05610SDirk Eibach return NULL;
462*15f05610SDirk Eibach }
463*15f05610SDirk Eibach
464*15f05610SDirk Eibach if (dst_reg && dst_modified && IS_PCR_HREG(dst_spec)) {
465*15f05610SDirk Eibach hre_tpm_err = tpm_extend(HREG_IDX(dst_spec), dst_reg->digest,
466*15f05610SDirk Eibach dst_reg->digest);
467*15f05610SDirk Eibach if (hre_tpm_err) {
468*15f05610SDirk Eibach hre_err = HRE_E_TPM_FAILURE;
469*15f05610SDirk Eibach return NULL;
470*15f05610SDirk Eibach }
471*15f05610SDirk Eibach }
472*15f05610SDirk Eibach end:
473*15f05610SDirk Eibach *ip += 4;
474*15f05610SDirk Eibach *code_size -= 4;
475*15f05610SDirk Eibach if (opcode & 0x80) {
476*15f05610SDirk Eibach *ip += data_size;
477*15f05610SDirk Eibach *code_size -= data_size;
478*15f05610SDirk Eibach }
479*15f05610SDirk Eibach
480*15f05610SDirk Eibach return *ip;
481*15f05610SDirk Eibach }
482*15f05610SDirk Eibach
483*15f05610SDirk Eibach /**
484*15f05610SDirk Eibach * @brief runs a program on the hash register engine.
485*15f05610SDirk Eibach * @param code pointer to the (HRE) code.
486*15f05610SDirk Eibach * @param code_size size of the code (in bytes).
487*15f05610SDirk Eibach * @return 0 on success, != 0 on failure.
488*15f05610SDirk Eibach */
hre_run_program(const uint8_t * code,size_t code_size)489*15f05610SDirk Eibach int hre_run_program(const uint8_t *code, size_t code_size)
490*15f05610SDirk Eibach {
491*15f05610SDirk Eibach size_t code_left;
492*15f05610SDirk Eibach const uint8_t *ip = code;
493*15f05610SDirk Eibach
494*15f05610SDirk Eibach code_left = code_size;
495*15f05610SDirk Eibach hre_tpm_err = 0;
496*15f05610SDirk Eibach hre_err = HRE_E_OK;
497*15f05610SDirk Eibach while (code_left > 0)
498*15f05610SDirk Eibach if (!hre_execute_op(&ip, &code_left))
499*15f05610SDirk Eibach return -1;
500*15f05610SDirk Eibach
501*15f05610SDirk Eibach return hre_err;
502*15f05610SDirk Eibach }
503*15f05610SDirk Eibach
hre_verify_program(struct key_program * prg)504*15f05610SDirk Eibach int hre_verify_program(struct key_program *prg)
505*15f05610SDirk Eibach {
506*15f05610SDirk Eibach uint32_t crc;
507*15f05610SDirk Eibach
508*15f05610SDirk Eibach crc = crc32(0, prg->code, prg->code_size);
509*15f05610SDirk Eibach
510*15f05610SDirk Eibach if (crc != prg->code_crc) {
511*15f05610SDirk Eibach printf("HRC crc mismatch: %08x != %08x\n",
512*15f05610SDirk Eibach crc, prg->code_crc);
513*15f05610SDirk Eibach return 1;
514*15f05610SDirk Eibach }
515*15f05610SDirk Eibach return 0;
516*15f05610SDirk Eibach }
517