xref: /rk3399_rockchip-uboot/board/gateworks/gw_ventana/gsc.h (revision 2d833c8528afa1d080f29597bae732c6d048c316)
159189a8bSTim Harvey /*
259189a8bSTim Harvey  * Copyright (C) 2013 Gateworks Corporation
359189a8bSTim Harvey  *
459189a8bSTim Harvey  * Author: Tim Harvey <tharvey@gateworks.com>
559189a8bSTim Harvey  *
659189a8bSTim Harvey  * SPDX-License-Identifier: GPL-2.0+
759189a8bSTim Harvey  */
859189a8bSTim Harvey 
959189a8bSTim Harvey #ifndef __ASSEMBLY__
1059189a8bSTim Harvey 
1159189a8bSTim Harvey /* i2c slave addresses */
1259189a8bSTim Harvey #define GSC_SC_ADDR		0x20
1359189a8bSTim Harvey #define GSC_RTC_ADDR		0x68
1459189a8bSTim Harvey #define GSC_HWMON_ADDR		0x29
1559189a8bSTim Harvey #define GSC_EEPROM_ADDR		0x51
1659189a8bSTim Harvey 
1759189a8bSTim Harvey /* System Controller registers */
1859189a8bSTim Harvey enum {
1959189a8bSTim Harvey 	GSC_SC_CTRL0		= 0x00,
2059189a8bSTim Harvey 	GSC_SC_CTRL1		= 0x01,
2159189a8bSTim Harvey 	GSC_SC_STATUS		= 0x0a,
22ee5931d4STim Harvey 	GSC_SC_FWCRC		= 0x0c,
2359189a8bSTim Harvey 	GSC_SC_FWVER		= 0x0e,
2459189a8bSTim Harvey };
2559189a8bSTim Harvey 
2659189a8bSTim Harvey /* System Controller Control1 bits */
2759189a8bSTim Harvey enum {
28ee5931d4STim Harvey 	GSC_SC_CTRL1_WDTIME	= 4, /* 1 = 60s timeout, 0 = 30s timeout */
29ee5931d4STim Harvey 	GSC_SC_CTRL1_WDEN	= 5, /* 1 = enable, 0 = disable */
30ee5931d4STim Harvey 	GSC_SC_CTRL1_WDDIS	= 7, /* 1 = disable boot watchdog */
3159189a8bSTim Harvey };
3259189a8bSTim Harvey 
3359189a8bSTim Harvey /* System Controller Interrupt bits */
3459189a8bSTim Harvey enum {
3559189a8bSTim Harvey 	GSC_SC_IRQ_PB		= 0, /* Pushbutton switch */
3659189a8bSTim Harvey 	GSC_SC_IRQ_SECURE	= 1, /* Secure Key erase operation complete */
3759189a8bSTim Harvey 	GSC_SC_IRQ_EEPROM_WP	= 2, /* EEPROM write violation */
3859189a8bSTim Harvey 	GSC_SC_IRQ_GPIO		= 4, /* GPIO change */
3959189a8bSTim Harvey 	GSC_SC_IRQ_TAMPER	= 5, /* Tamper detect */
4059189a8bSTim Harvey 	GSC_SC_IRQ_WATCHDOG	= 6, /* Watchdog trip */
4159189a8bSTim Harvey 	GSC_SC_IRQ_PBLONG	= 7, /* Pushbutton long hold */
4259189a8bSTim Harvey };
4359189a8bSTim Harvey 
4459189a8bSTim Harvey /* Hardware Monitor registers */
4559189a8bSTim Harvey enum {
4659189a8bSTim Harvey 	GSC_HWMON_TEMP		= 0x00,
4759189a8bSTim Harvey 	GSC_HWMON_VIN		= 0x02,
4859189a8bSTim Harvey 	GSC_HWMON_VDD_3P3	= 0x05,
4959189a8bSTim Harvey 	GSC_HWMON_VBATT		= 0x08,
5059189a8bSTim Harvey 	GSC_HWMON_VDD_5P0	= 0x0b,
5159189a8bSTim Harvey 	GSC_HWMON_VDD_CORE	= 0x0e,
5259189a8bSTim Harvey 	GSC_HWMON_VDD_HIGH	= 0x14,
5359189a8bSTim Harvey 	GSC_HWMON_VDD_DDR	= 0x17,
5459189a8bSTim Harvey 	GSC_HWMON_VDD_SOC	= 0x11,
5559189a8bSTim Harvey 	GSC_HWMON_VDD_1P8	= 0x1d,
5645af3f74STim Harvey 	GSC_HWMON_VDD_IO2	= 0x20,
5759189a8bSTim Harvey 	GSC_HWMON_VDD_2P5	= 0x23,
5845af3f74STim Harvey 	GSC_HWMON_VDD_IO3	= 0x26,
5945af3f74STim Harvey 	GSC_HWMON_VDD_IO4	= 0x29,
6059189a8bSTim Harvey };
6159189a8bSTim Harvey 
6259189a8bSTim Harvey /*
6359189a8bSTim Harvey  * I2C transactions to the GSC are done via these functions which
6459189a8bSTim Harvey  * perform retries in the case of a busy GSC NAK'ing the transaction
6559189a8bSTim Harvey  */
6659189a8bSTim Harvey int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
6759189a8bSTim Harvey int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
68ee5931d4STim Harvey int gsc_info(int verbose);
69*2d833c85STim Harvey int gsc_boot_wd_disable(void);
7059189a8bSTim Harvey #endif
7159189a8bSTim Harvey 
72