xref: /rk3399_rockchip-uboot/board/freescale/t4rdb/t4240rdb.c (revision 2c0d69713c5f1cd0e3caee20b3725dc8d0b9aa77)
1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier: GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <command.h>
9 #include <i2c.h>
10 #include <netdev.h>
11 #include <linux/compiler.h>
12 #include <asm/mmu.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/immap_85xx.h>
16 #include <asm/fsl_law.h>
17 #include <asm/fsl_serdes.h>
18 #include <asm/fsl_liodn.h>
19 #include <fm_eth.h>
20 
21 #include "t4rdb.h"
22 #include "cpld.h"
23 
24 DECLARE_GLOBAL_DATA_PTR;
25 
26 int checkboard(void)
27 {
28 	struct cpu_type *cpu = gd->arch.cpu;
29 	u8 sw;
30 
31 	printf("Board: %sRDB, ", cpu->name);
32 	printf("Board rev: 0x%02x CPLD ver: 0x%02x%02x, ",
33 	       CPLD_READ(hw_ver), CPLD_READ(sw_maj_ver), CPLD_READ(sw_min_ver));
34 
35 	sw = CPLD_READ(vbank);
36 	sw = sw & CPLD_BANK_SEL_MASK;
37 
38 	if (sw <= 7)
39 		printf("vBank: %d\n", sw);
40 	else
41 		printf("Unsupported Bank=%x\n", sw);
42 
43 	puts("SERDES Reference Clocks:\n");
44 	printf("       SERDES1=100MHz SERDES2=156.25MHz\n"
45 	       "       SERDES3=100MHz SERDES4=100MHz\n");
46 
47 	return 0;
48 }
49 
50 int board_early_init_r(void)
51 {
52 	const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
53 	int flash_esel = find_tlb_idx((void *)flashbase, 1);
54 
55 	/*
56 	 * Remap Boot flash + PROMJET region to caching-inhibited
57 	 * so that flash can be erased properly.
58 	 */
59 
60 	/* Flush d-cache and invalidate i-cache of any FLASH data */
61 	flush_dcache();
62 	invalidate_icache();
63 
64 	if (flash_esel == -1) {
65 		/* very unlikely unless something is messed up */
66 		puts("Error: Could not find TLB for FLASH BASE\n");
67 		flash_esel = 2;	/* give our best effort to continue */
68 	} else {
69 		/* invalidate existing TLB entry for flash + promjet */
70 		disable_tlb(flash_esel);
71 	}
72 
73 	set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
74 		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
75 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
76 
77 	return 0;
78 }
79 
80 int misc_init_r(void)
81 {
82 	return 0;
83 }
84 
85 int ft_board_setup(void *blob, bd_t *bd)
86 {
87 	phys_addr_t base;
88 	phys_size_t size;
89 
90 	ft_cpu_setup(blob, bd);
91 
92 	base = getenv_bootm_low();
93 	size = getenv_bootm_size();
94 
95 	fdt_fixup_memory(blob, (u64)base, (u64)size);
96 
97 #ifdef CONFIG_PCI
98 	pci_of_setup(blob, bd);
99 #endif
100 
101 	fdt_fixup_liodn(blob);
102 	fdt_fixup_dr_usb(blob, bd);
103 
104 #ifdef CONFIG_SYS_DPAA_FMAN
105 	fdt_fixup_fman_ethernet(blob);
106 	fdt_fixup_board_enet(blob);
107 #endif
108 
109 	return 0;
110 }
111 
112 /*
113  * This function is called by bdinfo to print detail board information.
114  * As an exmaple for future board, we organize the messages into
115  * several sections. If applicable, the message is in the format of
116  * <name>      = <value>
117  * It should aligned with normal output of bdinfo command.
118  *
119  * Voltage: Core, DDR and another configurable voltages
120  * Clock  : Critical clocks which are not printed already
121  * RCW    : RCW source if not printed already
122  * Misc   : Other important information not in above catagories
123  */
124 void board_detail(void)
125 {
126 	int rcwsrc;
127 
128 	/* RCW section SW3[4] */
129 	rcwsrc = 0x0;
130 	puts("RCW source  = ");
131 	switch (rcwsrc & 0x1) {
132 	case 0x1:
133 		puts("SDHC/eMMC\n");
134 		break;
135 	default:
136 		puts("I2C normal addressing\n");
137 		break;
138 	}
139 }
140