10b2e13d9SChunhe Lan /* 20b2e13d9SChunhe Lan * Copyright 2014 Freescale Semiconductor, Inc. 30b2e13d9SChunhe Lan * 40b2e13d9SChunhe Lan * SPDX-License-Identifier: GPL-2.0+ 50b2e13d9SChunhe Lan */ 60b2e13d9SChunhe Lan 70b2e13d9SChunhe Lan #include <common.h> 80b2e13d9SChunhe Lan #include <asm/fsl_law.h> 90b2e13d9SChunhe Lan #include <asm/mmu.h> 100b2e13d9SChunhe Lan 110b2e13d9SChunhe Lan struct law_entry law_table[] = { 120b2e13d9SChunhe Lan SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC), 130b2e13d9SChunhe Lan #ifdef CONFIG_SYS_BMAN_MEM_PHYS 140b2e13d9SChunhe Lan SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN), 150b2e13d9SChunhe Lan #endif 160b2e13d9SChunhe Lan #ifdef CONFIG_SYS_QMAN_MEM_PHYS 170b2e13d9SChunhe Lan SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), 180b2e13d9SChunhe Lan #endif 19*ab06b236SChunhe Lan #ifdef CONFIG_SYS_CPLD_BASE_PHYS 20*ab06b236SChunhe Lan SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), 21*ab06b236SChunhe Lan #endif 220b2e13d9SChunhe Lan #ifdef CONFIG_SYS_DCSRBAR_PHYS 230b2e13d9SChunhe Lan /* Limit DCSR to 32M to access NPC Trace Buffer */ 240b2e13d9SChunhe Lan SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), 250b2e13d9SChunhe Lan #endif 260b2e13d9SChunhe Lan #ifdef CONFIG_SYS_NAND_BASE_PHYS 270b2e13d9SChunhe Lan SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), 280b2e13d9SChunhe Lan #endif 290b2e13d9SChunhe Lan }; 300b2e13d9SChunhe Lan 310b2e13d9SChunhe Lan int num_law_entries = ARRAY_SIZE(law_table); 32