xref: /rk3399_rockchip-uboot/board/freescale/t4qds/law.c (revision b98d934128bcd98106e764d2f492ac79c38ae53d)
1ee52b188SYork Sun /*
2ee52b188SYork Sun  * Copyright 2008-2012 Freescale Semiconductor, Inc.
3ee52b188SYork Sun  *
4ee52b188SYork Sun  * (C) Copyright 2000
5ee52b188SYork Sun  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6ee52b188SYork Sun  *
71a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
8ee52b188SYork Sun  */
9ee52b188SYork Sun 
10ee52b188SYork Sun #include <common.h>
11ee52b188SYork Sun #include <asm/fsl_law.h>
12ee52b188SYork Sun #include <asm/mmu.h>
13ee52b188SYork Sun 
14ee52b188SYork Sun struct law_entry law_table[] = {
15ee52b188SYork Sun 	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
16ee52b188SYork Sun #ifdef CONFIG_SYS_BMAN_MEM_PHYS
17ee52b188SYork Sun 	SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
18ee52b188SYork Sun #endif
19ee52b188SYork Sun #ifdef CONFIG_SYS_QMAN_MEM_PHYS
20ee52b188SYork Sun 	SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
21ee52b188SYork Sun #endif
22*1cb19fbbSYork Sun #ifdef QIXIS_BASE_PHYS
23ee52b188SYork Sun 	SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
24*1cb19fbbSYork Sun #endif
25ee52b188SYork Sun #ifdef CONFIG_SYS_DCSRBAR_PHYS
2649e946cbSStephen George 	/* Limit DCSR to 32M to access NPC Trace Buffer */
2749e946cbSStephen George 	SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
28ee52b188SYork Sun #endif
29ee52b188SYork Sun #ifdef CONFIG_SYS_NAND_BASE_PHYS
30ac13eb5dSPrabhakar Kushwaha 	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
31ee52b188SYork Sun #endif
32ee52b188SYork Sun };
33ee52b188SYork Sun 
34ee52b188SYork Sun int num_law_entries = ARRAY_SIZE(law_table);
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