1f5acb9fdSJean-Christophe PLAGNIOL-VILLARD/* 2f5acb9fdSJean-Christophe PLAGNIOL-VILLARD * January 2004 - Changed to support H4 device 3f5acb9fdSJean-Christophe PLAGNIOL-VILLARD * Copyright (c) 2004 Texas Instruments 4f5acb9fdSJean-Christophe PLAGNIOL-VILLARD * 5f5acb9fdSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2002 6792a09ebSDetlev Zundel * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 7f5acb9fdSJean-Christophe PLAGNIOL-VILLARD * 81a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 9f5acb9fdSJean-Christophe PLAGNIOL-VILLARD */ 10f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 11f5acb9fdSJean-Christophe PLAGNIOL-VILLARDOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") 12f5acb9fdSJean-Christophe PLAGNIOL-VILLARDOUTPUT_ARCH(arm) 13f5acb9fdSJean-Christophe PLAGNIOL-VILLARDENTRY(_start) 14f5acb9fdSJean-Christophe PLAGNIOL-VILLARDSECTIONS 15f5acb9fdSJean-Christophe PLAGNIOL-VILLARD{ 16f5acb9fdSJean-Christophe PLAGNIOL-VILLARD . = 0x00000000; 17f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 18f5acb9fdSJean-Christophe PLAGNIOL-VILLARD . = ALIGN(4); 19f5acb9fdSJean-Christophe PLAGNIOL-VILLARD .text : 20f5acb9fdSJean-Christophe PLAGNIOL-VILLARD { 21d026dec8SAlbert ARIBAUD *(.__image_copy_start) 22f5acb9fdSJean-Christophe PLAGNIOL-VILLARD /* WARNING - the following is hand-optimized to fit within */ 23f5acb9fdSJean-Christophe PLAGNIOL-VILLARD /* the sector layout of our flash chips! XXX FIXME XXX */ 24f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 251a9a91dcSBenoît Thébaudeau arch/arm/cpu/arm1136/start.o (.text*) 26*e2906a59SMasahiro Yamada board/freescale/mx31ads/built-in.o (.text*) 27*e2906a59SMasahiro Yamada arch/arm/lib/built-in.o (.text*) 28*e2906a59SMasahiro Yamada net/built-in.o (.text*) 29*e2906a59SMasahiro Yamada drivers/mtd/built-in.o (.text*) 30f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 31f5acb9fdSJean-Christophe PLAGNIOL-VILLARD . = DEFINED(env_offset) ? env_offset : .; 321a9a91dcSBenoît Thébaudeau common/env_embedded.o(.text*) 33f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 341a9a91dcSBenoît Thébaudeau *(.text*) 35f5acb9fdSJean-Christophe PLAGNIOL-VILLARD } 364ac2e2d6SFabio Estevam . = ALIGN(4); 371a9a91dcSBenoît Thébaudeau .rodata : { *(.rodata*) } 38f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 39f5acb9fdSJean-Christophe PLAGNIOL-VILLARD . = ALIGN(4); 404ac2e2d6SFabio Estevam .data : { 411a9a91dcSBenoît Thébaudeau *(.data*) 424ac2e2d6SFabio Estevam } 43f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 44f5acb9fdSJean-Christophe PLAGNIOL-VILLARD . = ALIGN(4); 45f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 46f5acb9fdSJean-Christophe PLAGNIOL-VILLARD . = ALIGN(4); 4755675142SMarek Vasut .u_boot_list : { 48ef123c52SAlbert ARIBAUD KEEP(*(SORT(.u_boot_list*))); 4955675142SMarek Vasut } 50f5acb9fdSJean-Christophe PLAGNIOL-VILLARD 51f5acb9fdSJean-Christophe PLAGNIOL-VILLARD . = ALIGN(4); 524ac2e2d6SFabio Estevam 53d026dec8SAlbert ARIBAUD .image_copy_end : 54d026dec8SAlbert ARIBAUD { 55d026dec8SAlbert ARIBAUD *(.__image_copy_end) 56d026dec8SAlbert ARIBAUD } 57b736e4b9SStefano Babic 5847bd65efSAlbert ARIBAUD .rel_dyn_start : 5947bd65efSAlbert ARIBAUD { 6047bd65efSAlbert ARIBAUD *(.__rel_dyn_start) 6147bd65efSAlbert ARIBAUD } 6247bd65efSAlbert ARIBAUD 634ac2e2d6SFabio Estevam .rel.dyn : { 644ac2e2d6SFabio Estevam *(.rel*) 6547bd65efSAlbert ARIBAUD } 6647bd65efSAlbert ARIBAUD 6747bd65efSAlbert ARIBAUD .rel_dyn_end : 6847bd65efSAlbert ARIBAUD { 6947bd65efSAlbert ARIBAUD *(.__rel_dyn_end) 704ac2e2d6SFabio Estevam } 714ac2e2d6SFabio Estevam 724ac2e2d6SFabio Estevam _end = .; 734ac2e2d6SFabio Estevam 74f84a7b8fSAlbert ARIBAUD/* 75f84a7b8fSAlbert ARIBAUD * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c 76f84a7b8fSAlbert ARIBAUD * __bss_base and __bss_limit are for linker only (overlay ordering) 77f84a7b8fSAlbert ARIBAUD */ 78f84a7b8fSAlbert ARIBAUD 793ebd1cbcSAlbert ARIBAUD .bss_start __rel_dyn_start (OVERLAY) : { 803ebd1cbcSAlbert ARIBAUD KEEP(*(.__bss_start)); 81f84a7b8fSAlbert ARIBAUD __bss_base = .; 823ebd1cbcSAlbert ARIBAUD } 833ebd1cbcSAlbert ARIBAUD 84f84a7b8fSAlbert ARIBAUD .bss __bss_base (OVERLAY) : { 853ebd1cbcSAlbert ARIBAUD *(.bss*) 864ac2e2d6SFabio Estevam . = ALIGN(4); 87f84a7b8fSAlbert ARIBAUD __bss_limit = .; 88f5acb9fdSJean-Christophe PLAGNIOL-VILLARD } 89f84a7b8fSAlbert ARIBAUD .bss_end __bss_limit (OVERLAY) : { 90f84a7b8fSAlbert ARIBAUD KEEP(*(.__bss_end)); 91f5acb9fdSJean-Christophe PLAGNIOL-VILLARD } 924ac2e2d6SFabio Estevam 934ac2e2d6SFabio Estevam /DISCARD/ : { *(.bss*) } 9409d81184SAlbert ARIBAUD /DISCARD/ : { *(.dynsym) } 954ac2e2d6SFabio Estevam /DISCARD/ : { *(.dynstr*) } 964ac2e2d6SFabio Estevam /DISCARD/ : { *(.dynsym*) } 974ac2e2d6SFabio Estevam /DISCARD/ : { *(.dynamic*) } 984ac2e2d6SFabio Estevam /DISCARD/ : { *(.hash*) } 994ac2e2d6SFabio Estevam /DISCARD/ : { *(.plt*) } 1004ac2e2d6SFabio Estevam /DISCARD/ : { *(.interp*) } 1014ac2e2d6SFabio Estevam /DISCARD/ : { *(.gnu*) } 1024ac2e2d6SFabio Estevam} 103