xref: /rk3399_rockchip-uboot/board/freescale/mpc8569mds/law.c (revision 326ea986ac150acdc7656d57fca647db80b50158)
1765547dcSHaiying Wang /*
2e5fe96b1SKumar Gala  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3765547dcSHaiying Wang  *
4765547dcSHaiying Wang  * (C) Copyright 2000
5765547dcSHaiying Wang  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6765547dcSHaiying Wang  *
7*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
8765547dcSHaiying Wang  */
9765547dcSHaiying Wang 
10765547dcSHaiying Wang #include <common.h>
11765547dcSHaiying Wang #include <asm/fsl_law.h>
12765547dcSHaiying Wang #include <asm/mmu.h>
13765547dcSHaiying Wang 
14765547dcSHaiying Wang /*
15765547dcSHaiying Wang  * LAW(Local Access Window) configuration:
16765547dcSHaiying Wang  *
17765547dcSHaiying Wang  *0)   0x0000_0000   0x7fff_ffff     DDR                     2G
18765547dcSHaiying Wang  *1)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
19765547dcSHaiying Wang  *-)   0xe000_0000   0xe00f_ffff     CCSR                    1M
20765547dcSHaiying Wang  *2)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M
21765547dcSHaiying Wang  *3)   0xc000_0000   0xdfff_ffff     SRIO                    512MB
22765547dcSHaiying Wang  *4.a) 0xf000_0000   0xf3ff_ffff     SDRAM                   64MB
23765547dcSHaiying Wang  *4.b) 0xf800_0000   0xf800_7fff     BCSR                    32KB
24765547dcSHaiying Wang  *4.c) 0xf800_8000   0xf800_ffff     PIB (CS4)		     32KB
25765547dcSHaiying Wang  *4.d) 0xf801_0000   0xf801_7fff     PIB (CS5)		     32KB
26765547dcSHaiying Wang  *4.e) 0xfe00_0000   0xffff_ffff     Flash                   32MB
27765547dcSHaiying Wang  *
28765547dcSHaiying Wang  *Notes:
29765547dcSHaiying Wang  *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
30765547dcSHaiying Wang  *    If flash is 8M at default position (last 8M), no LAW needed.
31765547dcSHaiying Wang  *
32765547dcSHaiying Wang  */
33765547dcSHaiying Wang 
34765547dcSHaiying Wang struct law_entry law_table[] = {
35765547dcSHaiying Wang #ifndef CONFIG_SPD_EEPROM
36765547dcSHaiying Wang 	SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_1G, LAW_TRGT_IF_DDR),
37765547dcSHaiying Wang #endif
38765547dcSHaiying Wang 	SET_LAW(CONFIG_SYS_BCSR_BASE_PHYS, LAW_SIZE_128M, LAW_TRGT_IF_LBC),
39765547dcSHaiying Wang };
40765547dcSHaiying Wang 
41765547dcSHaiying Wang int num_law_entries = ARRAY_SIZE(law_table);
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