xref: /rk3399_rockchip-uboot/board/freescale/ls1043ardb/cpld.c (revision f3a8e2b7d41ca9039e934b5a59899dd57c577fa3)
1 /*
2  * Copyright 2015 Freescale Semiconductor
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  *
6  * Freescale LS1043ARDB board-specific CPLD controlling supports.
7  */
8 
9 #include <common.h>
10 #include <command.h>
11 #include <asm/io.h>
12 #include "cpld.h"
13 
14 u8 cpld_read(unsigned int reg)
15 {
16 	void *p = (void *)CONFIG_SYS_CPLD_BASE;
17 
18 	return in_8(p + reg);
19 }
20 
21 void cpld_write(unsigned int reg, u8 value)
22 {
23 	void *p = (void *)CONFIG_SYS_CPLD_BASE;
24 
25 	out_8(p + reg, value);
26 }
27 
28 /* Set the boot bank to the alternate bank */
29 void cpld_set_altbank(void)
30 {
31 	u8 reg4 = CPLD_READ(soft_mux_on);
32 	u8 reg7 = CPLD_READ(vbank);
33 
34 	CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL);
35 
36 	reg7 = (reg7 & ~CPLD_BANK_SEL_MASK) | CPLD_BANK_SEL_ALTBANK;
37 	CPLD_WRITE(vbank, reg7);
38 
39 	CPLD_WRITE(system_rst, 1);
40 }
41 
42 /* Set the boot bank to the default bank */
43 void cpld_set_defbank(void)
44 {
45 	CPLD_WRITE(global_rst, 1);
46 }
47 
48 #ifdef DEBUG
49 static void cpld_dump_regs(void)
50 {
51 	printf("cpld_ver	= %x\n", CPLD_READ(cpld_ver));
52 	printf("cpld_ver_sub	= %x\n", CPLD_READ(cpld_ver_sub));
53 	printf("pcba_ver	= %x\n", CPLD_READ(pcba_ver));
54 	printf("soft_mux_on	= %x\n", CPLD_READ(soft_mux_on));
55 	printf("cfg_rcw_src1	= %x\n", CPLD_READ(cfg_rcw_src1));
56 	printf("cfg_rcw_src2	= %x\n", CPLD_READ(cfg_rcw_src2));
57 	printf("vbank		= %x\n", CPLD_READ(vbank));
58 	printf("sysclk_sel	= %x\n", CPLD_READ(sysclk_sel));
59 	printf("uart_sel	= %x\n", CPLD_READ(uart_sel));
60 	printf("sd1refclk_sel	= %x\n", CPLD_READ(sd1refclk_sel));
61 	printf("tdmclk_mux_sel	= %x\n", CPLD_READ(tdmclk_mux_sel));
62 	printf("sdhc_spics_sel	= %x\n", CPLD_READ(sdhc_spics_sel));
63 	printf("status_led	= %x\n", CPLD_READ(status_led));
64 	putc('\n');
65 }
66 #endif
67 
68 void cpld_rev_bit(unsigned char *value)
69 {
70 	u8 rev_val, val;
71 	int i;
72 
73 	val = *value;
74 	rev_val = val & 1;
75 	for (i = 1; i <= 7; i++) {
76 		val >>= 1;
77 		rev_val <<= 1;
78 		rev_val |= val & 1;
79 	}
80 
81 	*value = rev_val;
82 }
83 
84 int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
85 {
86 	int rc = 0;
87 
88 	if (argc <= 1)
89 		return cmd_usage(cmdtp);
90 
91 	if (strcmp(argv[1], "reset") == 0) {
92 		if (strcmp(argv[2], "altbank") == 0)
93 			cpld_set_altbank();
94 		else
95 			cpld_set_defbank();
96 #ifdef DEBUG
97 	} else if (strcmp(argv[1], "dump") == 0) {
98 		cpld_dump_regs();
99 #endif
100 	} else {
101 		rc = cmd_usage(cmdtp);
102 	}
103 
104 	return rc;
105 }
106 
107 U_BOOT_CMD(
108 	cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
109 	"Reset the board or alternate bank",
110 	"reset: reset to default bank\n"
111 	"cpld reset altbank: reset to alternate bank\n"
112 #ifdef DEBUG
113 	"cpld dump - display the CPLD registers\n"
114 #endif
115 );
116