xref: /rk3399_rockchip-uboot/board/freescale/ls1021atwr/dcu.c (revision 42817eb85de1d7dec399c75dbd133ea6b5351a72)
1*b4ecc8c6SWang Huan /*
2*b4ecc8c6SWang Huan  * Copyright 2014 Freescale Semiconductor, Inc.
3*b4ecc8c6SWang Huan  *
4*b4ecc8c6SWang Huan  * FSL DCU Framebuffer driver
5*b4ecc8c6SWang Huan  *
6*b4ecc8c6SWang Huan  * SPDX-License-Identifier:	GPL-2.0+
7*b4ecc8c6SWang Huan  */
8*b4ecc8c6SWang Huan 
9*b4ecc8c6SWang Huan #include <common.h>
10*b4ecc8c6SWang Huan #include <fsl_dcu_fb.h>
11*b4ecc8c6SWang Huan #include "div64.h"
12*b4ecc8c6SWang Huan #include "../common/dcu_sii9022a.h"
13*b4ecc8c6SWang Huan 
14*b4ecc8c6SWang Huan DECLARE_GLOBAL_DATA_PTR;
15*b4ecc8c6SWang Huan 
dcu_set_pixel_clock(unsigned int pixclock)16*b4ecc8c6SWang Huan unsigned int dcu_set_pixel_clock(unsigned int pixclock)
17*b4ecc8c6SWang Huan {
18*b4ecc8c6SWang Huan 	unsigned long long div;
19*b4ecc8c6SWang Huan 
20*b4ecc8c6SWang Huan 	div = (unsigned long long)(gd->bus_clk / 1000);
21*b4ecc8c6SWang Huan 	div *= (unsigned long long)pixclock;
22*b4ecc8c6SWang Huan 	do_div(div, 1000000000);
23*b4ecc8c6SWang Huan 
24*b4ecc8c6SWang Huan 	return div;
25*b4ecc8c6SWang Huan }
26*b4ecc8c6SWang Huan 
platform_dcu_init(unsigned int xres,unsigned int yres,const char * port,struct fb_videomode * dcu_fb_videomode)27*b4ecc8c6SWang Huan int platform_dcu_init(unsigned int xres, unsigned int yres,
28*b4ecc8c6SWang Huan 		      const char *port,
29*b4ecc8c6SWang Huan 		      struct fb_videomode *dcu_fb_videomode)
30*b4ecc8c6SWang Huan {
31*b4ecc8c6SWang Huan 	const char *name;
32*b4ecc8c6SWang Huan 	unsigned int pixel_format;
33*b4ecc8c6SWang Huan 
34*b4ecc8c6SWang Huan 	if (strncmp(port, "twr_lcd", 4) == 0) {
35*b4ecc8c6SWang Huan 		name = "TWR_LCD_RGB card";
36*b4ecc8c6SWang Huan 	} else {
37*b4ecc8c6SWang Huan 		name = "HDMI";
38*b4ecc8c6SWang Huan 		dcu_set_dvi_encoder(dcu_fb_videomode);
39*b4ecc8c6SWang Huan 	}
40*b4ecc8c6SWang Huan 
41*b4ecc8c6SWang Huan 	printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
42*b4ecc8c6SWang Huan 
43*b4ecc8c6SWang Huan 	pixel_format = 32;
44*b4ecc8c6SWang Huan 	fsl_dcu_init(xres, yres, pixel_format);
45*b4ecc8c6SWang Huan 
46*b4ecc8c6SWang Huan 	return 0;
47*b4ecc8c6SWang Huan }
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